Spectris Arcom VIPER Quick Start Manual page 26

VIPER RedBoot and AEL Quickstart
Parameter
pixclock
left, right,
hsynclen,
upper,
lower and
vsynclen
color or
mono
active or
passive
single or
dual
4pix or
8pix
© 2005 Arcom Issue D
Description
The pixel clock, expressed in picoseconds
-12
(10 s). This value is used in conjunction with
the current memory clock rate to calculate
LCCR3[PCD].
The timing parameters. All parameters are
given as a number of pixel clock ticks. The
upper and lower margins should be 0 for
passive (STN) displays.
The values correspond to LCCR as follows:
•
left corresponds to LCCR1[BLW] + 1.
•
right corresponds to LCCR1[ELW] + 1.
•
hsynclen corresponds to LCCR1[HSW] + 1.
•
upper corresponds to LCCR2[BFW].
•
lower corresponds to LCCR2[EFR].
•
vsynclen corresponds to LCCR2[VSW] + 1.
Several of these values are modified by + 1
because the hardware expects the desired value
– 1 to be programmed. The values given to this
parameter therefore correspond to the desired value
rather than the value programmed into the
hardware.
Configures the LCD controller for color or
monochrome panels. These parameters
correspond to the LCCR0[CMS] register.
Configures the LCD controller for active (TFT)
or passive (STN) displays. These parameters
correspond to the LCCR0[PAS] register.
In passive mode configures the LCD controller
for either single or dual panel displays. These
parameters correspond to the LCCR0[SDS]
register.
In monochrome passive mode configures the
LCD controller for either 4 or 8 pixel mode.
These parameters correspond to the
LCCR0[DPD] register.
Arcom Embedded Linux (AEL)
Default
pixclock:157500
left:7,
right:13,
hsynclen:63,
upper:1,
lower:1,
vsynclen:20.
color
active
N/A
N/A
Continued...
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