Intel Virtualization® Technology; Intel ® Microarchitecture Nehalem; Integrated Memory Controller - HP 124708-001 - ProLiant Cluster - 1850 Introduction Manual

Intel Virtualization® Technology
Virtualization techniques that are completely enabled in software perform many complex translations
between the guest operating systems and the hardware. With software virtualization, the processor
overhead increases (performance decreases) as each guest OS and application vies for the host
machine's physical resources such as memory space and I/O devices. Also, memory latency
increases as the virtual machine monitor, or hypervisor, dynamically translates the memory addresses
sent to and received from the memory controller. The hypervisor does this so that each guest
operating system does not realize that it is being virtualized.
Four-core Intel Xeon 5300 and 7300 series processors support Intel Virtualization Technology (VT-x),
which is a hardware enhancement designed to reduce this software overhead. Intel VT-x is a group of
extensions to the x86 instruction set that affect the processor, memory, and local I/O address
translations. The new instructions enable guest operating systems to run in the standard Ring-0
architectural layer 4 .
The Xeon 7300 series processors also include APIC Task Programmable Register, a new Intel® VT
extension that improves interrupt handling to further optimize virtualization software efficiency.
Intel ® Microarchitecture Nehalem
The Intel ® Xeon ® processor 5500 series, introduced in 2008, is based on the Intel
codenamed Nehalem (Figure 10). The Intel Microarchitecture Nehalem is built on hafnium-based
45 nanometer Hi-k metal gate silicon technology, a new material combination that reduces electrical
leakage and enables smaller, more energy-efficient, higher performance processors. The Intel
Microarchitecture Nehalem includes several performance and power management innovations:
• Dynamically managed cores, threads, cache, interfaces, and power
• Extensions to the Intel
®
media (graphics, video encoding and processing, 3-D imaging, and gaming)
• Seven Application Targeted Accelerators that improve the performance of specific applications
• Extended Page Table that improves performance of software in virtualized environments
• An integrated memory controller
• Intel ® QuickPath ® Technology
• a three-level cache hierarchy
• Intel ® Hyper-Threading Technology
• Intel Turbo Boost technology
®
• Dynamic Power Management

Integrated memory controller

One of the most notable improvements in Intel Xeon 5500 series processor is the integrated memory
controller (Figure 11). The memory controller uses three channels to access dedicated DDR-3 memory
sockets. This delivers significant performance improvement over previous architectures that provide a
single pool of system memory (Blackford has 4 FBD channels). The memory channels can operate at
up to 1333 MT/s, but the actual speed depends on the number and type of DIMMs—registered or
unbuffered—that populate the slots. For example, in a fully-populated system using registered DDR3-
1333 DIMMs, the memory bus speed drops to 800 MT/s to maintain signal integrity. The three
memory channels have a maximum total bandwidth of 32 GB/s. If a processor needs to access the
memory of another processor, it can do so through the QuickPath Interconnect (QPI).
4 For more information, refer to the technology brief "Server virtualization technologies for x86-based HP
BladeSystem and HP ProLiant servers" at
http://h20000.www2.hp.com/bc/docs/support/SupportManual/c01067846/c01067846.pdf
Streaming SIMD Extensions 4 (SSE4) for faster computation/manipulation of
® Microarchitecture,
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