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Aplex ViTAM-824B User Manual

10.1”, 12.1”, 15”, 15.6”, 17”, 19”, 21.5” and 23.8” intel elkhart lake fanless stainless steel panel pc
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Release Date
Feb.2025
®2025 Aplex Technology, Inc.
Aplex Technology, Inc.
15F-1, No.186, Jian Yi Road, Zhonghe District, New Taipei City 235, Taiwan
Tel: 886-2-82262881 Fax: 886-2-82262883 URL:
VITAM-8XXB Series
10.1", 12.1", 15", 15.6", 17", 19", 21.5" and 23.8"
Fanless Stainless Steel Panel PC
User Manual
aplex.com
Intel Elkhart Lake
All Rights Reserved.
Revision
V1.1
Published in Taiwan

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Summary of Contents for Aplex ViTAM-824B

  • Page 1 Fanless Stainless Steel Panel PC User Manual Release Date Revision Feb.2025 V1.1 ®2025 Aplex Technology, Inc. All Rights Reserved. Published in Taiwan Aplex Technology, Inc. 15F-1, No.186, Jian Yi Road, Zhonghe District, New Taipei City 235, Taiwan Tel: 886-2-82262881 Fax: 886-2-82262883 URL:...

  • Page 2: Revision History

    Revision History Reversion Date Description 2023/11/13 Initiation 2025/2/17 Add M12 pin define in Ch1.2 VITAM-8XXB Series User Manual...

  • Page 3: Warning

    Disclaimer This information in this document is subject to change without notice. In no event shall Aplex Technology Inc. be liable for damages of any kind, whether incidental or consequential, arising from either the use or misuse of information in this document or in any related materials.

  • Page 4: Safety Precautions

    Safety Precautions Follow the messages below to prevent your systems from damage: ◆ Avoid your system from static electricity on all occasions. ◆ Prevent electric shock. Don‘t touch any components of this card when the card is power-on. Always disconnect power when the system is not in use. ◆...

  • Page 5: Table Of Contents

    Table of Contents Revision History ..........................1 Warning!_______________________________________ ..............2 Safety Precautions ..........................3 Chapter 1 System Product ......................6 Features ..........................6 Specifications .......................... 6 Standard LCD ........................9 High Brightness LCD .......................... 10 Dimensions ........................... 11 Brief Description of VITAM-8XXB Series ................... 19 Yoke Mount and VESA Mount ....................
  • Page 6 Figures Figure 1: Dimensions of VITAM-810BP/BR(H)…………..………………….…………………………….……11 Figure 2: Dimensions of VITAM-812BP/BR(H)…………..…………………..…………………………….……12 Figure 3: Dimensions of VITAM-815BP/BR(H)…………..…………………..……………………………….…13 Figure 4: Dimensions of VITAM-816BP/BR(H)…………..…………………..………………..……………..…14 Figure 5: Dimensions of VITAM-817BP/BR(H)…………..…………………………………….…………………15 Figure 6: Dimensions of VITAM-819BP/BR(H)………..……………………………………………….…………16 Figure 7: Dimensions of VITAM-821BP/BR(H)………..……………………………………………….…………17 Figure 8: Dimensions of VITAM-824BP(H)………….……………………………..………………………………18 Figure 9: Front View of VITAM-810BP/BR(H)…….….……….………………….………………………………20 Figure 10: Rear View of VITAM-810BP/BR(H)…………..……….………………….……………………………20 Figure 11: Front View of VITAM-812BP/BR(H)………….……….………………………………………………21...

  • Page 7: Chapter 1 System Product

    System Product Chapter 1 1.1 Features ⚫ 10.1”~23.8” Stainless Steel Panel PC ⚫ True Flat front bezel design and Grade 304 Stainless Steel Enclosure (Grade 316 for option) ⚫ Intel® Celeron J6412 2.0GHz Onboard Processor ⚫ IP66/69K Rated with M12 connectors ⚫...
  • Page 8 1 x M12 8-pin for LAN with waterproof cap and chain LAN: Pin Define LAN1_0+ LAN1_0- LAN1_1+ LAN1_1- LAN1_2+ LAN1_2- LAN1_3+ LAN1_3- Power 1 x M12 3-pin for DC power input Pin Define Others 1 x Power Switch on the rear 1 x Touch on/off button at the side (Touch on-default/Touch off-option: press downward)
  • Page 9 Expansion Expansion Slot 1 x M.2 2230 E-Key socket for optional Wi-Fi 6/BT5.2 Module (PCIex2+USB2.0) ⚫ Optional M.2 module ⚫ Optional internal SMA antenna Touch Screen – Resistive Touch Window Type (not for 23.8”) TS Control PenMount 6000 on Board Interface Light Transmission Touch Screen –...

  • Page 10: Standard Lcd

    1.3 Standard LCD VITAM-810BP/R VITAM-812BP/R VITAM-815BP/R VITAM-816BP/R Display Type 10” TFT LCD 12.1” TFT LCD 15” TFT LCD 15.6” TFT LCD Max. Resolution 1280 x 800 800 x 600 1024 x 768 1366 x 768 1024 x 768 1920 x 1080 Max.

  • Page 11: High Brightness Lcd

    High Brightness LCD VITAM-810BP/RH VITAM-812BP/RH VITAM-815BP/RH VITAM-816BP/RH Display Type 10” TFT LCD 12.1” TFT LCD 15” TFT LCD 15.6” TFT LCD Max. Resolution 1280 x 800 800 x 600 1024 x 768 1366 x 768 1024 x 768 1920 x 1080 Max.

  • Page 12: Dimensions

    1.4 Dimensions Figure 1 Dimensions of VITAM-810BP/BR(H) VITAM-8XXB Series User Manual...

  • Page 13: Figure 2 Dimensions Of Vitam-812Bp/Br(H)

    Figure 2 Dimensions of VITAM-812BP/BR(H) VITAM-8XXB Series User Manual...

  • Page 14: Figure 3 Dimensions Of Vitam-815Bp/Br(H)

    Figure 3 Dimensions of VITAM-815BP/BR(H) VITAM-8XXB Series User Manual...

  • Page 15: Figure 4 Dimensions Of Vitam-816Bp/Br(H)

    Figure 4 Dimensions of VITAM-816BP/BR(H) VITAM-8XXB Series User Manual...

  • Page 16: Figure 5 Dimensions Of Vitam-817Bp/Br(H)

    Figure 5 Dimensions of VITAM-817BP/BR(H) VITAM-8XXB Series User Manual...

  • Page 17: Figure 6 Dimensions Of Vitam-819Bp/Br(H)

    Figure 6 Dimensions of VITAM-819BP/BR(H) VITAM-8XXB Series User Manual...

  • Page 18: Figure 7 Dimensions Of Vitam-821Bp/Br(H)

    Figure 7 Dimensions of VITAM-821BP/BR(H) VITAM-8XXB Series User Manual...

  • Page 19: Figure 8 Dimensions Of Vitam-824Bp(H)

    Figure 8 Dimensions of VITAM-824BP(H) VITAM-8XXB Series User Manual...

  • Page 20: Brief Description Of Vitam-8Xxb Series

    1.5 Brief Description of VITAM-8XXB Series There are 10.1” ~ 23.8” Stainless Steel Panel PC in VITAM-8XXB series, which comes with flat front panel design and Stainless Steel 304 Enclosure. It is powered by Intel® Celeron J6412(2.0 GHz) Processor, with one SO-DIMM DDR4 slot, up to 32GB 3200 MHz. These systems support DC 9~36V wide-ranging power input and IP66/IP69K front panel with M12 connectors.

  • Page 21: Figure 9 Front View Of Vitam-810Bp/Br(H)

    Figure 9 Front View of ViTAM-810BP/BR(H) Figure 10 Rear View of VITAM-810BP/BR(H) VITAM-8XXB Series User Manual...

  • Page 22: Figure 11 Front View Of Vitam-812Bp/Br(H)

    Figure 11 Front View of VITAM-812BP/BR(H) Figure 12 Rear View of VITAM-812BP/BR(H) VITAM-8XXB Series User Manual...

  • Page 23: Figure 13 Front View Of Vitam-815Bp/Br(H)

    Figure 13 Front View of VITAM-815BP/BR(H) Figure 14 Rear View of VITAM-815BP/BR(H) VITAM-8XXB Series User Manual...

  • Page 24: Figure 15 Front View Of Vitam-816Bp/Br(H)

    Figure 15 Front View of VITAM-816BP/BR(H) Figure 16 Rear View of VITAM-816BP/BR(H) VITAM-8XXB Series User Manual...

  • Page 25: Figure 17 Front View Of Vitam-817Bp/Br(H)

    Figure 17 Front View of VITAM-817BP/BR(H) Figure 18 Rear View of VITAM-817BP/BR(H) VITAM-8XXB Series User Manual...

  • Page 26: Figure 19: Front View Of Vitam-819Bp/Br(H)

    Figure 19 Front View of VITAM-819BP/819BR(H) Figure 20 Rear View of VITAM-819BP/819BR(H) VITAM-8XXB Series User Manual...

  • Page 27: Figure 21: Front View Of Vitam-821Bp/Br(H)

    Figure 21 Front View of VITAM-821BP/821BR(H) Figure 22 Rear View of VITAM-821BP/821BR(H) VITAM-8XXB Series User Manual...

  • Page 28: Figure 23 Front View Of Vitam-824Bp(H)

    Figure 23 Front View of VITAM-824BP(H) Figure 24 Rear View of VITAM-824BP(H) VITAM-8XXB Series User Manual...

  • Page 29: Yoke Mount And Vesa Mount

    1.6 Yoke Mount and VESA Mount The VITAM-8xxB series is designed to be VESA mount and Yoke Mount as shown in Picture below. Figure 25 VITAM-8XXB YOKE MOUNT Figure 26 VITAM-8XXB VESA MOUNT VITAM-8XXB Series User Manual...

  • Page 30: Chapter 2 Hardware

    Hardware Chapter 2 SBC-7130 is a 4" industrial motherboard developed on the basis of Intel Elkhart Lake,which provides abundant peripheral interfaces to meet the needs of different customers. Also, it features dual GbE ports, 2-COM ports and one M.2 B-Key and one M.2 E-Key and one mPCIe slot configuration, one DP port, one LVDS interface.
  • Page 31 1x USB2.0 via pitch2.0mm, DF13-30 for CN1(USB9,co-lay,option) 1x RS232/422/485,DB9,Pin9 with 5V/13.5V/RI (COM1) 1x RS232,2x5Pin header,Pin10 with 5V/13.5V/RI (COM2,option) Serial 2x UART for CN3 (COM3,COM4) 2x RS422/485 header for CN2 (COM5/COM6) GPIO 8-bit digital I/O by Pin header (CN2) 4-bit digital Input 4-bit digital Output 4-bit digital I/O by Pin header (CN3) 2-bit digital Input...

  • Page 32: Board Dimensions

    2 x RJ45 GbE LAN Ports 1 x DP Port 1 x Audio Jack (Line out) 1 x Power on/off connector (BT1) Operating: -20℃ to 70℃ Temperature Storage: -40℃ to 85℃ Humidity 10% - 90%, non-condensing, operating Power Consumption DC24V/1.05A (Intel J6412 2.00 GHz Processor with 8GB DDR4/HDD) EMI/EMS Meet CE/FCC class A 2.2 Board Dimensions...

  • Page 33: Jumpers And Connectors Location

    2.3 Jumpers and Connectors Location Board Top Board Bottom VITAM-8XXB Series User Manual...

  • Page 34: Jumpers Setting And Connectors

    2.4 Jumpers Setting and Connectors 1. CPU1: (FCBGA1493), onboard Intel Elkhart Lake Processors. Processor Model Number Cores/ Remarks Threads SBC-7130-J6412 J6412 2.0~2.6GHz 4 / 4 Default SBC-7130P-J6412 J6412 2.0~2.6GHz 4 / 4 option SBC-7130C-J6412 J6412 2.0~2.6GHz 4 / 4 option SBC-7130-X6425E X6425E 2.0~3.0GHz...
  • Page 35 Pin# Signal Name Pin1 Ground PIN2 VCC_RTC 6. SW1: (Switch DIP-6Pin), PoE mode and CHG-BAT and AT/ATX mode and CMOS and auto Power on jumper setting. Mode Pin1 (ON) PoE Mode (for PB-434) Pin1 (OFF) No PoE Mode Pin4 (ON) No CHG-BAT (option) Pin4 (OFF) For CHG-BAT ON (Default)
  • Page 36 7. DC_IN1: (5.08mm Pitch 1x3 Pin Connector),DC9~36V System power input connector. Pin# Power Input Pin1 DC_IN+ (DC+9V~36V) Pin2 DC_IN- (Ground) Pin3 Model DC_IN1 SBC-7130-J6412 180°Connector SBC-7130P-J6412 45°Connector SBC-7130C-J6412 180°Connector SBC-7130-X6425E 180° Connector SBC-7130C-X6425E 180° Connector 8. JP2 (NC): (2.54mm Pitch 1x2 Pin Header), Power input setting. Power Adapter input (DC_IN1) Open DC+9V~36V input (Default)
  • Page 37 11. SW_LVDS1: (Switch DIP-6Pin), LVDS jumper setting. S_LVDS(Switch) Function (CN1) Pin1 (ON) 3.3V Level Pin1 (OFF) 5V Level Pin2 (ON) Single channel LVDS Pin2 (OFF) Dual channel LVDS Pin3 (ON) 8/24 bit Pin3 (OFF) 6/18 bit Pin4 (ON) DC Mode Pin4 (OFF) PWM Mode Pin5 (ON)
  • Page 38 Pin# Signal Name 13V+BAT_S0 (DC10.5V~13.5V) 13V+BAT_S0 (DC10.5V~13.5V) Ground Ground BKLT_EN_OUT BKLT_CTRL DC+9V~36V input (DC_IN1) DC+9V~36V input (DC_IN1) Power output (INVT1/CN1：Pin1/Pin2) Power Input DC_IN1 DC13.5V PB-434(option) DC10.5~13.5V 14. CN1: (1.25mm Pitch 2x20 Connector, DF13-40P), for 18/24-bit LVDS output connector, fully supported by Parad PS8625(DP to LVDS), the interface features dual channel 24-bit output.
  • Page 39 15. TCH1: (2.0mm Pitch 1x6 wafer Pin Header), internal Touch controller connector. Pin# Signal Name SENSE GND_EARCH 16. JP1: (2.0mm Pitch 2x3 Pin Header),COM1 jumper setting, pin 1~6 are used to select signal out of pin 9 of COM1 port. JP1 Pin# Function Close 1-2...
  • Page 40 DSR (Data Set Ready) RTS (Request To Send) CTS (Clear To Send) JP1 select Setting (RI/5V/+10.5~13.5V) BIOS Setup：Serial Port 1 Configuration【RS-232】 RS422 (option): Pin# Signal Name 422_TX- 422_TX+ 422_RX+ 422_RX- Ground BIOS Setup：Serial Port 1 Configuration【RS-422】 RS485 (option): Pin# Signal Name 485- 485+ Ground...
  • Page 41 18. COM2: (2.0mm Pitch 2x5 Pin Header),COM2 Port, standard RS232 port are provided. They can be used directly via COM cable connection. COM2: RS232: Signal Name Pin# Pin# Signal Name Ground 13V+BAT_S0(DC10.5~13.5V) BIOS Setup：Serial Port 2 Configuration【RS-232】 19. USB3_1: USB3-1/USB3-2：(Double stack USB typeA),Rear USB3.1 connector, it provides up to 2 USB3.1 ports,USB3.1 allows data transfers up to 5.0Gb/s,support USB2.0 and full-speed and low-speed signaling.
  • Page 42 21. LAN1: Connector Rear LAN port, one standard 10/100/1000/2500Mbps RJ45 Ethernet port (RJ45 are provided. Used Intel I226-LM chipset. 22. LAN2: Connector Rear LAN port, one standard 10/100/1000/2500Mbps RJ45 Ethernet port (RJ45 are provided. Used Intel I226-LM chipset. 23. SATA_P2: (2.5mm Pitch 1x2 Wafer Pin Header), One onboard 5V output connectors are reserved to provide power for SATA devices.
  • Page 43 26. H6/H7: M-PCIE1 SCREW HOLES, H6/H7 for mini PCIe card (30mmx50.95mm) assemble. 27. SIM1: (Nano-SIM Slot), Support nano SIM Card devices. Pin# Signal Name SIM_VCC SIM_RST SIM_CLK Ground SIM_VCC_R(NC) SIM_IO 28. M2_B1: (M.2 Socket),M.2 B-Key,it is located at the top, it supports M.2 B-Key devices with one USB3.1/SATAIII auto detect.
  • Page 44 33. F_AUDIO1: (2.0mm Pitch 2x6 Pin Header), Front Audio, an onboard Realtek ALC888S codec is used to provide high-quality audio I/O ports. Line Out can be connected to a headphone or amplifier. Line In is used for the connection of external audio source via a Line in cable. MIC is the port for microphone input audio.
  • Page 45 37. DEBUG2 (option): (1.25mm Pitch 1x9 Pin Header), it supports ESPI signal. Pin# Signal Name 3P3V_S5 ESPI_IO3 ESPI_IO2 ESPI_IO1 ESPI_IO0 ESPI_CLK ESPI_CS0- RLTRST_3P3V- Ground 38. U4(option) Infineon’s Trusted Platform Module (TPM2.0) SLB9672VU2.0 is a fully standard compliant TPM based on the latest Trusted Computing Group (TCG) specification 2.0. *Note: Only support Windows 10 IOT.
  • Page 46 5V_S0 21 HDD_LED+ HDD LED 5V_S5 23 5V_S5 USB2.0 USB2.0 USB8_DP 25 USB8_DN Ground 27 FP_RST- RESET Power auto FP_PWRBTN 29 Ground COM5 BIOS Setup： Serial Port 5 Configuration【RS-422】 Serial Port 5 Configuration【RS-485】 COM6 BIOS Setup： Serial Port 6 Configuration【RS-422】 Serial Port 6 Configuration【RS-485】...
  • Page 47 PM_PCIE_WAKE- PLT_RST_BUF2- SMBus SMB_CLK_S0 SMB_DATA_S0 SMBus PCIe CLKREQ_PE4- Ground 3P3V_S5 FP-PWRBTN- Power Auto on 3P3V_S5 3P3V_S5 13V+BAT_S0 13V+BAT_S0 DC10.5~13.5V DC10.5~13.5V Power Input Power output (CN3:Pin59/Pin60) DC_IN1 DC13.5V PB-434(option) DC10.5~13.5V 41. CN434(option): (1.25mm Pitch, DF13-30P), Connector for smart battery charger board & PoE power input. Connect the CN434 Connector of SBC-7130C to the CN_434 connector of PB-434 R1.00 or PB-434 R2.00.
  • Page 48 42. PB-434 R1.00(option): This is the smart battery charger board. The size of this board is: 60 x 30mm. CN_434: (1.25mm Pitch, DF13-30P),Connect the CN_434 Connector of PB-434 R1.00 to the CN434 connector of SBC-7130C-XX R0.30. Signal Name Pin# Pin# Signal Name 13V+BAT_S5 Ground...
  • Page 49 SMB_DAT_CN1 SMB_CLK_CN1 BAT1_TEMP- Ground Ground Ground Function Specifications Nominal voltage (3S1P) 11.1~12.6V Charge voltage 12.6V Charge current 0.5C LED_1 STATUS. Green LED for CHG1_STAT1 status. LED_2 STATUS. Blue LED for CHG1_STAT2 status. LED_3 STATUS. Green LED for 3P3V_BAT status. 43. PB-434 R2.00(option): This is the smart battery charger board.
  • Page 50 3P3V_ALLS ECH4_EN_CHG1 3P3V_ALLS ECH5_EN_BAT1 SMB_DAT_BAT1 SMB_CLK_BAT1 VCC_BAT1 BAT1_TEMP- VCC_BAT1 Ground BAT_1: (1.25mm Pitch 1x9 Pin Header). Connection to 3S1P Smart Battery charger. Pin# Signal Name Remarks VCC_BAT1 BAT1 Voltage：12.6V VCC_BAT1 VCC_BAT1 SMB_DAT_CN1 SMB_CLK_CN1 BAT1_TEMP- Ground Ground Ground Function Specifications Nominal voltage (3S1P) 11.1~12.6V Charge voltage 12.6V...

  • Page 51: Chapter 3 Bios Setup Description

    Chapter 3 BIOS Setup Description 3.1 Operations after POST Screen After CMOS discharge or BIOS flashing operation. Press [Delete] key to enter CMOS Setup. After optimizing and exiting CMOS Setup Press F11 to load default values and continue 0085 3.2 BIOS SETUP UTILITY Press [Delete] key to enter BIOS Setup utility during POST, and then a main menu containing system summary information will appear.

  • Page 52: Main Settings

    3.3 Main Settings Aptio Setup - AMI Main Advanced Chipset Security Boot Save & Exit BIOS Information Choose the system default Project Version 7130V002 language EC VERSION 7130E005 Build Date and Time 06/14/2023 16:22:58 Compute Die Information Name ElkhartLake ULX Type Intel(R) Celeron(R) J6412 @ 2.00GHz...

  • Page 53: Advanced Settings

    3.4 Advanced Settings Aptio Setup - AMI Main Advanced Chipset Security Boot Save & Exit ►CPU Configuration CPU Configuration ►Power & Performance Parameters. ►Thermal Configuration ►Trusted Computing ►ACPI Settings ►Super IO Configuration ►Hardware Monitor ►S5 RTC Wake Settings ►GOP Settings ►Acoustic Management Configuration →←: Select Screen ►AMI Graphic Output Protocol Policy...
  • Page 54 Hardware Prefetcher: [Disabled] [Enabled] Intel (VNX) Virtualization Technology: [Disabled] [Enabled] PECI: [Disabled] [Enabled] Active Processor Cores: [ALL] BIST: [Disabled] [Enabled] AP threads Idle Manner: [HALT Loop] [MWAIT Loop] [RUN Loop] AES: [Disabled] [Enabled] MachineCheck: [Disabled] [Enabled] MonitorMWait: [Disabled] [Enabled] CPU SMM Enhancement CPU SMM Enhancement SMM Use Delay Indication: [Disabled]...
  • Page 55 [Disabled] [Enabled] #AC Split Lock: [Enabled] [Disabled] 3.4.2 Power & Performance Power & Performance CPU – Power Management Control CPU – Power Management Control P0 Fused Max Core Ratio P1 Fused Max Core Ratio P2 Fused Max Core Ratio P3 Fused Max Core Ratio Boot performance mode: [Max Battery] [Max Non-Turbo Performance]...
  • Page 56 [Disabled] [Enabled] View/Configure Turbo Options Current Turbo Settings Max Turbo Power Limit 4095.875 Min Turbo Power Limit Package TDP Limit 10.0 Power Limit 1 10.0 Power Limit 2 20.0 1-core Turbo Ratio 2- core Turbo Ratio 3- core Turbo Ratio 4- core Turbo Ratio Energy Efficient P-state: [Disabled]...
  • Page 57 PSYS PMax Power Acoustic Noise Settings Acoustic Noise Settings Acoustic Noise Mitigation: [Disabled] [Enabled] VccIn VR Domain Disable Fast PKG C State Ramp for VccIn Domain: [FALSE] [TRUE] Slow Slew Rate for VccIn Domain: [Fast/2] [Fast/4] [Fast/8] [Fast/16] VccIn VR Settings VccIn VR Domain VR Config Enable: [Disabled]...
  • Page 58 TDC Time Window: [1 ms] [2 ms] [3 ms] [4 ms] [5 ms] [6 ms] [7 ms] [8 ms] [9 ms] [10 ms] TDC Lock: [Disabled] [Enabled] RFI Settings RFI Domain RFI Current Frequency 139.200MHz RFI Frequency RFI Spread Spectrum Platform PL1 Enable: [Disabled] [Enabled]...
  • Page 59 [Disabled] [Enabled] CState Pre-Wake: [Disabled] [Enabled] IO MWAIT Redirection: [Disabled] [Enabled] Package C State Limit [C3] C6/C7 Short Latency Control(MSR 0x60B) Time Unit [1024 ns] Latency C6/C7 Short Latency Control(MSR 0x60C) Time Unit [1024 ns] Latency C8 Latency Control(MSR 0x633) Time Unit [1024 ns] Latency...
  • Page 60 Energy Performance Gain: [Disabled] [Enabled] EPG DIMM Idd3N EFG DIMM Idd3P Power Limit 3 Settings CPU Lock Configuration CFG Lock: [Disabled] [Enabled] Overclocking Lock: [Disabled] [Enabled] GT – Power Management Control GT – Power Management Control Maximum GT frequency: [Default Max Frequency] [100Mhz] [150Mhz] [200Mhz]...
  • Page 61 Disable Turbo GT frequency: [Enabled] [Disabled] 3.4.3 Thermal Configuration Thermal Configuration Enable All Thermal Funcations: [Disabled] [Enabled] CPU Thermal Configuration Cpu Thermal Configuration DTS SMM: [Disabled] [Enabled] [Critical Temp Reporting(Out of spec)] Tcc Activation Offset Tcc Offset Time Window: [Disabled] [5ms] [10 ms] [55 ms]...
  • Page 62 [40 sec] [48 sec] [56 sec] [64 sec] [80 sec] [96 sec] [112 sec] [128 sec] [160 sec] [192 sec] [224 sec] [256 sec] [320 sec] Tcc Offset Clamp Enable: [Disabled] [Enabled] Tcc Offset Lock Enable: [Disabled] [Enabled] Bi-directional PROCHOT#: [Disabled] [Enabled] Disable PROCHOT# Output:...
  • Page 63 [15 C] [23 C] [31 C] [39 C] [47 C] [55 C] [63 C] [71 C] [79 C] [87 C] [95 C] [100 C] [103 C] [111 C] [119 C (POR)] [127 C] [130 C] Active Trip Point 0: [Disabled] [15 C] [23 C] [31 C]...
  • Page 64 [63 C] [71 C] [79 C] [87 C] [95 C] [103 C] [111C] [119 C (POR)] Active Trip Point 1 Fan Speed: Passive Trip Point : [Disabled] [15 C] [23 C] [31 C] [39 C] [47 C] [55 C] [63 C] [71 C] [79 C] [87 C]...
  • Page 65 CPU Energy Read: [Disabled] [Enabled] CPU Temp Read: [Disabled] [Enabled] Alert Enable Lock: [Disabled] [Enabled] CPU Temp CPU Fan Speed DPTF Configuration DPTF Configuration Hardware Health Monitor Hardware Health Monitor Thermal Sensor 1 Temp 0.0 C Thermal Sensor 2 Temp 0.0 C Thermal Sensor 3 Temp 0.0 C...
  • Page 66 3.4.6 Super IO Configuration Super IO Configuration Super IO Chip IT8786 Serial Port 1 Configuration Serial Port 1 Configuration Serial Port: [Disabled] [Enabled] Device Settings IO=3F8h; IRQ=4; Change Settings: [Auto] [IO=3F8h; IRQ=4] [IO=3F8h; IRQ=3,4,5,6,7,9,10,11,12;] [IO=2F8h; IRQ=3,4,5,6,7,9,10,11,12;] [IO=3E8h; IRQ=3,4,5,6,7,9,10,11,12;] [IO=2E8h; IRQ=3,4,5,6,7,9,10,11,12;] COM1 Config: [RS232 mode] [RS485 mode]...
  • Page 67 Change Settings: [Auto] Serial Port 4 Configuration Serial Port 4 Configuration Serial Port: [Disabled] [Enabled] Device Settings IO=2E8h; IRQ=4; Change Settings: [Auto] Serial Port 5 Configuration Serial Port 5 Configuration Serial Port: [Disabled] [Enabled] Device Settings IO=2F0h; IRQ=4; Change Settings: [Auto] COM5 Config: [RS485 mode]...
  • Page 68 CPU_CORE_VIN : +1.653 V +1.2V : +1.236 V +12V : +13.120 V : +5.123 V Smart Fan Function Fan 1 Setting Fan 1 Setting Smart Fan 1 Mode: [Software Mode] [Automatic Mode] Fan 1 Type: [PWM] [RPM] Tempurature select: [TMPIN1] [TMPIN2] [TMPIN3] Fan off temperature limit:...
  • Page 69 [EDP1] [DP1] Brightness Setting BIST Enable: [Disabled] [Enabled] 3.4.12 Network Stack Configuration Network Stack: [Disabled] [Enabled] 3.4.13 NVME Configuration NVMe Configuration No NVME Device Found VITAM-8XXB Series User Manual...

  • Page 70: Chipset Settings

    3.5 Chipset Settings Aptio Setup - AMI Main Advanced Chipset Security Boot Save & Exit ►System Agent (SA) Configuration System Agent (SA) ►PCH-IO Configuration Parameters →←: Select Screen ↑↓ : Select Item Enter: Select +/- : Charge Opt. F1 : General Help F2: Previous Values F3:Optimized Defaults F4:Save and Exit...
  • Page 71 [2- Enabled HOT only] LPDDR Thermal Sensor: [Disabled] [Enabled] SelfRefresh Enable: [Disabled] [Enabled] SelfRefresh IdleTimer: Throttler CKEMin Defeature: [Enabled] [Disabled] Throttler CKKEMin Timer: For LPDDR Only: Throttler CKEMin Defeature: [Enabled] [Disabled] For LPDDR Only: Throttler CKEMin Timer: 64 Dram Power Meter Dram Power Meter Use user provided power weights, Sacle factor, and channel power...
  • Page 72 Write Energy Ch1Dimm0 Idle Energy Ch1Dimm1 PowerDown Energy Ch1Dimm1 Activate Energy Ch1Dimm1 Read Energy Ch1Dimm1 Write Energy Ch1Dimm1 Memory Thermal Reporting Lock Thermal Management Registers: [Disabled] [Enabled] Memory Thermal Reporting Extern Therm Status: [Disabled] [Enabled] Closed Loop Therm Manage: [Disabled] [Enabled] Open Loop Therm Manage: [Disabled]...
  • Page 73 Hot Budget Ch1 Dimm0 Hot Budget Ch1 Dimm1 Memory RAPL Memory RAPL Rap1 Power Floor Ch0 Rap1 Power Floor Ch1 RAPL PL Lock: [Disabled] [Enabled] RAPL PL 1 enable: [Disabled] [Enabled] RAPL PL 1 Power RAPL PL 1 WindowX RAPL PL 1 WindowY RAPL PL 2 enable: [Disabled] [Enabled]...
  • Page 74 [Disabled] [Enabled] Jedec Write Leveling: [Disabled] [Enabled] LPDDR4 Write DQ DQS Retraining: [Disabled] [Enabled] Early Write Time Centering 2D: [Disabled] [Enabled] Early Read Time Centering 2D: [Disabled] [Enabled] Write Timing Centering 1D: [Disabled] [Enabled] Write Voltage Centering 1D: [Disabled] [Enabled] Read Timing Centering 1D: [Disabled] [Enabled]...
  • Page 75 [Disabled] [Enabled] Read Amplifier Training*: [Disabled] [Enabled] Write Timing Centering 2D: [Disabled] [Enabled] Read Timing Centering 2D: [Disabled] [Enabled] Command Voltage Centering: [Disabled] [Enabled] Write Voltage Centering 2D: [Disabled] [Enabled] Read Voltage Centering 2D: [Disabled] [Enabled] Late Command Training: [Disabled] [Enabled] Round Trip Latency: [Disabled]...
  • Page 76 [Disabled] [Enabled] DIMM SPD Alias Test: [Disabled] [Enabled] Receive Enable Centering 1D: [Disabled] [Enabled] Retrain Margin Check: [Disabled] [Enabled] Write Drive Strength Up/ Dnindependently: [Disabled] [Enabled] Command Slew Rate Training: [Disabled] [Enabled] Command Drive Strength and Equalization: [Disabled] [Enabled] Command Normalization: [Disabled] [Enabled] Early DQ Write Drive Strength and...
  • Page 77 [Disabled] [Enabled] Duty Cycle Correction: [Disabled] [Enabled] DQ DFE Training: [Disabled] [Enabled] Sense Amplifier Correction Training: [Disabled] [Enabled] Memory Configuration Memory RC Version 0.0.4.104 Memory Data Rate 3200 MTPS Memory Timings (tCL-tRCD-tRP-tRAS) 22-22-22-52 Channel 0 Slot 0 Not Populated / Disabled Channel 0 Slot 1 Not Populated / Disabled Channel 1 Slot 0...
  • Page 78 [1800] [1867] [2000] [2133] [2200] [2400] [2600] [2667] [2800] [2933] [3000] [3200] [3467] [3600] [3733] [4000] [4200] [4267] HOB Buffer Size: [Auto] [1B] [1KB] [Max (assuming 63KB total HOB size)] Max TOLUD: [Dynamic] [1 GB] [1.25 GB] [1.5 GB] [1.75 GB] [2 GB] [2.25 GB] [2.5 GB]...
  • Page 79 [Disabled] [Enabled] DDR4_1DPC: [Disabled] [Enabled on DIMM0 only] [Enabled on DIMM1 only] [Enabled] Enable RH Prevention: [Disabled] [Enabled] REFRESH_PANIC_WM: REFRESH_HP_WM: Exit On Failure (MRC): [Disabled] [Enabled] Enable/Disable IED (Intel Enhanced Debug): [Enabled] [Disabled] Ch Hash Support: [Disabled] [Enabled] Ch Hash Mask: 12492 Ch Hash Interleaved Bit: [BIT6]...
  • Page 80 [PPD-DLLoff] Page Close Idle Timeout: [Enabled] [Disabled] Memory Scrambler: [Enabled] [Disabled] Force ColdReset: [Enabled] [Disabled] Channel 0 DIMM Control: [Enable both DIMMs] [Disable DIMM0] [Disable DIMM1] [Disable both DIMMs] Channel 1 DIMM Control: [Enable both DIMMs] [Disable DIMM0] [Disable DIMM1] [Disable both DIMMs] Force Single Rank: [Disabled]...
  • Page 81 Rank Margin Tool Per Task: [Disabled] [Enabled] Training Tracing: [Disabled] [Enabled] Lpddr Mem WL Set: [Set A] [Set B] BDAT Memory Test Type [Rank Margin Tool Rank] Rank Margin Tool Loop Count: Low Supply for LPDDR4 Data: [Disabled] [Enabled] Low Supply for LPDDR4 Clock/Command/Control: [Disabled] [Enabled]...
  • Page 82 [PCIE 8] [PCIE 9] [PCIE 10] [PCIE 11] [PCIE 12] [PCIE 13] [PCIE 14] [PCIE 15] [PCIE 16] [PCIE 17] [PCIE 18] [PCIE 19] Internal Graphics: [Auto] [Disabled] [Enabled] GTT Size: [2 MB] [4 MB] [8 MB] Aperture Size: [128 MB] [256 MB] [512 MB] [1024 MB]...
  • Page 83 [28M] [32M/F7] [36M] [40M] [44M] [48M] [52M] [56M] [60M] DVMT Total Gfx Mem: [128M] [256M] [MAX] DISM Size: [0GB] [1GB] [2GB] [3GB] [4GB] [5GB] [6GB] [7GB] Intel Graphics Pei Display Peim: [Enabled] [Disabled] VDD Enable: [Disabled] [Enabled] Configure GT for use: [Enabled] [Disabled] PAVP Enable:...
  • Page 84 [Max CdClock freq based on Reference C1k] Skip Full CD Clock Init: [Enabled] [Disabled] VBT Select: [eDP] [MIPI] IUER Button Enable: [Disabled] [Enabled] Intel(R) Ultrabook Event Support: Intel(R) Ultrabook Event Support IUER Slate Enable: [Disabled] [Enabled] IUER Dock Enable: [Disabled] [Enabled] VT-d: [Disabled]...
  • Page 85 3.5.2 PCH-IO Configuration PCH-IO Configuration PCI Express Configuration PCI Express Configuration DMI Link ASPM Control: [Disabled] [L0s] [L1] [L0sL1] [Auto] PCIE Port assigned to LAN Disabled Port8xh Decode: [Disabled] [Enabled] Peer Memory write Enable: [Disabled] [Enabled] Compliance Test Mode: [Disabled] [Enabled] PCH PCI Express Clock Gating: [Platform-POR]...
  • Page 86 [Disabled] [L0s] [L1] [L0sL1] [Auto] L1 Substates: [Disabled] [L1.1] [L1.1 & L1.2] ACS: [Disabled] [Enabled] PTM: [Disabled] [Enabled] DPC: [Disabled] [Enabled] EDPC: [Disabled] [Enabled] URR: [Disabled] [Enabled] FER: [Disabled] [Enabled] NFER: [Disabled] [Enabled] CER: [Disabled] [Enabled] SEFE: [Disabled] [Enabled] SENFE: [Disabled] [Enabled] SECE:...
  • Page 87 PME SCI: [Disabled] [Enabled] Hot Plug: [Disabled] [Enabled] Advanced Error Reporting: [Disabled] [Enabled] PCIe Speed: [Auto] [Gen1] [Gen2] [Gen3] Transmitter Half Swing: [Disabled] [Enabled] Detect Timeout: Extra Bus Reserved: Reserved Memory: Reserved I/O: PCH PCIe LTR Configuration LTR: [Disabled] [Enabled] Snoop Latency Override: [Disabled] [Manual]...
  • Page 88 [Disabled] [Enabled] Prefetchable Memory: Reserved Memory Alignment: Prefetchable Memory Alignment: PCIe Express Root Port 2 PCIe Express Root Port 2: [Disabled] [Enabled] Connection Type: [Built - in] [Slot] ASPM: [Disabled] [L0s] [L1] [L0sL1] [Auto] L1 Substates: [Disabled] [L1.1] [L1.1 & L1.2] ACS: [Disabled] [Enabled]...
  • Page 89 NFER: [Disabled] [Enabled] CER: [Disabled] [Enabled] SEFE: [Disabled] [Enabled] SENFE: [Disabled] [Enabled] SECE: [Disabled] [Enabled] PME SCI: [Disabled] [Enabled] Hot Plug: [Disabled] [Enabled] Advanced Error Reporting: [Disabled] [Enabled] PCIe Speed: [Auto] [Gen1] [Gen2] [Gen3] Transmitter Half Swing: [Disabled] [Enabled] Detect Timeout: Extra Bus Reserved: Reserved Memory: Reserved I/O:...
  • Page 90 [Disabled] [Manual] [Auto] Non Snoop Latency Override: [Disabled] [Manual] [Auto] Force LTR Override: [Disabled] [Enabled] LTR Lock: [Disabled] [Enabled] Extra options Detect Non-Compliance Device: [Disabled] [Enabled] Prefetchable Memory: Reserved Memory Alignment: Prefetchable Memory Alignment: PCIe Express Root Port 3 PCIe Express Root Port 3: [Disabled] [Enabled] Connection Type:...
  • Page 91 PTM: [Disabled] [Enabled] DPC: [Disabled] [Enabled] EDPC: [Disabled] [Enabled] URR: [Disabled] [Enabled] FER: [Disabled] [Enabled] NFER: [Disabled] [Enabled] CER: [Disabled] [Enabled] SEFE: [Disabled] [Enabled] SENFE: [Disabled] [Enabled] SECE: [Disabled] [Enabled] PME SCI: [Disabled] [Enabled] Hot Plug: [Disabled] [Enabled] Advanced Error Reporting: [Disabled] [Enabled] PCIe Speed:...
  • Page 92 [Gen2] [Gen3] Transmitter Half Swing: [Disabled] [Enabled] Detect Timeout: Extra Bus Reserved: Reserved Memory: Reserved I/O: PCH PCIe LTR Configuration LTR: [Disabled] [Enabled] Snoop Latency Override: [Disabled] [Manual] [Auto] Non Snoop Latency Override: [Disabled] [Manual] [Auto] Force LTR Override: [Disabled] [Enabled] LTR Lock: [Disabled]...
  • Page 93 Connection Type: [Built - in] [Slot] ASPM: [Disabled] [L0s] [L1] [L0sL1] [Auto] L1 Substates: [Disabled] [L1.1] [L1.1 & L1.2] ACS: [Disabled] [Enabled] PTM: [Disabled] [Enabled] DPC: [Disabled] [Enabled] EDPC: [Disabled] [Enabled] URR: [Disabled] [Enabled] FER: [Disabled] [Enabled] NFER: [Disabled] [Enabled] CER: [Disabled] [Enabled]...
  • Page 94 [Enabled] SECE: [Disabled] [Enabled] PME SCI: [Disabled] [Enabled] Hot Plug: [Disabled] [Enabled] Advanced Error Reporting: [Disabled] [Enabled] PCIe Speed: [Auto] [Gen1] [Gen2] [Gen3] Transmitter Half Swing: [Disabled] [Enabled] Detect Timeout: Extra Bus Reserved: Reserved Memory: Reserved I/O: PCH PCIe LTR Configuration LTR: [Disabled] [Enabled]...
  • Page 95 [Enabled] Extra options Detect Non-Compliance Device: [Disabled] [Enabled] Prefetchable Memory: Reserved Memory Alignment: Prefetchable Memory Alignment: USB/SATA/UFS PCI Express Root Port 5 PCI Express Root Port 5: [Disabled] [Enabled] Connection Type: [Built-in] [Slot] ASPM: [Disabled] [L0s] [L1] [L0sL1] [Auto] L1 Substates: [Disabled] [L1.1] [L1.1 &...
  • Page 96 TC3: [VC0] [VC1] TC4: [VC0] [VC1] TC5: [VC0] [VC1] TC6: [VC0] [VC1] TC7: [VC0] [VC1] PTM: [Disabled] [Enabled] DPC: [Disabled] [Enabled] EDPC: [Disabled] [Enabled] URR: [Disabled] [Enabled] FER: [Disabled] [Enabled] NFER: [Disabled] [Enabled] CER: [Disabled] [Enabled] SEFE: [Disabled] [Enabled] SENFE: [Disabled] [Enabled] VITAM-8XXB Series User Manual...
  • Page 97 SECE: [Disabled] [Enabled] PME SCI: [Disabled] [Enabled] Hot Plug: [Disabled] [Enabled] Advanced Error Reporting: [Disabled] [Enabled] PCIe Speed: [Auto] [Gen1] [Gen2] [Gen3] Transmitter Half Swing: [Disabled] [Enabled] Detect Timeout: Extra Bus Reserved: Reserved Memory: Reserved I/O: PCH PCIe LTR Configuration LTR: [Disabled] [Enabled]...
  • Page 98 [Enabled] Extra options Detect Non-Compliance Device: [Disabled] [Enabled] Prefetchable Memory: Reserved Memory Alignment: Prefetchable Memory Alignment: PCI Express Root Port 6 Lane configured as USB/SATA/UFS PCI Express Root Port 7 PCI Express Root Port 7: [Disabled] [Enabled] Connection Type: [Built-in] [Slot] ASPM: [Disabled]...
  • Page 99 TC3: [VC0] [VC1] TC4: [VC0] [VC1] TC5: [VC0] [VC1] TC6: [VC0] [VC1] TC7: [VC0] [VC1] PTM: [Disabled] [Enabled] DPC: [Disabled] [Enabled] EDPC: [Disabled] [Enabled] URR: [Disabled] [Enabled] FER: [Disabled] [Enabled] NFER: [Disabled] [Enabled] CER: [Disabled] [Enabled] SEFE: [Disabled] [Enabled] SENFE: [Disabled] [Enabled] VITAM-8XXB Series User Manual...
  • Page 100 SECE: [Disabled] [Enabled] PME SCI: [Disabled] [Enabled] Hot Plug: [Disabled] [Enabled] Advanced Error Reporting: [Disabled] [Enabled] PCIe Speed: [Auto] [Gen1] [Gen2] [Gen3] Transmitter Half Swing: [Disabled] [Enabled] Detect Timeout: Extra Bus Reserved: Reserved Memory: Reserved I/O: PCH PCIe LTR Configuration LTR: [Disabled] [Enabled]...
  • Page 101 Extra options Detect Non-Compliance Device: [Disabled] [Enabled] Prefetchable Memory: Reserved Memory Alignment: Prefetchable Memory Alignment: PCIE clocks Clock0 assignment: [Platform-POR] [Enabled] [Disabled] ClkReq for Clock0: [Platform-POR] [Disabled] Clock1 assignment: [Platform-POR] [Enabled] [Disabled] ClkReq for Clock1: [Platform-POR] [Disabled] Clock2 assignment: [Platform-POR] [Enabled] [Disabled] ClkReq for Clock2:...
  • Page 102 [Disabled] ClkReq for Clock4: [Platform-POR] [Disabled] Clock5 assignment: [Platform-POR] [Enabled] [Disabled] ClkReq for Clock5: [Platform-POR] [Disabled] SATA Configuration SATA Configuration SATA Controller(s): [Enabled] [Disabled] SATA Mode Selection: AHCI SATA Ports Multiplier: [Enabled] [Disabled] SATA Test Mode: [Enabled] [Disabled] Software Feature Mask Configuration Software Feature Mask Configuration HDD Unlock: [Disabled]...
  • Page 103 [Enabled] Configured as eSATA Hot Plug supported External: [Disabled] [Enabled] Spin Up Device: [Disabled] [Enabled] SATA Device Type: [Hard Disk Drive] [Solid State Drive] Topology: [Unknown] [ISATA] [Direct Connect] [Flex] [M2] SATA Port 0 DevSlp: [Disabled] [Enabled] SATA Port 0 RxPolarity: [Disabled] [Enabled] DITO Configuration:...
  • Page 104 Spin Up Device: [Disabled] [Enabled] SATA Device Type: [Hard Disk Drive] [Solid State Drive] Topology: [Unknown] [ISATA] [Direct Connect] [Flex] [M2] SATA Port 1 DevSlp: [Disabled] [Enabled] SATA Port 1 RxPolarity: [Disabled] [Enabled] DITO Configuration: [Disabled] [Enabled] DITO Value DM Value Serial ATA Port 2 Empty Software Preserve...
  • Page 105 Topology: [Unknown] [ISATA] [Direct Connect] [Flex] [M2] SATA Port 2 DevSlp: [Disabled] [Enabled] SATA Port 2 RxPolarity: [Disabled] [Enabled] DITO Configuration: [Disabled] [Enabled] DITO Value DM Value USB Configuration USB Configuration XHCI Compliance Mode: [Disabled] [Enabled] xDCI Support: [Disabled] [Enabled] USB2 PHY Sus Well Power Gating: [Disabled] [Enabled]...
  • Page 106 USB Overcurrent Lock: [Disabled] [Enabled] USB Port Disable Override: [Disabled] [Select Per-Pin] USB Device/HOST Mode Override: [Disabled] [Select Per-Pin] USB UCSI ACPI device: [Disabled] [Enabled] SCS Configuration eMMC 5.1 Controller: [Disabled] [Enabled] eMMC 5.1 HS400 Mode: [Disabled] [Enabled] Enable HS400 software tuning: [Disabled] [Enabled] Enable HS400 software tuning:...

  • Page 107: Security Settings

    3.6 Security Settings Aptio Setup - AMI Main Advanced Chipset Security Boot Save & Exit Password Description Set Administrator Password If ONLY the Administrator’s password is set, then this only limits access to Setup and is only asked for when entering Setup. If ONLY the User’s password is set, then this Is a power on password and must be entered to Is a power on password and must be entered to...

  • Page 108: Boot Settings

    3.7 Boot Settings Aptio Setup - AMI Main Advanced Chipset Security Boot Save & Exit Boot Configuration Number of seconds toWait for Setup Prompt Timeout Setup Activation key. Bootup NumLock State [Off] 65535(0xFFFF)means Indef Quiet Boot [Enabled] inite waiting. Boot Option Priorities Fast Boot [Disabled] →←: Select Screen...

  • Page 109: Save & Exit Settings

    3.8 Save & Exit Settings Aptio Setup - AMI Main Advanced Chipset Boot Security Save & Exit Save options Exit system setup after Save Changes and Exit Saving the changes. Discard Changes and Exit Save Changes and Reset Discard Changes and Reset Save Changes Discard Changes →←: Select Screen...
  • Page 110 [Yes] [No] Discard Changes Discard Changes done so far to any of the setup options? [Yes] [No] Restore Defaults Restore /Load Defaults values for all the setup options? [Yes] [No] Save as user Defaults Save the changes done so far as User Defaults? [Yes] [No] Restore user Defaults...

  • Page 111: Chapter 4 Installation Of Drivers

    Installation of Drivers Chapter 4 This chapter describes the installation procedures for software and drivers under the windows 10. The software and drivers are included with the motherboard. The contents include Intel Chipset, Graphics chipset driver, Audio driver, LAN driver and Intel® management engine interface. The instructions are as below.

  • Page 112: Intel Chipset

    Intel Chipset To install the Intel chipset driver, please follow the steps below. Step 1. Here is welcome page. Please make sure you save and exit all programs before install. Click Next. Step 2. Read the license agreement. Click Accept to accept all of the terms of the license agreement.
  • Page 113 Step 3. Click Install to begin the installation. Step 4. Select Restart Now to reboot your computer for the changes to take effect. VITAM-8XXB Series User Manual...

  • Page 114: Intel® Hd Graphics Chipset

    Intel® HD Graphics Chipset To install the Intel® HD Graphics Chipset, please follow the steps below. Step 1. Click Begin installation. Step 2. Read the license agreement. Click I agree to accept all the terms of the license agreement. VITAM-8XXB Series User Manual...
  • Page 115 Step 3. Choose Install function and Click Start to setup program. Step 5. Click Finish to complete installation. VITAM-8XXB Series User Manual...

  • Page 116: Realtek Hd Audio Driver Installation

    Realtek HD Audio Driver Installation To install the Realtek HD Audio Driver, please follow the steps below. Step 1. Click Next to continue. Step 2. Click Yes, I want to restart my computer now. Click Finish to complete the installation. VITAM-8XXB Series User Manual...

  • Page 117: Lan Driver

    LAN Driver To install the LAN driver, please follow the steps below. Step 1. Click Zip File to continue. Step 3. Click OK to begin the installation. Step 4. Click Close to finish installation. VITAM-8XXB Series User Manual...

  • Page 118: Intel® Management Engine Interface

    Intel® Management Engine Interface To install the Intel® Management Engine Interface, please follow the steps below. Step 1. Select setup language you need. Click Next to continue. Step 2. Choose I accept the terms in the License Agreement and click Next to begin the installation.
  • Page 119 Step 3. Click Next to continue. Step 4. Click Finish to complete the installation. VITAM-8XXB Series User Manual...

  • Page 120: Touch Screen Installation

    Touch Screen Installation This chapter describes how to install drivers and other software that will allow your touch screen work with different operating systems. Windows 10 Universal Driver Installation for PenMount 6000 4.6.1 Series Before installing the Windows 10 driver software, you must have the Windows 10 system installed and running on your computer.
  • Page 121 Step 1. Click Next to continue. Step 2. Read the license agreement. Click I Agree to agree the license agreement. VITAM-8XXB Series User Manual...
  • Page 122 Step 3. Choose the folder in which to install PenMount Windows Universal Driver. Click Install to start the installation. Step 4. Click Yes to continue. VITAM-8XXB Series User Manual...
  • Page 123 Step 5. Click Finish to complete installation. VITAM-8XXB Series User Manual...
  • Page 124 Software Functions 4.6.2 Resistive Touch Upon rebooting, the computer automatically finds the new 6000 controller board. The touch screen is connected but not calibrated. Follow the procedures below to carry out calibration. 1. After installation, click the PenMount Monitor icon “PM” in the menu bar. 2.
  • Page 125 Advanced Calibration Advanced Calibration uses 4, 9, 16 or 25 points to effectively calibrate touch panel linearity of aged touch screens. Click this button and touch the red squares in sequence with a stylus. To skip, press ESC’. Step 1. Please select a device then click “Configure”. You can also double click the device too. Step 2.Click “Standard Calibration”...
  • Page 126 NOTE: The older the touch screen, the more Advanced Mode calibration points you need for an accurate calibration. Use a stylus during Advanced Calibration for greater accuracy. Please follow the step as below: Step 3. Select Device to calibrate, then you can start to do Advanced Calibration. VITAM-8XXB Series User Manual...
  • Page 127 NOTE: Recommend to use a stylus during Advanced Calibration for greater accuracy. Plot Calibration Data Check this function and a touch panel linearity comparison graph appears when you have finished Advanced Calibration. The blue lines show linearity before calibration and black lines show linearity after calibration.
  • Page 128 Touch Mode This mode enables and disables the mouse’s ability to drag on-screen icons – useful for configuring POS terminals. Mouse Emulation – Select this mode and the mouse functions as normal and allows dragging of icons. Click on Touch – Select this mode and mouse only provides a click function, and dragging is disables.
  • Page 129 Multiple Monitors Multiple Monitors support from two to six touch screen displays for one system. The PenMount drivers for Windows 7/8/8.1 support Multiple Monitors. This function supports from two to six touch screen displays for one system. Each monitor requires its own PenMount touch screen control board, either installed inside the display or in a central unit.
  • Page 130 When the mapping screen message appears, click OK. Touch each screen as it displays “Please touch this monitor”. Following this sequence and touching each screen is called mapping the touch screens. Touching all screens completes the mapping and the desktop reappears on the monitors. Select a display and execute the “Calibration”...
  • Page 131 NOTES: 1. If you use a single VGA output for multiple monitors, please do not use the Multiple Monitor function. Just follow the regular procedure for calibration on each of your desktop monitors. 2. The Rotating function is disabled if you use the Multiple Monitor function. 3.
  • Page 132 Beep Setting Beep function for each device Right Button When you select this function, a mouse icon appears in the right-bottom of the screen. Click this icon to switch between Right and Left Button functions. Exit Exits the PenMount Monitor function. Configuring the Rotate Function 1.

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