Asus AAEON GENE-ASL5 User Manual
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Asus AAEON GENE-ASL5 User Manual

Asus AAEON GENE-ASL5 User Manual

3.5” subcompact board
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GENE-ASL5
3.5" Subcompact Board
st
User's Manual 1
Ed
Last Updated: February 10, 2025

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Summary of Contents for Asus AAEON GENE-ASL5

  • Page 1 GENE-ASL5 3.5” Subcompact Board User’s Manual 1 Last Updated: February 10, 2025...

  • Page 2: Copyright Notice

    Copyright Notice This document is copyrighted, 2024. All rights are reserved. The original manufacturer reserves the right to make improvements to the products described in this manual at any time without notice. No part of this manual may be reproduced, copied, translated, or transmitted in any form or by any means without the prior written permission of the original manufacturer.
  • Page 3 Acknowledgements All other products’ name or trademarks are properties of their respective owners. Microsoft Windows is a registered trademark of Microsoft Corp. ⚫ Intel Atom® is a registered trademark of Intel Corporation ⚫ Realtek is a trademark of Realtek Semiconductor Corporation. ⚫...
  • Page 4 Packing List Before setting up your product, please make sure the following items have been shipped: Item Quantity GENE-ASL5 Heatsink If any of these items are missing or damaged, please contact your distributor or sales representative immediately. Preface...
  • Page 5 About this Document This User’s Manual contains all the essential information, such as detailed descriptions and explanations on the product’s hardware and software features (if any), its specifications, dimensions, jumper/connector settings/definitions, and driver installation instructions (if any), to facilitate users in setting up their product. Users may refer to the product page at AAEON.com for the latest version of this document.
  • Page 6 Safety Precautions Please read the following safety instructions carefully. It is advised that you keep this manual for future references All cautions and warnings on the device should be noted. Make sure the power source matches the power rating of the device. Position the power cord so that people cannot step on it.
  • Page 7 If any of the following situations arises, please the contact our service personnel: Damaged power cord or plug Liquid intrusion to the device iii. Exposure to moisture Device is not working as expected or in a manner as described in this manual The device is dropped or damaged Any obvious signs of damage displayed on the device...
  • Page 8 FCC Statement This device complies with Part 15 FCC Rules. Operation is subject to the following two conditions: (1) this device may not cause harmful interference, and (2) this device must accept any interference received including interference that may cause undesired operation.
  • Page 9 China RoHS Requirements (CN) 产品中有毒有害物质或元素名称及含量 AAEON 主板/子板/背板 QO4-381 Rev.A2 有毒有害物质或元素 部件名称 铅 汞 镉 六价铬 多溴联苯 多溴二苯醚 (Pb) (Hg) (Cd) (Cr(VI)) (PBB) (PBDE) 印刷电路板 × ○ ○ ○ ○ ○ 及其电子组件 外部信号 × ○ ○ ○ ○ ○ 连接器及线材 本表格依据 SJ/T 11364 的规定编制。 ○：表示该有毒有害物质在该部件所有均质材料中的含量均在GB/T 26572标准规定...
  • Page 10 China RoHS Requirement (EN) Name and content of hazardous substances in product AAEON Main Board/Daughter Board/Backplane QO4-381 Rev.A2 Hazardous Substances 铅 汞 镉 六价铬 多溴联苯 多溴二苯醚 Part Name (Pb) (Hg) (Cd) (Cr(VI)) (PBB) (PBDE) PCB Assemblies × ○ ○ ○ ○...

  • Page 11: Table Of Contents

    Table of Contents Chapter 1 - Product Specifications..................1 Specifications ......................2 Block Diagram ......................6 Chapter 2 – Hardware Information ..................7 Dimensions ....................... 8 Jumpers and Connectors ..................9 List of Jumpers ......................11 2.3.1 Auto Power Button AT/ATX Selection (JP1) ..........12 2.3.2 COM 1 RI Jumper (JP2) ................
  • Page 12 2.4.13 External +5VSB Input (CN14) ..............32 2.4.14 GPIO Port (5Pin*2 Board to Wire Type 1) (CN15) ........33 2.4.15 COM Port 3 (9Pin*1 Board to Wire) (CN16) ..........34 2.4.16 COM Port 4 (9Pin*1 Board to Wire) (CN17) ..........35 2.4.17 COM Port 1 (9Pin*1 Board to Wire) (CN18) ..........
  • Page 13 Setup Submenu: Advanced ................. 68 3.4.1 CPU Configuration ..................69 3.4.2 PCH-FW Configuration ................70 3.4.3 Firmware Update Configuration ..............71 3.4.4 PTT Configuration ..................72 3.4.5 Trusted Computing ..................73 3.4.6 SATA Configuration ..................75 3.4.7 Hardware Monitor ..................76 3.4.7.1 Smart Fan Mode Configuration .............
  • Page 14 3.7.1 BBS Priorities ....................100 Setup Submenu: Save & Exit ................101 Chapter 4 – Driver Installation .................... 102 Driver Download/Installation ................103 Appendix A - I/O Information ..................... 106 I/O Address Map ....................107 Memory Address Map ..................110 IRQ Mapping Chart ....................

  • Page 15: Chapter 1 - Product Specifications

    Chapter 1 Chapter 1 - Product Specifications...

  • Page 16: Specifications

    Specifications System Form Factor 3.5" SubCompact Board Intel Atom® Processors x7000RE Series for the Edge: Intel Atom® x7213RE (2C, 2.0 GHz, 9W) Intel Atom® x7433RE (4C, 1.5 GHz, 9W) Intel Atom® x7835RE (8C, 1.3 GHz, 12W) Chipset Integrated with Intel® SoC Memory Type DDR5 4800, Single-Channel SODIMM x 1, Max 16GB, Non-ECC...
  • Page 17 Power Power Consumption (Cont.) Intel Atom® x7835RE, DDR5 16GB x 1, 4.76A @+12V (Max) Display Controller Intel® UHD Graphics LVDS/eDP LVDS x 1, Dual-Channel 18/24-bit, up to 1920 x 1080 eDP HBR3 x 1, up to 1920 x 1200 (Optional) Display Interface HDMI 1.4 x 1, up to 3840 x 2160 @30Hz VGA x 1, up to 1920 x 1080...
  • Page 18 Internal I/O COM 3, COM 4 (RS-232) Video LVDS x 1 eDP x 1 Inverter x 1 (12V/2A) SATA SATA 6Gb/s x 1 +5V SATA Power Connector x 1 Audio Audio Header x 1 (Optional, Audio function not available on WiTAS SKU) DIO/GPIO 8-bit GPIO SMBus/I2C...
  • Page 19 Environmental Operating Temperature WiTAS 2: -40°F ~ 185°F (-40°C ~ 85°C) Storage Temperature -40°F ~ 185°F (-40°C ~ 85°C) Operating Humidity 0% ~ 90% relative humidity, non-condensing MTBF (Hours) 1,284,701 CE/FCC Class A Chapter 1 – Product Specifications...

  • Page 20: Block Diagram

    Block Diagram Chapter 1 – Product Specifications...

  • Page 21: Chapter 2 - Hardware Information

    Chapter 2 Chapter 2 – Hardware Information...

  • Page 22: Dimensions

    Dimensions Chapter 2 – Hardware Information...

  • Page 23: Jumpers And Connectors

    Jumpers and Connectors Top View Front I/O View Chapter 2 – Hardware Information...
  • Page 24 Bottom View Chapter 2 – Hardware Information...

  • Page 25: List Of Jumpers

    List of Jumpers Please refer to the table below for all of the board’s jumpers that you can configure for your application Label Function Auto Power Button AT/ATX Selection COM 1 RI Jumper COM 2 RI Jumper LVDS Power Jumper Clear CMOS Jumper Touch Jumper Chapter 2 –...

  • Page 26: Auto Power Button At/Atx Selection (Jp1)

    2.3.1 Auto Power Button AT/ATX Selection (JP1) Enable Auto Power Button (Default) Disable Auto Power Button Chapter 2 – Hardware Information...

  • Page 27: Com 1 Ri Jumper (Jp2)

    2.3.2 COM 1 RI Jumper (JP2) +12V Ring (Default) Chapter 2 – Hardware Information...

  • Page 28: Com 2 Ri Jumper (Jp3)

    2.3.3 COM 2 RI Jumper (JP3) +12V Ring (Default) Chapter 2 – Hardware Information...

  • Page 29: Lvds Power Jumper (Jp4)

    2.3.4 LVDS Power Jumper (JP4) 2-4 LVDS Power +3.3V(Default)) 4-6 LVDS Power +5V 3-5 LVDS BKLT Power +5V(Default) 1-3 LVDS BKLT Power +12V Chapter 2 – Hardware Information...

  • Page 30: Clear Cmos Jumper (Jp5)

    2.3.5 Clear CMOS Jumper (JP5) Normal (Default) Clear CMOS Chapter 2 – Hardware Information...

  • Page 31: Touch Jumper (Jp6)

    2.3.6 Touch Jumper (JP6) 4,8 wire (Default) 5 wire Chapter 2 – Hardware Information...

  • Page 32: List Of Connectors

    List of Connectors Please refer to the table below for all of the board’s connectors that you can configure for your application Label Function USB 2.0 Connector (5Pin*1 Board to Wire) 4-Pin Fan Connector +5V Output for SATA HDD Port 80 Debug Port (10Pin*1 Board to Wire) SPI Flash Programming Port (7Pin*1 Board to Wire) Front Panel (10Pin*1 Board to Wire) SMBus/I2C Connector (With SMB_ALERT/INT_SERIRQ)
  • Page 33 Label Function CN37 M.2 3052 B-Key Slot Chapter 2 – Hardware Information...

  • Page 34: Usb 2.0 Connector (5Pin*1 Board To Wire) (Cn1)

    2.4.1 USB 2.0 Connector (5Pin*1 Board to Wire) (CN1) Pin Name Signal Type Signal Level +5VSB USB2_6_DN DIFF USB2_6_DP DIFF Note: The driving current of +5VSB supports up to 0.5A/Port. Chapter 2 – Hardware Information...

  • Page 35: 4-Pin Fan Connector (Cn2)

    2.4.2 4-Pin Fan Connector (CN2) Pin Name Signal Type Signal Level FAN_POWER +12V FAN_TAC FAN_CTL Note: The driving current of FAN_POWER supports up to 1A. Chapter 2 – Hardware Information...

  • Page 36: Output For Sata Hdd (Cn4)

    2.4.3 +5V Output for SATA HDD (CN4) Pin Name Signal Type Signal Level +V5S Note: The driving current of +V5S supports up to 1A. Chapter 2 – Hardware Information...

  • Page 37: Port 80 Debug Port (10Pin*1 Board To Wire) (Cn5)

    2.4.4 Port 80 Debug Port (10Pin*1 Board to Wire) (CN5) Pin Name Signal Type Signal Level +V3P3A +3.3V ESPI_CLK_EC_R +1.8V ESPI_RST_EC_R_N +1.8V ESPI_CS_EC_R_N -3.3V +V3P3S +3.3V ESPI_IO3_EC_R IN/OUT +1.8V ESPI_IO2_EC_R IN/OUT +1.8V ESPI_IO1_EC_R IN/OUT +1.8V ESPI_IO0_EC_R IN/OUT +1.8V Chapter 2 – Hardware Information...

  • Page 38: Spi Flash Programming Port (7Pin*1 Board To Wire) (Cn6)

    2.4.5 SPI Flash Programming Port (7Pin*1 Board to Wire) (CN6) Pin Name Signal Type Signal Level SPI_MISO SPI_CLK +V3P3A_SPI +3.3V SPI_MOSI SPI_CS Chapter 2 – Hardware Information...

  • Page 39: Front Panel (10Pin*1 Board To Wire) (Cn7)

    2.4.6 Front Panel (10Pin*1 Board to Wire) (CN7) Pin Name Signal Type Signal Level EXT_PWRBTN# SATA_LED- SATA_LED+ BUZZER- BUZZER+ PWR_LED+ HWRST# Chapter 2 – Hardware Information...

  • Page 40: Smbus/I2C Connector (With Smb_Alert/Int_Serirq) (Cn8)

    2.4.7 SMBus/I2C Connector (With SMB_ALERT/INT_SERIRQ) (CN8) Pin Name Signal Type Signal Level +V3P3S +3.3V SMB_CLK/ +3.3V I2C_CLK/TIME_SYNC0 SMB_DAT/ IN/OUT +3.3V I2C_DAT/TIME_SYNC1 SMB_ALERT/ +3.3V INT_SERIRQ/LAN_SDP Note: Default function is SMBus. Chapter 2 – Hardware Information...

  • Page 41: Sata Port (Cn9)

    2.4.8 SATA Port (CN9) Pin Name Signal Type Signal Level SATA_TXP DIFF SATA_TXN DIFF SATA_RXN DIFF SATA_RXP DIFF Chapter 2 – Hardware Information...

  • Page 42: Audio In/Out (6Pin*2 Board To Wire) (Cn10)

    2.4.9 Audio In/Out (6Pin*2 Board to Wire) (CN10) Pin Name Signal Type Signal Level RIGHT_OUT MIC_R LEFT_OUT MIC_L JD_LOUT JD_MIC GND_AUDIO GND_AUDIO JD_LIN LINE_R_IN +VDD_AUDIO LINE_L_IN Chapter 2 – Hardware Information...

  • Page 43: Usb 2.0 Connector (5Pin*1 Board To Wire) (Cn11)

    2.4.10 USB 2.0 Connector (5Pin*1 Board to Wire) (CN11) Pin Name Signal Type Signal Level +5VSB USB2_6_DN DIFF USB2_6_DP DIFF Note: The driving current of +5VSB supports up to 0.5A/Port. Chapter 2 – Hardware Information...

  • Page 44: Atx 4-Pin Dc Input Socket (Cn12)

    2.4.11 ATX 4-Pin DC Input Socket (CN12) Pin Name Signal Type Signal Level +12V +12V +12V +12V Note: 12V only. Chapter 2 – Hardware Information...

  • Page 45: Terminal Block Dc Input Connector (Cn13)

    2.4.12 Terminal Block DC Input Connector (CN13) Pin Name Signal Type Signal Level +VIN +12V Chapter 2 – Hardware Information...

  • Page 46: External +5Vsb Input (Cn14)

    2.4.13 External +5VSB Input (CN14) Pin Name Signal Type Signal Level PS_ON# +5VSB Note: The driving current of +5VSB supports up to 2.5A. Chapter 2 – Hardware Information...

  • Page 47: Gpio Port (5Pin*2 Board To Wire Type 1) (Cn15)

    2.4.14 GPIO Port (5Pin*2 Board to Wire Type 1) (CN15) Pin Name Signal Type Signal Level GPIO_0 IN/OUT GPIO_1 IN/OUT GPIO_2 IN/OUT GPIO_3 IN/OUT GPIO_4 IN/OUT GPIO_5 IN/OUT GPIO_6 IN/OUT GPIO_7 IN/OUT +V5S Chapter 2 – Hardware Information...

  • Page 48: Com Port 3 (9Pin*1 Board To Wire) (Cn16)

    2.4.15 COM Port 3 (9Pin*1 Board to Wire) (CN16) Pin Name Signal Type Signal Level DCD1 DSR1 RTS1 ±9V ±9V CTS1 DTR1 ±9V RI1/ +5V/ +12V IN/ PWR +5V/+12V Chapter 2 – Hardware Information...

  • Page 49: Com Port 4 (9Pin*1 Board To Wire) (Cn17)

    2.4.16 COM Port 4 (9Pin*1 Board to Wire) (CN17) RS-232 (Default) Pin Name Signal Type Signal Level DCD1 DSR1 RTS1 ±9V ±9V CTS1 DTR1 ±9V RI1/ +5V/ +12V IN/ PWR +5V/+12V Chapter 2 – Hardware Information...

  • Page 50: Com Port 1 (9Pin*1 Board To Wire) (Cn18)

    2.4.17 COM Port 1 (9Pin*1 Board to Wire) (CN18) RS-232 (Default) Pin Name Signal Type Signal Level DCD1 DSR1 RTS1 ±9V ±9V CTS1 DTR1 ±9V RI1/ +5V/ +12V IN/ PWR +5V/+12V RS-422 Pin Name Signal Type Signal Level RS422_TX- ±9V RS422_TX+ ±9V RS422_RX+...
  • Page 51 RS-422 Pin Name Signal Type Signal Level RS-485 Pin Name Signal Type Signal Level RS485_D- IN/OUT ±9V RS485_D+ IN/OUT ±9V Note: COM 1 RS-232/422/485 can be set by BIOS setting. Default is RS-232. Note: Pin 8 function can be set by JP2. Chapter 2 –...

  • Page 52: Com Port 2 (9Pin*1 Board To Wire) (Cn19)

    2.4.18 COM Port 2 (9Pin*1 Board to Wire) (CN19) RS-232 (Default) Pin Name Signal Type Signal Level DCD1 DSR1 RTS1 ±9V ±9V CTS1 DTR1 ±9V RI1/ +5V/ +12V IN/ PWR +5V/+12V RS-422 Pin Name Signal Type Signal Level RS422_TX- ±9V RS422_TX+ ±9V RS422_RX+...
  • Page 53 RS-422 Pin Name Signal Type Signal Level RS-485 Pin Name Signal Type Signal Level RS485_D- IN/OUT ±9V RS485_D+ IN/OUT ±9V Note: COM 2 RS-232/422/485 can be set by BIOS setting. Default is RS-232. Note: Pin 8 function can be set by JP3. Chapter 2 –...

  • Page 54: Lvds/Edp Connector (Cn21)

    2.4.19 LVDS/eDP Connector (CN21) LVDS (Default) Pin Name Signal Type Signal Level BKL_ENABLE BKL_CONTROL LVDS_A_CLK- DIFF LCD_PWR +3.3V/+5V LVDS_A_CLK+ DIFF LCD_PWR +3.3V/+5V LVDS_DA0- DIFF LVDS_DA2- DIFF LVDS_DA0+ DIFF LVDS_DA2+ DIFF LVDS_DA1- DIFF LVDS_DA3- DIFF LVDS_DA1+ DIFF LVDS_DA3+ DIFF Chapter 2 – Hardware Information...
  • Page 55 LVDS (Default) Pin Name Signal Type Signal Level LVDS_DB0- DIFF DDC_DATA +3.3V LVDS_DB0+ DIFF DDC_CLK +3.3V LVDS_DB1- DIFF LVDS_DB2- DIFF LVDS_DB1+ DIFF LVDS_DB2+ DIFF LVDS_B_CLK- DIFF LVDS_DB3- DIFF LVDS_B_CLK+ DIFF LVDS_DB3+ DIFF Pin Name Signal Type Signal Level BKL_ENABLE BKL_CONTROL eDP_TXN3 DIFF LCD_PWR...
  • Page 56 Pin Name Signal Type Signal Level eDP_TXN1 DIFF eDP_TXP1 DIFF eDP_AUX_N DIFF eDP_AUX_P DIFF eDP_HPD Chapter 2 – Hardware Information...

  • Page 57: Lvds Inverter/Backlight Connector (6Pin*1 Board To Wire) (Cn22)

    2.4.20 LVDS Inverter/Backlight Connector (6Pin*1 Board to Wire) (CN22) Pin Name Signal Type Signal Level BKL_PWR +5V(Default)/+12V BKL_PWR +5V(Default)/+12V BKL_CONTROL BKL_ENABLE +3.3V Note: LVDS/BKL_PWR can be set to +12V or +5V by BOM. Stuff R285 for 12V and stuff R287 for 5V. [Default:12V] Note: The driving current of BKL_PWR supports up to 2A.

  • Page 58: Rtc Battery Connector (Cn23)

    2.4.21 RTC Battery Connector (CN23) Pin Name Signal Type Signal Level +3.3V +3.3V Chapter 2 – Hardware Information...

  • Page 59: Usb 2.0 Connector (5Pin*1 Board To Wire) (Cn24)

    2.4.22 USB 2.0 Connector (5Pin*1 Board to Wire) (CN24) Pin Name Signal Type Signal Level +5VSB USB2_6_DN DIFF USB2_6_DP DIFF Note: The driving current of +5VSB supports up to 0.5A/Port. Chapter 2 – Hardware Information...

  • Page 60: Usb 2.0 Connector (5Pin*1 Board To Wire) (Cn25)

    2.4.23 USB 2.0 Connector (5Pin*1 Board to Wire) (CN25) Pin Name Signal Type Signal Level +5VSB USB2_6_DN DIFF USB2_6_DP DIFF Note: The driving current of +5VSB supports up to 0.5A/Port. Chapter 2 – Hardware Information...

  • Page 61: Hdmi Port (Cn26)

    2.4.24 HDMI Port (CN26) Pin Name Signal Type Signal Level HDMI_TX2+ DIFF HDMI_TX2- DIFF HDMI_TX1+ DIFF HDMI_TX1- DIFF HDMI_TX0+ DIFF HDMI_TX0- DIFF HDMI_CLK+ DIFF HDMI_CLK- DIFF DDC_CLK IN/OUT DDC_DATA IN/OUT +V5S HDMI_HPD Chapter 2 – Hardware Information...

  • Page 62: Dual Rj-45 Lan Port (Cn28)

    2.4.25 Dual RJ-45 LAN Port (CN28) Pin Name Signal Type Signal Level LAN1_MDI0_P DIFF LAN1_MDI0_N DIFF LAN1_MDI1_P DIFF LAN1_MDI1_N DIFF LAN1_MDI2_P DIFF LAN1_MDI2_N DIFF LAN1_MDI3_P DIFF LAN1_MDI3_N DIFF LAN2_MDI0_P DIFF LAN2_MDI0_N DIFF LAN2_MDI1_P DIFF LAN2_MDI1_N DIFF LAN2_MDI2_P DIFF LAN2_MDI2_N DIFF LAN2_MDI3_P DIFF LAN2_MDI3_N...

  • Page 63: Usb 3.2/Usb 2.0 Port 1/Port 2 (Cn29)

    2.4.26 USB 3.2/USB 2.0 Port 1/Port 2 (CN29) Pin Name Signal Type Signal Level +5VSB USB2_1_DN DIFF USB2_1_DP DIFF USB3_1_RXN DIFF USB3_1_RXP DIFF USB3_1_TXN DIFF USB3_1_TXP DIFF +5VSB USB2_2_DN DIFF USB2_2_DP DIFF USB3_2_RXN DIFF USB3_2_RXP DIFF USB3_2_TXN DIFF USB3_2_TXP DIFF Note: The driving current of +5VSB supports up to 0.9A/Port.

  • Page 64: Imvp9 Fw Reflash (Cn30)

    2.4.27 IMVP9 FW Reflash (CN30) Pin Name Signal Type Signal Level PM_SCL +3.3V PM_DAT +3.3V Chapter 2 – Hardware Information...

  • Page 65: Touch Screen Lines (Cn31)

    2.4.28 Touch Screen Lines (CN31) Pin Name Signal Type Signal Level Top Excite IN/OUT Bottom Excite IN/OUT Left Excite IN/OUT Right Excite IN/OUT TOP Sense IN/OUT Bottom Sense IN/OUT Left Sense IN/OUT Right Sense IN/OUT Chapter 2 – Hardware Information...

  • Page 66: Vga Port (Cn32)

    2.4.29 VGA Port (CN32) Pin Name Signal Type Signal Level GREEN BLUE RED_GND_RTN GREEN_GND_RTN BLUE_GND_RTN DDC_DATA HSYNC VSYNC DDC_CLK Chapter 2 – Hardware Information...

  • Page 67: Ddr5 Sodimm Slot (Cn33)

    2.4.30 DDR5 SODIMM Slot (CN33) Standard specifications. Chapter 2 – Hardware Information...

  • Page 68: Mini Card Slot (Full-Size Msata/Mpcie) (Cn34)

    2.4.31 Mini Card Slot (Full-size mSATA/mPCIe) (CN34) Pin Name Signal Type Signal Level PCIE_WAKE# +3.3V +3.3V +1.5V +1.5V PCIE_CLK_REQ# PCIE_REF_CLK- DIFF PCIE_REF_CLK+ DIFF W_DISABLE# +3.3V Chapter 2 – Hardware Information...
  • Page 69 Pin Name Signal Type Signal Level PCIE_RST3 +3.3V PCIE_RX-/SATA_RX- DIFF +3.3V +3.3V PCIE_RX+/SATA_RX+ DIFF +1.5V +1.5V SMB_CLK IN/OUT +3.3V PCIE_TX-/SATA_TX- DIFF SMB_DATA IN/OUT +3.3V PCIE_TX+/SATA_TX+ DIFF USB_D- DIFF USB_D+ DIFF +3.3V +3.3V +3.3V +3.3V +1.5V +1.5V +3.3V +3.3V Note: This is a co-lay design from PICO-V2K4, check pin define before use. Mini-Card/mSATA function can be set by BIOS.

  • Page 70: 2230 E-Key Slot (Cn35)

    2.4.32 M.2 2230 E-Key Slot (CN35) Pin Name Signal Type Signal Level +V3P3A +3.3V USB2_10_DP DIFF +V3P3A +3.3V USB2_10_DN DIFF CNV_WR_D1_DN DIFF KEYE_CNV_RF_RST CNV_WR_D1_DP DIFF KEYE_CNV_CLKREQ CNV_WR_D0_DN DIFF CNV_WR_D0_DP DIFF KEYE_UART_WAKE_N CNV_WR_CLK_DN DIFF CNV_BRI_RSP Chapter 2 – Hardware Information...
  • Page 71 Pin Name Signal Type Signal Level CNV_WR_CLK_DP DIFF CNV_RGI_DT CNV_RGI_RSP PCIE_8_TXP DIFF CNV_BRI_DT PCIE_8_TXN DIFF MLK_RST_N MLK_DATA IN/OUT PCIE_8_RXP DIFF MLK_CLK PCIE_8_RXN DIFF PCIE_3_CLK_DP DIFF PCIE_3_CLK_DN DIFF SUS_CLK BUF_PLT_RST# PCIE_CLKREQ#3 PCIE_WAKE# IN/OUT CNV_WT_D1_DN DIFF CNV_WT_D1_DP DIFF CNV_WT_D0_DN DIFF CNV_WT_D0_DP DIFF Chapter 2 –...

  • Page 72: Nano Sim Card Slot (Cn36)

    Pin Name Signal Type Signal Level CNV_WT_CLK_DN DIFF +V3P3A +3.3V CNV_WT_CLK_DP DIFF +V3P3A +3.3V 2.4.33 Nano SIM Card Slot (CN36) Pin Name Signal Type Signal Level UIM_PWR UIM_RST UIM_CLK UIM_VPP UIM_DATA IN/OUT Chapter 2 – Hardware Information...

  • Page 73: 3052 B-Key Slot (Cn37)

    2.4.34 M.2 3052 B-Key Slot (CN37) Pin Name Signal Type Signal Level +V3P3S +3.3V +V3P3S +3.3V USB2_2_DP DIFF KEYB_DISABLE_N USB2_2_DN DIFF PCH_SATA_LED_N +3.3V PCIE_4_RXN/ DIFF Chapter 2 – Hardware Information...
  • Page 74 Pin Name Signal Type Signal Level USB3_2_RXN UIM_RST_M2B PCIE4_1_RXP/ DIFF USB3_2_RXP UIM_CLK_M2B UIM_DAT_M2B IN/OUT PCIE4_TXN/ DIFF USB3_2_TXN UIM_PWR PCIE4_TXP/ DIFF USB3_2_TXP PCIE_3_RXN DIFF PCIE_3_RXP DIFF PCIE_3_TXN DIFF PCIE_3_TXP DIFF BUF_PLT_RST# M2B_CLKREQ# PCIE_4_CLK_DN DIFF KEYB_WAKE_N PCIE_4_CLK_DN DIFF Chapter 2 – Hardware Information...
  • Page 75 Pin Name Signal Type Signal Level SIM_Detect KEYB_WWAN_RST_N PCH_SUS_CLK +V3P3A +3.3V +V3P3A +3.3V +V3P3A +3.3V Chapter 2 – Hardware Information...

  • Page 76: Thermal Solutions

    Thermal Solutions 2.5.1 Heatsink Chapter 2 – Hardware Information...
  • Page 77 Heatsink Assembly Chapter 2 – Hardware Information...

  • Page 78: Chapter 3 - Ami Bios Setup

    Chapter 3 Chapter 3 - AMI BIOS Setup...

  • Page 79: System Test And Initialization

    System Test and Initialization These routines test and initialize board hardware. If the routines encounter an error during the tests, you will either hear a few short beeps or see an error message on the screen. There are two kinds of errors: fatal and non-fatal. The system can usually continue the boot up sequence with non-fatal errors.

  • Page 80: Ami Bios Setup

    AMI BIOS Setup AMI BIOS ROM has a built-in Setup program that allows users to modify the basic system configuration. This type of information is stored in battery-backed CMOS RAM and BIOS NVRAM so that it retains the Setup information when the power is turned off. Entering Setup Power on the computer and press <Del>or <ESC>...

  • Page 81: Setup Submenu: Main

    Setup Submenu: Main Chapter 3 – AMI BIOS Setup...

  • Page 82: Setup Submenu: Advanced

    Setup Submenu: Advanced Chapter 3 – AMI BIOS Setup...

  • Page 83: Cpu Configuration

    3.4.1 CPU Configuration Options Summary Intel (VMX) Virtualization Disabled Technology Enabled Optimal Default, Failsafe Default When enabled, a VMM can utilize the additional hardware capabilities provided by Vanderpool Technology. Intel® SpeedStep™ Disabled Enabled Optimal Default, Failsafe Default Allows more than two frequency ranges to be supported. Turbo Mode Disabled Enabled...

  • Page 84: Pch-Fw Configuration

    3.4.2 PCH-FW Configuration Chapter 3 – AMI BIOS Setup...

  • Page 85: Firmware Update Configuration

    3.4.3 Firmware Update Configuration Options Summary Me FW Image Re-Flash Enabled Disabled Optimal Default, Failsafe Default Enable/Disable Me FW Image Re-Flash function. FW Update Disabled Enabled Optimal Default, Failsafe Default Enable/Disable ME FW Update function. Chapter 3 – AMI BIOS Setup...

  • Page 86: Ptt Configuration

    3.4.4 PTT Configuration Options Summary TPM Device Selection dTPM Optimal Default, Failsafe Default Selects TPM device: PTT or discrete TPM. PTT - enables PTT in SkuMgr. dTPM - disables PTT is SkuMgr. Warning! PTT/dTPM will be disabled and all data saved on it will be lost. Chapter 3 –...

  • Page 87: Trusted Computing

    3.4.5 Trusted Computing Options Summary Security Device Support Enable Optimal Default, Failsafe Default Disable Enables or Disables BIOS support for security device. O.S. will not show Security Device. TCG EFI protocol and INT1A interface will not be available. SHA256 PCR Bank Enabled Optimal Default, Failsafe Default Disabled...
  • Page 88 Options Summary Platform Hierarchy Enabled Optimal Default, Failsafe Default Disabled Enable or Disable Platform Hierarchy Storage Hierarchy Enabled Optimal Default, Failsafe Default Disabled Enable or Disable Storage Hierarchy Endorsement Hierarchy Enabled Optimal Default, Failsafe Default Disabled Enable or Disable Endorsement Hierarchy Physical Presence Spec Optimal Default, Failsafe Default Version...

  • Page 89: Sata Configuration

    3.4.6 SATA Configuration Options Summary SATA Controller(s) Enabled Optimal Default, Failsafe Default Disabled Enable/Disable SATA Device. Port 1(CN9) Enabled Optimal Default, Failsafe Default Disabled Enable or Disable SATA Port. mSATA (CN34) Enabled Optimal Default, Failsafe Default Disabled Enable or Disable SATA Port. Chapter 3 –...

  • Page 90: Hardware Monitor

    3.4.7 Hardware Monitor Options Summary Smart Fan Disable Enable Optimal Default, Failsafe Default Enables or Disables Smart Fan. Chapter 3 – AMI BIOS Setup...

  • Page 91: Smart Fan Mode Configuration

    3.4.7.1 Smart Fan Mode Configuration Options Summary Fan 1 Smart Fan Control Manual Duty Mode Auto Duty-Cycle Mode Optimal Default, Failsafe Default Smart Fan Mode Select. Temperature Source CPU Temperature Optimal Default, Failsafe Default System Temperature System Temperature 2 Select the monitored temperature source for this fan. Temperature 1 Duty Cycle 1 Auto fan speed control.

  • Page 92: Sio Configuration

    3.4.8 SIO Configuration Chapter 3 – AMI BIOS Setup...

  • Page 93: Serial Port 1 Configuration

    3.4.8.1 Serial Port 1 Configuration Options Summary Use This Device Disable Enable Optimal Default, Failsafe Default Enable or Disable this Logical Device. Possible: Use Automatic Settings Optimal Default, Failsafe Default IO=3F8h; IRQ=4 IO=2F8h; IRQ=3 Allows user to change Device's Resource settings. New settings will be reflected on This Setup Page after System restarts.

  • Page 94: Serial Port 2 Configuration

    3.4.8.2 Serial Port 2 Configuration Options Summary Use This Device Disable Enable Optimal Default, Failsafe Default Enable or Disable this Logical Device. Possible: Use Automatic Settings Optimal Default, Failsafe Default IO=2F8h; IRQ=3 IO=3F8h; IRQ=4 Allows user to change Device's Resource settings. New settings will be reflected on This Setup Page after System restarts.

  • Page 95: Serial Port 3 Configuration

    3.4.8.3 Serial Port 3 Configuration Options Summary Use This Device Disable Enable Optimal Default, Failsafe Default Enable or Disable this Logical Device. Possible: Use Automatic Settings Optimal Default, Failsafe Default IO=3E8h; IRQ=7 IO=2E8h; IRQ=8 Allows user to change Device's Resource settings. New settings will be reflected on This Setup Page after System restarts.

  • Page 96: Serial Port 4 Configuration

    3.4.8.4 Serial Port 4 Configuration Options Summary Use This Device Disable Enable Optimal Default, Failsafe Default Enable or Disable this Logical Device. Possible: Use Automatic Settings Optimal Default, Failsafe Default IO=2E8h; IRQ=6 IO=3E8h; IRQ=7 Allows user to change Device's Resource settings. New settings will be reflected on This Setup Page after System restarts.

  • Page 97: Serial Port Console Redirection

    3.4.9 Serial Port Console Redirection Options Summary Console Redirection Disabled Optimal Default, Failsafe Default Enabled Console Redirection Enable or Disable. Console Redirection EMS Disabled Optimal Default, Failsafe Default Enabled Console Redirection Enable or Disable. Chapter 3 – AMI BIOS Setup...

  • Page 98: Legacy Console Redirection Settings

    3.4.10 Legacy Console Redirection Settings Options Summary Redirection COM port COM0 Optimal Default, Failsafe Default COM1(Pci Bus0, Dev0, Func0) (Disabled) Select a COM Port to display redirection of Legacy OS and Legacy OPROM message. Resolution 80x24 Optimal Default, Failsafe Default 80x25 On Legacy OS, the number of Rows and Columns supported redirection.

  • Page 99: Aaeon Bios Robot

    3.4.11 AAEON BIOS Robot Options Summary Sends watch dog before Disabled Optimal Default, Failsafe Default BIOS POST Enabled Enabled - Robot set Watch Dog Timer (WDT) right after power on, before BIOS start POST process. And then Robot will clear WDT on completion of POST. WDT will reset system automatically if it is not cleared before its timer counts down to zero.
  • Page 100 Options Summary OS Timer (minute) Optimal Default, Failsafe Default Timer count set to Watch Dog Timer for OS loading. Delayed POST (PEI phase) Disabled Optimal Default, Failsafe Default Enabled Enabled - Robot holds BIOS from starting POST, right after power on. This allows BIOS POST to start with stable power or start after system is physically warmed-up.

  • Page 101: Power Management

    3.4.12 Power Management Options Summary Power Mode ATX Type Optimal Default, Failsafe Default AT Type Select power supply mode. Power Saving (ERP) Control Disabled Optimal Default, Failsafe Default Enabled Configure power mode for power saving function Restore AC Power Loss Last State Optimal Default, Failsafe Default Always On...

  • Page 102: Gpio Port Configuration

    Options Summary By Weekday: System will wake on the enabled weekday with hr::min::sec specified. Bypass: BIOS will not control RTC wake function. 3.4.13 GPIO Port Configuration Options Summary GPIO Port* Output Input Set GPIO as Input or Output. Output Level High Set output level when GPIO pin is Output.

  • Page 103: Setup Submenu: Chipset

    Setup Submenu: Chipset Chapter 3 – AMI BIOS Setup...

  • Page 104: System Agent (Sa) Configuration

    3.5.1 System Agent (SA) Configuration Options Summary VT-d Disabled Optimal Default, Failsafe Default Enabled VT-d capability. Chapter 3 – AMI BIOS Setup...

  • Page 105: Memory Configuration

    3.5.2 Memory Configuration Chapter 3 – AMI BIOS Setup...

  • Page 106: Lvds Panel Configuration

    3.5.3 LVDS Panel Configuration Options Summary LVDS 640x480@60Hz 800x480@60Hz 800x600@60Hz 1024x600@60Hz 1024x768@60Hz Default 1280x768@60Hz 1280x800@60Hz 1280x1024@60Hz 1366x768@60Hz 1440x900@60Hz 1600x1200@60Hz 1920x1080@60Hz 1920x1200@60Hz Enable/Disable this panel. Chapter 3 – AMI BIOS Setup...
  • Page 107 Options Summary Panel Type 18-Bit Optimal Default, Failsafe Default 24-Bit 36-Bit 48-Bit Select panel type. Backlight Mode BIOS & Application Windows Slider Default Select backlight control signal type. Chapter 3 – AMI BIOS Setup...

  • Page 108: Pch-Io Configuration

    3.5.4 PCH-IO Configuration Options Summary HD Audio Disabled Enabled Optimal Default, Failsafe Default Control Detection of the HD-Audio device. Disable = HAD will be unconditionally disabled Enable = HAD will be unconditionally enabled. Full-MiniCard Slot SATA Function(CN34) PCIe Optimal Default, Failsafe Default Select function enabled for Full-MiniCard(CN34) slot USB Slot Function(CN37) USB PCIeX1...

  • Page 109: Setup Submenu: Security

    Setup Submenu: Security Change User/Supervisor Password You can install a Supervisor password, and if you install a supervisor password, you can then install a user password. A user password does not provide access to many of the features in the Setup utility. If you highlight these items and press Enter, a dialog box appears which lets you enter a password.

  • Page 110: Secure Boot

    3.6.1 Secure Boot Options Summary Secure Boot Disabled Optimal Default, Failsafe Default Enabled Secure Boot feature is Active if Secure Boot is Enabled, Platform Key (PK) is enrolled and the System is in User mode. The mode change requires platform reset Secure Boot Mode Custom Optimal Default, Failsafe Default...

  • Page 111: Key Management

    3.6.2 Key Management Options Summary Factory Key Provision Disabled Optimal Default, Failsafe Default Enabled Secure Boot feature is Active if Secure Boot is Enabled, Platform Key (PK) is enrolled and the System is in User mode. The mode change requires platform reset. Restore Factory Keys Force System to User Mode.
  • Page 112 Options Summary Remove 'UEFI CA' from DB Device Guard ready system must not list 'Microsoft UEFI CA' Certificate in Authorized Signature database (db). Restore DB defaults Restore DB variable to factory defaults. Platform Key (PK) Details Export Update Delete Key Exchange Keys Details Export Update...

  • Page 113: Setup Submenu: Boot

    Setup Submenu: Boot Options Summary Quiet Boot Disabled Enabled Optimal Default, Failsafe Default Enable or Disable Quiet Boot option. UEFI PXE Support Disabled Optimal Default, Failsafe Default Enabled Enable/Disable UEFI Network Stack. FIXED BOOT ORDER Priorities Sets the system boot order. Chapter 3 –...

  • Page 114: Bbs Priorities

    3.7.1 BBS Priorities Chapter 3 – AMI BIOS Setup...

  • Page 115: Setup Submenu: Save & Exit

    Setup Submenu: Save & Exit Options Summary Save Changes and Reset Reset the system after saving the changes. Discard Changes and Exit Exit system setup without saving any changes. Restore Defaults Restore/Load Default values for all the setup options. Chapter 3 – AMI BIOS Setup...

  • Page 116: Chapter 4 - Driver Installation

    Chapter 4 Chapter 4 – Driver Installation...

  • Page 117: Driver Download/Installation

    Driver Download/Installation Drivers for the GENE-ASL5 can be downloaded from the product page on the AAEON website by following this link: https://www.aaeon.com/en/ Download the driver(s) you need and follow the steps below to install them. Chipset Driver Open the folder where you unzipped the Chipset Drivers. Run the SetupChipset.exe file in the folder.
  • Page 118 Install Intel Smart Sound Driver Open the Intel Smart Sound folder Navigate the folder as follows: Production > Driver, then follow the below instructions to install the BUS Driver (IntcAudioBus.inf) and OED Driver (IntcOED.inf). Install BUS driver (IntcAudioBus.inf) Press Right Key -> Install Install OED driver (IntcOED.inf) Press Right Key ->...
  • Page 119 Install Realtek Audio Driver Open the Windows Audio folder followed by Setup.exe Follow the instructions Drivers will be installed automatically Install Intel ME & TXE Driver Open the Intel CSME folder Open the SetupME.exe file Follow the instructions Drivers will be installed automatically Install Peripheral Driver Open the Peripheral Driver folder Open the SetupSerialIO.exe file...

  • Page 120: Appendix A - I/O Information

    Appendix A Appendix A - I/O Information...

  • Page 121: I/O Address Map

    I/O Address Map Appendix A – I/O Information...
  • Page 122 Appendix A – I/O Information...
  • Page 123 Appendix A – I/O Information...

  • Page 124: A.2 Memory Address Map

    A.2 Memory Address Map Appendix A – I/O Information...
  • Page 125 Appendix A – I/O Information...

  • Page 126: A.3 Irq Mapping Chart

    A.3 IRQ Mapping Chart Appendix A – I/O Information...
  • Page 127 Appendix A – I/O Information...
  • Page 128 Appendix A – I/O Information...
  • Page 129 Appendix A – I/O Information...
  • Page 130 Appendix A – I/O Information...
  • Page 131 Appendix A – I/O Information...
  • Page 132 Appendix A – I/O Information...
  • Page 133 Appendix A – I/O Information...
  • Page 134 Appendix A – I/O Information...

  • Page 135: Appendix B - Mating Connectors And Cables

    Appendix B Appendix B – Mating Connectors and Cables...

  • Page 136: Mating Connectors And Cables

    Mating Connectors and Cables Mating Connector Available Label Function Cable P/N Cable Vendor Model no CN11 USB 2.0 Port Molex 51021-0500 USB2.0 Cable 1700050207 CN24 CN25 4-pin Smart FAN Molex 51021-0400 +5V Output for SATA SATA Power PHR-2 1702150155 Cable Port 80 Debug Port 80 Debug Port SHR-10V-S-B...

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