Asus AAEON GENE-MTH6 User Manual
Asus AAEON GENE-MTH6 User Manual

Asus AAEON GENE-MTH6 User Manual

3.5” subcompact board
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GENE-MTH6
3.5" Subcompact Board
st
User's Manual 1
Ed
Last Updated: February 10, 2025

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Summary of Contents for Asus AAEON GENE-MTH6

  • Page 1 GENE-MTH6 3.5” Subcompact Board User’s Manual 1 Last Updated: February 10, 2025...
  • Page 2: Copyright Notice

    Copyright Notice This document is copyrighted, 2024. All rights are reserved. The original manufacturer reserves the right to make improvements to the products described in this manual at any time without notice. No part of this manual may be reproduced, copied, translated, or transmitted in any form or by any means without the prior written permission of the original manufacturer.
  • Page 3 Acknowledgements All other products’ name or trademarks are properties of their respective owners. Microsoft Windows is a registered trademark of Microsoft Corp. ⚫ Intel® Core™ Ultra and Intel® Arc™ are trademarks of Intel Corporation ⚫ Realtek is a trademark of Realtek Semiconductor Corporation. ⚫...
  • Page 4 Packing List Before setting up your product, please make sure the following items have been shipped: Item Quantity GENE-MTH6 If any of these items are missing or damaged, please contact your distributor or sales representative immediately. Preface...
  • Page 5 About this Document This User’s Manual contains all the essential information, such as detailed descriptions and explanations on the product’s hardware and software features (if any), its specifications, dimensions, jumper/connector settings/definitions, and driver installation instructions (if any), to facilitate users in setting up their product. Users may refer to the product page at AAEON.com for the latest version of this document.
  • Page 6 Safety Precautions Please read the following safety instructions carefully. It is advised that you keep this manual for future references All cautions and warnings on the device should be noted. Make sure the power source matches the power rating of the device. Position the power cord so that people cannot step on it.
  • Page 7 If any of the following situations arises, please the contact our service personnel: Damaged power cord or plug Liquid intrusion to the device iii. Exposure to moisture Device is not working as expected or in a manner as described in this manual The device is dropped or damaged Any obvious signs of damage displayed on the device...
  • Page 8 FCC Statement This device complies with Part 15 FCC Rules. Operation is subject to the following two conditions: (1) this device may not cause harmful interference, and (2) this device must accept any interference received including interference that may cause undesired operation.
  • Page 9 China RoHS Requirements (CN) 产品中有毒有害物质或元素名称及含量 AAEON 主板/子板/背板 QO4-381 Rev.A2 有毒有害物质或元素 部件名称 铅 汞 镉 六价铬 多溴联苯 多溴二苯醚 (Pb) (Hg) (Cd) (Cr(VI)) (PBB) (PBDE) 印刷电路板 × ○ ○ ○ ○ ○ 及其电子组件 外部信号 × ○ ○ ○ ○ ○ 连接器及线材 本表格依据 SJ/T 11364 的规定编制。 ○:表示该有毒有害物质在该部件所有均质材料中的含量均在GB/T 26572标准规定...
  • Page 10 China RoHS Requirement (EN) Name and content of hazardous substances in product AAEON Main Board/Daughter Board/Backplane QO4-381 Rev.A2 Hazardous Substances 铅 汞 镉 六价铬 多溴联苯 多溴二苯醚 Part Name (Pb) (Hg) (Cd) (Cr(VI)) (PBB) (PBDE) PCB Assemblies × ○ ○ ○ ○...
  • Page 11: Table Of Contents

    Table of Contents Chapter 1 - Product Specifications..................1 Specifications ......................2 Block Diagram ......................6 Chapter 2 – Hardware Information ..................7 Dimensions ....................... 8 Jumpers and Connectors ..................9 List of Jumpers ......................11 2.3.1 COM 1 Pin 9 Function Selection (JP2) ............12 2.3.2 COM 2 Pin 9 Function Selection (JP3) ............
  • Page 12 2.4.12 USB 2.0 Port 5 (CN13) ................. 29 2.4.13 USB 2.0 Port 4 (CN14) ................. 30 2.4.14 USB 2.0 Port 3 (CN15) ................. 30 2.4.15 COM Port 1 (CN16) ..................31 2.4.16 COM Port 2 (CN17) ..................32 2.4.17 M.2 2230 E-Key Slot (CN18) ............... 34 2.4.18 COM Port 3 (CN19) ..................
  • Page 13 Thermal Solutions ....................57 2.5.1 Active Cooling Fan - GENE-MTH6-FAN01 ..........57 2.5.2 Heatspreader - GENE-MTH6-HSP01 ............59 2.5.3 FPC2 - PER-SB2B-A01-0001 ................ 61 Chapter 3 - AMI BIOS Setup ....................63 System Test and Initialization ................64 AMI BIOS Setup ..................... 65 Setup Submenu: Main ..................
  • Page 14 3.5.6.1 Serial Port 1 Configuration .............. 90 3.5.6.2 Serial Port 2 Configuration .............. 91 3.5.6.3 Serial Port 3 Configuration ............. 92 3.5.6.4 Serial Port 4 Configuration ............. 93 3.5.7 Serial Port Console Redirection ..............94 Setup Submenu: Security ..................95 3.6.1 Trusted Computing ..................
  • Page 15 Appendix B – Mating Connectors and Cables ..............129 Mating Connectors and Cables ................ 130 Preface...
  • Page 16: Chapter 1 - Product Specifications

    Chapter 1 Chapter 1 - Product Specifications...
  • Page 17: Specifications

    Specifications System Form Factor 3.5" SubCompact Board Intel® Core™ Ultra Processors: Intel® Core™ Ultra 7 Processor 155H (16C/22T, up to 4.8 GHz, 28W) Intel® Core™ Ultra 5 Processor 125H (14C/18T, up to 4.5 GHz, 28W) Intel® Core™ Ultra 7 Processor 155U (12C/14T, up to 4.8 GHz, 15W) Intel®...
  • Page 18 Power Power Requirement +9V ~ 36V (Optional: +12V), ERP support Power Supply Type AT/ATX, support 3pin ATX Connector Phoenix 2-pin Connector (Colay 4 pin connector) Power Consumption Intel® Core™ Ultra 7, DDR5 32GB x 2, 5.78A @+12V (Typical) Intel® Core™ Ultra 7, DDR5 32GB x 1, 8.42A @+12V (Max) Display Controller...
  • Page 19 External I/O Ethernet Intel® Ethernet Controller I226, 2.5GbE RJ-45 x 2 Intel® Ethernet Connection I219, 1GbE RJ-45 x 1 Note: vPro only supported with Intel® Core™ Ultra 7 Processor 165U/165H, Intel® Core™ Ultra 5 Processor 135U/135H), LAN 2 & LAN 3 support PXE USB 3.2 Gen 2 x 2 Port Serial Port —...
  • Page 20 Expansion Mini PCIe/mSATA — M.2 2280 M-Key x 1 (PCIe 4.0 [x4]/SATA) Default: PCIe 4.0 [x4] (selected by BOM) M.2 3052 B-Key x 1 (PCIe 3.0 [x1] + USB 3.2/PCIe 3.0 [x2]) Default: PCIe 3.0 [x1] (selected by BOM) M.2 2230 E-Key x 1 (PCIe 3.0 [x1] + USB 2.0), supports Wi-Fi 6E CNVi (RAID 0, RAID 1 support on PCIe storage) Others...
  • Page 21: Block Diagram

    Block Diagram Chapter 1 – Product Specifications...
  • Page 22: Chapter 2 - Hardware Information

    Chapter 2 Chapter 2 – Hardware Information...
  • Page 23: Dimensions

    Dimensions Chapter 2 – Hardware Information...
  • Page 24: Jumpers And Connectors

    Jumpers and Connectors Top View Front I/O View Chapter 2 – Hardware Information...
  • Page 25 Bottom View Chapter 2 – Hardware Information...
  • Page 26: List Of Jumpers

    List of Jumpers Please refer to the table below for all of the board’s jumpers that you can configure for your application Label Function COM 1 Pin 9 Function Selection COM 2 Pin 9 Function Selection LVDS Operating Voltage Selection LVDS Backlight Inverter Voltage Selection Clear CMOS Jumper Auto Power Button Enable/Disable Selection...
  • Page 27: Com 1 Pin 9 Function Selection (Jp2)

    2.3.1 COM 1 Pin 9 Function Selection (JP2) +12V Ring (Default) Chapter 2 – Hardware Information...
  • Page 28: Com 2 Pin 9 Function Selection (Jp3)

    2.3.2 COM 2 Pin 9 Function Selection (JP3) +12V Ring (Default) Chapter 2 – Hardware Information...
  • Page 29: Lvds Backlight Inverter Voltage Selection (Jp4)

    2.3.3 LVDS Backlight Inverter Voltage Selection (JP4) +5V (Default) +12V Chapter 2 – Hardware Information...
  • Page 30: Lvds Operating Voltage Selection (Jp4)

    2.3.4 LVDS Operating Voltage Selection (JP4) +3.3V (Default) Chapter 2 – Hardware Information...
  • Page 31: Clear Cmos Jumper (Jp5)

    2.3.5 Clear CMOS Jumper (JP5) Normal (Default) Clear CMOS Chapter 2 – Hardware Information...
  • Page 32: Auto Power Button Enable/Disable Selection (Jp5)

    2.3.6 Auto Power Button Enable/Disable Selection (JP5) Disable Auto Power Button Enable Auto Power Button (Default) Chapter 2 – Hardware Information...
  • Page 33: List Of Connectors

    List of Connectors Please refer to the table below for all of the board’s connectors that you can configure for your application Label Function Audio I/O Port +5V Output for SATA HDD M.2 3052 B-Key Slot External Power Input DDR5 SODIMM Channel 1 Front Panel SATA Port External +5VSB Input...
  • Page 34 Label Function CN36 RTC Battery Connector CN37 I2C/SMBus Connector CN38 Port 80 Debug Port Connector CN39 Board to Board Connector CN40 4-pin Fan Connector Chapter 2 – Hardware Information...
  • Page 35: Audio I/O Port (Cn1)

    2.4.1 Audio I/O Port (CN1) Pin Name Signal Type Signal Level RIGHT_OUT MIC_R LEFT_OUT MIC_L JD_LOUT JD_MIC GND_AUDIO GND_AUDIO JD_LIN LINE_R_IN +VDD_AUDIO LINE_L_IN Chapter 2 – Hardware Information...
  • Page 36: Output For Sata Hdd (Cn2)

    2.4.2 +5V Output for SATA HDD (CN2) Pin Name Signal Type Signal Level +V5S 2.4.3 M.2 3052 B-Key Slot (CN3) Pin Name Signal Type Signal Level +V3P3S +3.3V Chapter 2 – Hardware Information...
  • Page 37 Pin Name Signal Type Signal Level +V3P3S +3.3V USB2_2_DP DIFF KEYB_DISABLE_N USB2_2_DN DIFF PCH_SATA_LED_N +3.3V PCIE_4_RXN/ DIFF USB3_2_RXN UIM_RST_M2B PCIE4_1_RXP/ DIFF USB3_2_RXP UIM_CLK_M2B UIM_DAT_M2B IN/OUT PCIE4_TXN/ SB3_2_TXN DIFF UIM_PWR PCIE4_TXP/ SB3_2_TXP DIFF PCIE_3_RXN DIFF PCIE_3_RXP DIFF PCIE_3_TXN DIFF Chapter 2 – Hardware Information...
  • Page 38 Pin Name Signal Type Signal Level PCIE_3_TXP DIFF BUF_PLT_RST# M2B_CLKREQ# PCIE_4_CLK_DN DIFF KEYB_WAKE_N PCIE_4_CLK_DN DIFF SIM_Detect KEYB_WWAN_RST_N PCH_SUS_CLK +V3P3A +3.3V +V3P3A +3.3V +V3P3A +3.3V Chapter 2 – Hardware Information...
  • Page 39: External Power Input (Cn5)

    2.4.4 External Power Input (CN5) Pin Name Signal Type Signal Level +VIN +12V or +9~+36V 2.4.5 DDR5 SODIMM Channel 1 (CN6) Standard specification. Chapter 2 – Hardware Information...
  • Page 40: Front Panel (Cn7)

    2.4.6 Front Panel (CN7) Pin Name Signal Type Signal Level EXT_PWRBTN# SATA_LED- SATA_LED+ BUZZER- BUZZER+ PWR_LED+ HWRST# Chapter 2 – Hardware Information...
  • Page 41: Sata Port (Cn8)

    2.4.7 SATA Port (CN8) Pin Name Signal Type Signal Level SATA_TXP DIFF SATA_TXN DIFF SATA_RXN DIFF SATA_RXP DIFF 2.4.8 External +5VSB Input (CN9) Chapter 2 – Hardware Information...
  • Page 42: Spi Flash Programming Port (Cn10)

    Pin Name Signal Type Signal Level PS_ON# +5VSB +5V(2.5A) 2.4.9 SPI Flash Programming Port (CN10) Pin Name Signal Type Signal Level SPI_MISO SPI_CLK +V1P8A_SPI +1.8V SPI_MOSI SPI_CS Chapter 2 – Hardware Information...
  • Page 43: Ddr5 Sodimm Channel 2 (Cn11)

    2.4.10 DDR5 SODIMM Channel 2 (CN11) Standard specification. 2.4.11 USB 2.0 Port 6 (CN12) Pin Name Signal Type Signal Level +5VSB USB2_6_DN DIFF USB2_6_DP DIFF Chapter 2 – Hardware Information...
  • Page 44: Usb 2.0 Port 5 (Cn13)

    Pin Name Signal Type Signal Level 2.4.12 USB 2.0 Port 5 (CN13) Pin Name Signal Type Signal Level +5VSB USB2_5_DN DIFF USB2_5_DP DIFF Chapter 2 – Hardware Information...
  • Page 45: Usb 2.0 Port 4 (Cn14)

    2.4.13 USB 2.0 Port 4 (CN14) Pin Name Signal Type Signal Level +5VSB USB2_4_DN DIFF USB2_4_DP DIFF 2.4.14 USB 2.0 Port 3 (CN15) Chapter 2 – Hardware Information...
  • Page 46: Com Port 1 (Cn16)

    Pin Name Signal Type Signal Level +5VSB USB2_3_DN DIFF USB2_3_DP DIFF 2.4.15 COM Port 1 (CN16) RS-232 (Default) Pin Name Signal Type Signal Level DCD1 DSR1 RTS1 ±9V ±9V CTS1 DTR1 ±9V RI1/ +5V/ +12V IN/ PWR +5V/+12V RS-422 Pin Name Signal Type Signal Level RS422_TX-...
  • Page 47: Com Port 2 (Cn17)

    RS-422 Pin Name Signal Type Signal Level RS422_TX+ ±9V RS422_RX+ RS422_RX- RS-485 Pin Name Signal Type Signal Level RS485_D- IN/OUT ±9V RS485_D+ IN/OUT ±9V Note: COM 1 RS-232/422/485 can be set by BIOS setting. Default is RS-232. Note: Pin 8 function can be set by JP2. 2.4.16 COM Port 2 (CN17) Chapter 2 –...
  • Page 48 RS-232 (Default) Pin Name Signal Type Signal Level DCD2 DSR2 RTS2 ±9V ±9V CTS2 DTR2 ±9V RI2/ +5V/ +12V IN/ PWR +5V/+12V RS-422 Pin Name Signal Type Signal Level RS422_TX- ±9V RS422_TX+ ±9V RS422_RX+ RS422_RX- RS-485 Pin Name Signal Type Signal Level RS485_D- IN/OUT...
  • Page 49: 2230 E-Key Slot (Cn18)

    2.4.17 M.2 2230 E-Key Slot (CN18) Pin Name Signal Type Signal Level +V3P3A +3.3V USB2_10_DP DIFF +V3P3A +3.3V USB2_10_DN DIFF CNV_WR_D1_DN DIFF KEYE_CNV_RF_RST CNV_WR_D1_DP DIFF KEYE_CNV_CLKREQ CNV_WR_D0_DN DIFF CNV_WR_D0_DP DIFF KEYE_UART_WAKE_N CNV_WR_CLK_DN DIFF CNV_BRI_RSP CNV_WR_CLK_DP DIFF Chapter 2 – Hardware Information...
  • Page 50 Pin Name Signal Type Signal Level CNV_RGI_DT CNV_RGI_RSP PCIE_8_TXP DIFF CNV_BRI_DT PCIE_8_TXN DIFF MLK_RST_N MLK_DATA IN/OUT PCIE_8_RXP DIFF MLK_CLK PCIE_8_RXN DIFF PCIE_3_CLK_DP DIFF PCIE_3_CLK_DN DIFF SUS_CLK BUF_PLT_RST# PCIE_CLKREQ#3 PCIE_WAKE# IN/OUT CNV_WT_D1_DN DIFF CNV_WT_D1_DP DIFF CNV_WT_D0_DN DIFF CNV_WT_D0_DP DIFF Chapter 2 – Hardware Information...
  • Page 51: Com Port 3 (Cn19)

    Pin Name Signal Type Signal Level CNV_WT_CLK_DN DIFF +V3P3A +3.3V CNV_WT_CLK_DP DIFF +V3P3A +3.3V 2.4.18 COM Port 3 (CN19) Pin Name Signal Type Signal Level DCD3 DSR3 RTS3 ±9V ±9V CTS3 DTR3 ±9V Chapter 2 – Hardware Information...
  • Page 52: Com Port 4 (Cn20)

    2.4.19 COM Port 4 (CN20) Pin Name Signal Type Signal Level DCD4 DSR4 RTS4 ±9V ±9V CTS4 DTR4 ±9V Chapter 2 – Hardware Information...
  • Page 53: Lvds Connector (Cn21)

    2.4.20 LVDS Connector (CN21) Pin Name Signal Type Signal Level BKL_ENABLE BKL_CONTROL LCD_PWR +3.3V/+5V LVDS_A_CLK- DIFF LVDS_A_CLK+ DIFF LCD_PWR +3.3V/+5V LVDS_DA0- DIFF LVDS_DA0+ DIFF LVDS_DA1- DIFF LVDS_DA1+ DIFF LVDS_DA2- DIFF LVDS_DA2+ DIFF LVDS_DA3- DIFF LVDS_DA3+ DIFF DDC_DATA IN/OUT +3.3V DDC_CLK IN/OUT +3.3V LVDS_DB0-...
  • Page 54: Nano Sim Card Socket (Cn22)

    Pin Name Signal Type Signal Level LVDS_DB2+ DIFF LVDS_DB3- DIFF LVDS_DB3+ DIFF LCD_PWR +3.3V/+5V LVDS_B_CLK- DIFF LVDS_B_CLK+ DIFF 2.4.21 Nano SIM Card Socket (CN22) Pin Name Signal Type Signal Level UIM_PWR UIM_RST UIM_CLK UIM_VPP UIM_DATA IN/OUT Chapter 2 – Hardware Information...
  • Page 55: Gpio (Cn23)

    2.4.22 GPIO (CN23) Pin Name Signal Type Signal Level GPIO_0 IN/OUT GPIO_1 IN/OUT GPIO_2 IN/OUT GPIO_3 IN/OUT GPIO_4 IN/OUT GPIO_5 IN/OUT GPIO_6 IN/OUT GPIO_7 IN/OUT +V5S Chapter 2 – Hardware Information...
  • Page 56: 2280 M-Key Slot (Cn24)

    2.4.23 M.2 2280 M-Key Slot (CN24) Pin Name Signal Type Signal Level +V3P3S +3.3V +V3P3S +3.3V PCIE_12_RXN DIFF CARD_PWR_OFF_N PCIE_12_RXP DIFF PCH_SATA_LED_N +3.3V PCIE_12_TXN DIFF +V3P3S +3.3V PCIE_12_TXP DIFF +V3P3S +3.3V +V3P3S +3.3V PCIE_11_RXN DIFF +V3P3S +3.3V PCIE_11_RXP DIFF KEYM_SSD_VIO PCIE_11_TXN DIFF Chapter 2 –...
  • Page 57 Pin Name Signal Type Signal Level PCIE_11_TXP DIFF PCIE_10_RXN DIFF PCIE_10_RXP DIFF PCIE_10_TXN DIFF PCIE_10_TXP DIFF PCIE_9_RXN/ DIFF SATA_1_RXP PCIE_9_RXP/ DIFF SATA_1_RXN PCIE_9_TXN/ DIFF SATA_1_TXN PCIE_9_TXP/ DIFF SATA_1_TXP BUF_PLT_RST# M2M_CLKREQ# PCIE_5_CLK_DN DIFF PCIE_WAKE# PCIE_5_CLK_DP DIFF Chapter 2 – Hardware Information...
  • Page 58: Lan Port 2 Led Connector (Cn25)

    Pin Name Signal Type Signal Level SUS_CLK KEYM_DET +V3P3S +3.3V +V3P3S +3.3V +V3P3S +3.3V 2.4.24 LAN Port 2 LED Connector (CN25) Pin Name Signal Type Signal Level +V3P3A_LAN +3.3V LAN2_LED_1000# +3.3V LAN2_LED_LNK#_ACT +3.3V LAN2_LED_2500# +3.3V Chapter 2 – Hardware Information...
  • Page 59: Lvds Inverter/Backlight Connector (Cn26)

    2.4.25 LVDS Inverter/Backlight Connector (CN26) Pin Name Signal Type Signal Level BKL_PWR +5V(Default)/+12V BKL_PWR +5V(Default)/+12V BKL_CONTROL BKL_ENABLE +3.3V Note: LVDS/BKL_PWR & LVDS/BKL_CONTROL can be set to +12V or +5V by JP4. Note: The driving current of BKL_PWR supports up to 2A. Chapter 2 –...
  • Page 60: Lan Port 1 Led Connector (Cn27)

    2.4.26 LAN Port 1 LED Connector (CN27) Pin Name Signal Type Signal Level +V3P3A_LAN +3.3V LAN1_LED_1000# +3.3V LAN1_LED_LNK#_ACT +3.3V LAN1_LED_100# +3.3V 2.4.27 eDP Connector (CN29) Pin Name Signal Type Signal Level +VCC_EDP_BKLT +12V Chapter 2 – Hardware Information...
  • Page 61 Pin Name Signal Type Signal Level +VCC_EDP_BKLT +12V +VCC_EDP_BKLT +12V +VCC_EDP_BKLT +12V EDP_HPD EDP_BKLT_EN EDP_BKLTCTL EDP_ AUX _DP DIFF EDP_ AUX _DN DIFF EDP_LANE3_DP DIFF EDP_LANE3_DN DIFF EDP_LANE0_DP DIFF EDP_LANE0_DN DIFF EDP_LANE1_DP DIFF EDP_LANE1_DN DIFF EDP_LANE2_DP DIFF EDP_LANE2_DN DIFF +VDD +3.3V +VDD +3.3V...
  • Page 62: Lan Port 3 Led Connector (Cn30)

    2.4.28 LAN Port 3 LED Connector (CN30) Pin Name Signal Type Signal Level +V3P3A_LAN +3.3V LAN3_LED_1000# +3.3V LAN3_LED_LNK#_ACT +3.3V LAN3_LED_2500# +3.3V 2.4.29 RJ-45 LAN Port 3 (CN31) Pin Name Signal Type Signal Level LAN3_MDI0_P DIFF Chapter 2 – Hardware Information...
  • Page 63: Lan Port 1/Port 2 (Cn32)

    Pin Name Signal Type Signal Level LAN3_MDI0_N DIFF LAN3_MDI1_P DIFF LAN3_MDI1_N DIFF LAN3_MDI2_P DIFF LAN3_MDI2_N DIFF LAN3_MDI3_P DIFF LAN3_MDI3_N DIFF Note: The chip used for LAN 3 is Intel® Ethernet Controller I226. 2.4.30 RJ-45 LAN Port 1/Port 2 (CN32) Pin Name Signal Type Signal Level LAN1_MDI0_P...
  • Page 64: Usb 3.2/Usb 2.0 Port 1/Port 2 (Cn33)

    Pin Name Signal Type Signal Level LAN2_MDI2_P DIFF LAN2_MDI2_N DIFF LAN2_MDI3_P DIFF LAN2_MDI3_N DIFF Note: The chip used for LAN 1 is Intel® Ethernet Connection I219. Note: The chip used for LAN 2 is Intel® Ethernet Controller I226. 2.4.31 USB 3.2/USB 2.0 Port 1/Port 2 (CN33) Pin Name Signal Type Signal Level...
  • Page 65: Dp Port (Cn34)

    Pin Name Signal Type Signal Level USB3_2_RXP DIFF USB3_2_TXN DIFF USB3_2_TXP DIFF Note: The driving current of +5VSB supports up to 0.9A/Port 2.4.32 DP Port (CN34) Pin Name Signal Type Signal Level +V3P3A +3.3V USB2_10_DP DIFF +V3P3A +3.3V USB2_10_DN DIFF CNV_WR_D1_DN DIFF KEYE_CNV_RF_RST...
  • Page 66: Hdmi Port (Cn35)

    Pin Name Signal Type Signal Level CNV_WR_D0_DP DIFF 2.4.33 HDMI Port (CN35) Pin Name Signal Type Signal Level HDMI_TX2+ DIFF HDMI_TX2- DIFF HDMI_TX1+ DIFF HDMI_TX1- DIFF HDMI_TX0+ DIFF HDMI_TX0- DIFF HDMI_CLK+ DIFF HDMI_CLK- DIFF DDC_CLK IN/OUT DDC_DATA IN/OUT +V5S HDMI_HPD Chapter 2 –...
  • Page 67: Rtc Battery Connector (Cn36)

    2.4.34 RTC Battery Connector (CN36) Pin Name Signal Type Signal Level +3.3V +3.3V 2.4.35 I2C/SMBus Connector (CN37) Pin Name Signal Type Signal Level +V3P3S +3.3V SMB_CLK/ +3.3V I2C_CLK/TIME_SYNC0 Chapter 2 – Hardware Information...
  • Page 68: Port 80 Debug Port Connector (Cn38)

    Pin Name Signal Type Signal Level SMB_DAT/ +3.3V I2C_DAT/TIME_SYNC1 SMB_ALERT/ +3.3V INT_SERIRQ/LAN_SDP Note: Default function is SMBus. 2.4.36 Port 80 Debug Port Connector (CN38) Pin Name Signal Type Signal Level ESPI_IO0_EC_R IN/OUT +3.3V ESPI_IO1_EC_R IN/OUT +1.8V ESPI_IO2_EC_R IN/OUT +1.8V ESPI_IO3_EC_R IN/OUT +1.8V +V3P3S...
  • Page 69: Board To Board Connector (Cn39)

    2.4.37 Board to Board Connector (CN39) Pin Name Signal Type Signal Level +V12S +12V +V12S +12V +V12S +12V +V12S +12V +V12S +12V +V12S +12V +V12S +12V +V12S +12V +V12S +12V +V12S +12V PCIE_13_TXP DIFF PCIE_17_TXP DIFF PCIE_13_TXN DIFF PCIE_17_TXN DIFF PCIE_7_CLK_TXP DIFF PCIE_8_CLK_TXP...
  • Page 70 Pin Name Signal Type Signal Level PCIE_14_TXP DIFF PCIE_18_TXP DIFF PCIE_14_TXN DIFF PCIE_18_TXN DIFF PCIE_15_TXP DIFF PCIE_19_TXP DIFF PCIE_15_TXN DIFF PCIE_19_TXN DIFF PCIE_16_TXP DIFF PCIE_20_TXP DIFF PCIE_16_TXN DIFF PCIE_20_TXN DIFF PCIE_13_RXN DIFF PCIE_17_RXN DIFF PCIE_13_RXP DIFF PCIE_17_RXP DIFF PCIE_14_RXN DIFF PCIE_18_RXN DIFF PCIE_14_RXP...
  • Page 71: 4-Pin Fan Connector (Cn40)

    Pin Name Signal Type Signal Level PCIE_20_RXP DIFF +V3P3A +3.3V +V3P3A +3.3V BUF_PLT_RST# BUF_PLT_RST# SMB_CLK SMB_CLK SMB_DATA IN/OUT SMB_DATA IN/OUT +V3P3S +3.3V +V3P3S +3.3V +V3P3S +3.3V +V3P3S +3.3V +V3P3S +3.3V +V3P3S +3.3V 2.4.38 4-pin Fan Connector (CN40) Pin Name Signal Type Signal Level FAN_POWER +12V...
  • Page 72: Thermal Solutions

    Thermal Solutions 2.5.1 Active Cooling Fan - GENE-MTH6-FAN01 Chapter 2 – Hardware Information...
  • Page 73 GENE-MTH6-FAN01 Assembly Chapter 2 – Hardware Information...
  • Page 74: Heatspreader - Gene-Mth6-Hsp01

    2.5.2 Heatspreader - GENE-MTH6-HSP01 Chapter 2 – Hardware Information...
  • Page 75 GENE-MTH6-HSP01 Assembly Chapter 2 – Hardware Information...
  • Page 76: Fpc2 - Per-Sb2B-A01-0001

    2.5.3 FPC2 - PER-SB2B-A01-0001 Chapter 2 – Hardware Information...
  • Page 77 PER-SB2B-A01-0001 Assembly Chapter 2 – Hardware Information...
  • Page 78: Chapter 3 - Ami Bios Setup

    Chapter 3 Chapter 3 - AMI BIOS Setup...
  • Page 79: System Test And Initialization

    System Test and Initialization These routines test and initialize board hardware. If the routines encounter an error during the tests, you will either hear a few short beeps or see an error message on the screen. There are two kinds of errors: fatal and non-fatal. The system can usually continue the boot up sequence with non-fatal errors.
  • Page 80: Ami Bios Setup

    AMI BIOS Setup AMI BIOS ROM has a built-in Setup program that allows users to modify the basic system configuration. This type of information is stored in battery-backed CMOS RAM and BIOS NVRAM so that it retains the Setup information when the power is turned off. Entering Setup Power on the computer and press <Del>or <ESC>...
  • Page 81: Setup Submenu: Main

    Setup Submenu: Main Chapter 3 – AMI BIOS Setup...
  • Page 82: Setup Submenu: Advanced

    Setup Submenu: Advanced Chapter 3 – AMI BIOS Setup...
  • Page 83: Graphics Configuration

    3.4.1 Graphics Configuration Chapter 3 – AMI BIOS Setup...
  • Page 84: Lvds Panel Configuration

    3.4.2 LVDS Panel Configuration Options Summary LVDS Disabled Enabled Optimal Default, Failsafe Default Enable/Disabled this panel. LVDS Panel Type 640x480,18bit,60Hz 800x480,18bit,60Hz 800x600,18bit,60Hz 1024x600,18bit,60Hz 1024x768,18bit,60Hz 1024x768,24bit,60Hz Optimal Default, Failsafe Default 1280x768,24bit,60Hz 1280x1024,48bit,60Hz 1366x768,24bit,60Hz 1440x900,48bit,60Hz 1600x1200,48bit,60Hz 1920x1080,48bit,60Hz Chapter 3 – AMI BIOS Setup...
  • Page 85: Cpu Configuration

    Options Summary LVDS Panel Type (Cont.) 1920x1200,48bit,60Hz Select LCD panel used by Internal Graphics Device by selecting the appropriate setup item. Color Depth 18-bit Optimal Default, Failsafe Default 24-bit 36-bit 48-bit Select panel type Backlight Mode BIOS & Application Windows Slider Optimal Default, Failsafe Default Select backlight control signal type 3.4.3...
  • Page 86 Options Summary Intel (VMX) Virtualization Disabled Technology Enabled Optimal Default, Failsafe Default When enabled, a VMM can utilize the additional hardware capabilities provided by Vanderpool Technology. Hyper-Threading Disabled Enabled Optimal Default, Failsafe Default Enable or Disable Hyper-Threading Technology. Intel® SpeedStep™ Disabled Enabled Optimal Default, Failsafe Default...
  • Page 87: Memory Configuration

    Options Summary NPU Device (B0:D11:F0) Disabled Enabled Optimal Default, Failsafe Default Enable/Disable NPU (Neural Processing Unit) Device 3.4.4 Memory Configuration Chapter 3 – AMI BIOS Setup...
  • Page 88: Hardware Monitor

    3.4.5 Hardware Monitor Options Summary Smart Fan Disable Enable Optimal Default, Failsafe Default Enables or Disables Smart Fan. Chapter 3 – AMI BIOS Setup...
  • Page 89: Smart Fan Mode Configuration

    3.4.6 Smart Fan Mode Configuration Options Summary Fan 1 Smart Fan Control Manual Duty Mode Auto Duty-Cycle Mode Optimal Default, Failsafe Default Smart Fan Mode Select Temperature Source CPU Temperature Optimal Default, Failsafe Default System Temperature System Temperature 2 Select the monitored temperature source for this fan. Temperature 1 Duty Cycle 1 Auto fan speed control.
  • Page 90: Pch-Fw Configuration

    3.4.7 PCH-FW Configuration Options Summary TPM Device Selection dTPM Optimal Default, Failsafe Default Selects TPM device: PTT or discrete TPM. PTT - enables PTT in SkuMgr dTPM - disables PTT is SkuMgr Warning! PTT/dTPM will be disabled and all data saved on it will be lost. Chapter 3 –...
  • Page 91: Firmware Update Configuration

    3.4.8 Firmware Update Configuration Options Summary Me FW Image Re-Flash Enabled Disabled Optimal Default, Failsafe Default Enable/Disable Me FW Image Re-Flash function. FW Update Disabled Enabled Optimal Default, Failsafe Default Enable/Disable ME FW Update function. Chapter 3 – AMI BIOS Setup...
  • Page 92: Power Management

    3.4.9 Power Management Options Summary Power Mode ATX Type Optimal Default, Failsafe Default AT Type Select system power mode. Restore AC Power Loss Last State Optimal Default, Failsafe Default Always On Always Off Select power state when power is re-applied after a power failure. Power Saving(ERP) Control Disabled Optimal Default, Failsafe Default Enabled...
  • Page 93: Aaeon Bios Robot

    Options Summary By Date: System will wake on the with hr::min::sec specified./n By Weekday: System will wake on the enabled weekday with hr::min::sec specified./n Bypass: BIOS will not control RTC wake function. 3.4.10 AAEON BIOS Robot Options Summary Sends watch dog before Disabled Optimal Default, Failsafe Default BIOS POST...
  • Page 94 Options Summary Sends watch dog before Disabled Optimal Default, Failsafe Default booting OS Enabled Enabled - Robot set Watch Dog Timer (WDT) after POST completion, before BIOS transfer control to OS. WARNING: Before enabling this function, a program in OS must be in responsible for clearing WDT.
  • Page 95: Device Detecting Configuration

    3.4.11 Device Detecting Configuration Options Summary Action Reset System Optimal Default, Failsafe Default Hold System Select action that robot should do. Soft or hard reset Soft Optimal Default, Failsafe Default Hard Select reset type robot should send on each boot. Retry-Count Optimal Default, Failsafe Default Fill retry counter here.
  • Page 96: Device #1~#5 Detecting Configuration

    3.4.11.1 Device #1~#5 Detecting Configuration Options Summary Interface Disable Optimal Default, Failsafe Default SMBUS Legacy I/O Super I/O MMIO Select interface robot should use to communicate with device. Chapter 3 – AMI BIOS Setup...
  • Page 97: Setup Submenu: System I/O

    Setup Submenu: System I/O Chapter 3 – AMI BIOS Setup...
  • Page 98: Storage Configuration

    3.5.1 Storage Configuration Chapter 3 – AMI BIOS Setup...
  • Page 99: Nvme Configuration

    3.5.2 NVMe Configuration Chapter 3 – AMI BIOS Setup...
  • Page 100 Options Summary Self Test Option Short Optimal Default, Failsafe Default Extended Select either Short or Extended Self Test. Short option will take couple of minutes and extended option will take several minutes to complete. Self Test Action Controller Only Test Optimal Default, Failsafe Default Controller and NameSpace Test...
  • Page 101: Vmd Setup Menu

    3.5.3 VMD Setup Menu Options Summary Enable VMD Controller Disabled Optimal Default, Failsafe Default Enabled Enable/Disable to VMD Controller Chapter 3 – AMI BIOS Setup...
  • Page 102: Hd Audio Configuration

    3.5.4 HD Audio Configuration Chapter 3 – AMI BIOS Setup...
  • Page 103: Gpio Port Configuration

    3.5.5 GPIO Port Configuration Options Summary GPIO Port* Output Input Set GPIO as Input or Output Output Level High Set output level when GPIO pin is output Chapter 3 – AMI BIOS Setup...
  • Page 104: Legacy Devices Configuration

    3.5.6 Legacy Devices Configuration Chapter 3 – AMI BIOS Setup...
  • Page 105: Serial Port 1 Configuration

    3.5.6.1 Serial Port 1 Configuration Options Summary Use This Device Disable Enable Optimal Default, Failsafe Default Enable or Disable this Logical Device. Possible: Use Automatic Settings Optimal Default, Failsafe Default IO=3F8h; IRQ=4 IO=2F8h; IRQ=3 Allows user to change Device's Resource settings. New settings will be reflected on This Setup Page after System restarts.
  • Page 106: Serial Port 2 Configuration

    3.5.6.2 Serial Port 2 Configuration Options Summary Use This Device Disable Enable Optimal Default, Failsafe Default Enable or Disable this Logical Device. Possible: Use Automatic Settings Optimal Default, Failsafe Default IO=2F8h; IRQ=3 IO=3F8h; IRQ=4 Allows user to change Device's Resource settings. New settings will be reflected on This Setup Page after System restarts.
  • Page 107: Serial Port 3 Configuration

    3.5.6.3 Serial Port 3 Configuration Options Summary Use This Device Disable Enable Optimal Default, Failsafe Default Enable or Disable this Logical Device. Possible: Use Automatic Settings Optimal Default, Failsafe Default IO=3E8h; IRQ=5 IO=2E8h; IRQ=7 Allows user to change Device's Resource settings. New settings will be reflected on This Setup Page after System restarts.
  • Page 108: Serial Port 4 Configuration

    3.5.6.4 Serial Port 4 Configuration Options Summary Use This Device Disable Enable Optimal Default, Failsafe Default Enable or Disable this Logical Device. Possible: Use Automatic Settings Optimal Default, Failsafe Default IO=2E8h; IRQ=7 IO=3E8h; IRQ=5 Allows user to change Device's Resource settings. New settings will be reflected on This Setup Page after System restarts.
  • Page 109: Serial Port Console Redirection

    3.5.7 Serial Port Console Redirection Options Summary Console Redirection Disabled Optimal Default, Failsafe Default Enabled Console Redirection Enable or Disable. Console Redirection EMS Disabled Optimal Default, Failsafe Default Enabled Console Redirection Enable or Disable. Chapter 3 – AMI BIOS Setup...
  • Page 110: Setup Submenu: Security

    Setup Submenu: Security Change User/Supervisor Password You can install a Supervisor password, and if you install a supervisor password, you can then install a user password. A user password does not provide access to many of the features in the Setup utility. If you highlight these items and press Enter, a dialog box appears which lets you enter a password.
  • Page 111: Trusted Computing

    3.6.1 Trusted Computing Options Summary Security Device Support Enable Optimal Default, Failsafe Default Disable Enables or Disables BIOS support for security device. O.S. will not show Security Device. TCG EFI protocol and INT1A interface will not be available. SHA256 PCR Bank Enabled Optimal Default, Failsafe Default Disabled...
  • Page 112 Options Summary Platform Hierarchy Enabled Optimal Default, Failsafe Default Disabled Enable or Disable Platform Hierarchy Storage Hierarchy Enabled Optimal Default, Failsafe Default Disabled Enable or Disable Storage Hierarchy Endorsement Hierarchy Enabled Optimal Default, Failsafe Default Disabled Enable or Disable Endorsement Hierarchy Physical Presence Spec Optimal Default, Failsafe Default Version...
  • Page 113: Secure Boot

    3.6.2 Secure Boot Options Summary Secure Boot Disabled Optimal Default, Failsafe Default Enabled Secure Boot feature is Active if Secure Boot is Enabled, Platform Key(PK) is enrolled and the System is in User mode. The mode change requires platform reset Secure Boot Mode Custom Optimal Default, Failsafe Default...
  • Page 114: Expert Key Management

    3.6.3 Expert Key Management Options Summary Factory Key Provision Disabled Optimal Default, Failsafe Default Enabled Secure Boot feature is Active if Secure Boot is Enabled, Platform Key(PK) is enrolled and the System is in User mode. The mode change requires platform reset Restore Factory Keys Force System to User Mode.
  • Page 115 Options Summary Remove 'UEFI CA' from DB Device Guard ready system must not list 'Microsoft UEFI CA' Certificate in Authorized Signature database (db) Restore DB defaults Restore DB variable to factory defaults Platform Key(PK) Details Export Update Delete Key Exchange Keys Details Export Update...
  • Page 116: Setup Submenu: Boot

    Setup Submenu: Boot Options Summary Quiet Boot Disabled Enabled Optimal Default, Failsafe Default Enable or Disable Quiet Boot option. Network Stack Disabled Optimal Default, Failsafe Default Enabled Enable/Disable UEFI Network Stack. BOOT Option Priorities Sets the system boot order. Chapter 3 – AMI BIOS Setup...
  • Page 117: Bbs Priorities

    3.7.1 BBS Priorities Chapter 3 – AMI BIOS Setup...
  • Page 118 Chapter 3 – AMI BIOS Setup...
  • Page 119: Setup Submenu: Save & Exit

    Setup Submenu: Save & Exit Options Summary Save Changes and Reset Reset the system after saving the changes. Discard Changes and Exit Exit system setup without saving any changes. Restore Defaults Restore/Load Default values for all the setup options. Chapter 3 – AMI BIOS Setup...
  • Page 120: Setup Submenu: Mebx

    Setup Submenu: MEBx Options Summary Intel (R) AMT Disabled Enabled Optimal Default, Failsafe Default Enable or Disable Intel® AMT option. Change ME Password Change Password for entering MEBx Chapter 3 – AMI BIOS Setup...
  • Page 121: Intel(R) Amt Configuration

    3.9.1 Intel(R) AMT Configuration Options Summary Password Policy Default Password Only During Setup and Configuration Anytime Optimal Default, Failsafe Default Network Access State Network Active Network Inactive Optimal Default, Failsafe Default Full Unprovision Changes network state of ME. When disabling, it will also clear some other settings. Chapter 3 –...
  • Page 122: Redirection Features

    3.9.2 Redirection Features Options Summary Disabled Enabled Optimal Default, Failsafe Default Enable FW SOL Interface Storage Redirection Disabled Enabled Optimal Default, Failsafe Default Enable FW Remote – Storage Redirection. KVM Features Selection Disabled Enabled Optimal Default, Failsafe Default Enable FW KVM Feature. Chapter 3 –...
  • Page 123: User Consent

    3.9.3 User Consent Options Summary User Opt-in None Optimal Default, Failsafe Default Configure when User Consent Should be Required. Opt-in Configurable from Disabled Remote IT Enabled Optimal Default, Failsafe Default Enable/Disable Remote Change Capability of User Consent Feature Chapter 3 – AMI BIOS Setup...
  • Page 124: Network Setup

    3.9.4 Network Setup Chapter 3 – AMI BIOS Setup...
  • Page 125: Intel® Me Network Name Settings

    3.9.5 Intel® ME Network Name Settings Options Summary FQDN Computer’s FQDN Shared/Dedicated FQDN Dedicated Shared Optimal Default, Failsafe Default Chapter 3 – AMI BIOS Setup...
  • Page 126: Tcp/Ip Settings

    3.9.6 TCP/IP Settings Options Summary DHCP Mode Disabled Enabled Optimal Default, Failsafe Default Enable/Disable IPV4 DHCP Mode. Chapter 3 – AMI BIOS Setup...
  • Page 127: Remote Setup And Configuration

    3.9.7 Remote Setup and Configuration Options Summary Provisioning Server Address Provisioning server address. Either host name or IPv4 or IPv6 address. Provisioning Server Port number Provisioning server port number (0-65535) Remote Configuration ** Enabled Optimal Default, Failsafe Default Disabled Chapter 3 – AMI BIOS Setup...
  • Page 128: Power Control

    3.9.8 Power Control Options Summary ME ON in Host Sleep States Mobile: ON in S0 Mobile: ON in S0, ME Optimal Default, Failsafe Default Wake in S3, S4-5 (AC only) Idle Timeout Optimal Default, Failsafe Default Timeout Value (1-65535). Chapter 3 – AMI BIOS Setup...
  • Page 129: Chapter 4 - Driver Installation

    Chapter 4 Chapter 4 – Driver Installation...
  • Page 130: Driver Download/Installation

    Driver Download/Installation Drivers for the GENE-MTH6 can be downloaded from the product page on the AAEON website by following this link: https://www.aaeon.com/en/ Download the driver(s) you need and follow the steps below to install them. Chipset Driver Open the folder where you unzipped the Chipset Drivers. Run the SetupChipset.exe file in the folder.
  • Page 131 Install Intel® Ethernet Connection I219 Driver: Open the folder where you unzipped the LAN Drivers. Open the Device Manager by pressing Win + X and selecting "Device Manager." Find the network adapter that corresponds to Intel I219. It may be listed under "Network adapters."...
  • Page 132 Intel NPU Driver Open the Device Manager by pressing Win + X and selecting "Device Manager." Find the device that corresponds to the Intel NPU. It may be listed under "Processors," "System devices," or "Other devices." Right-click on the device and select "Update driver." Choose "Browse my computer for drivers."...
  • Page 133 Install Realtek Audio Driver Open the Windows Audio folder followed by Setup.exe Follow the instructions Drivers will be installed automatically Install Intel ME & TXE Driver Open the Intel CSME folder Open the SetupME.exe file Follow the instructions Drivers will be installed automatically Install Peripheral Driver Open the Peripheral Driver folder Open the SetupSerialIO.exe file...
  • Page 134: Appendix A - I/O Information

    Appendix A Appendix A - I/O Information...
  • Page 135: I/O Address Map

    I/O Address Map Appendix A – I/O Information...
  • Page 136 Appendix A – I/O Information...
  • Page 137: A.2 Memory Address Map

    A.2 Memory Address Map Appendix A – I/O Information...
  • Page 138 Appendix A – I/O Information...
  • Page 139: A.3 Large Memory

    A.3 Large Memory Appendix A – I/O Information...
  • Page 140: A.4 Irq Mapping Chart

    A.4 IRQ Mapping Chart Appendix A – I/O Information...
  • Page 141 Appendix A – I/O Information...
  • Page 142 Appendix A – I/O Information...
  • Page 143 Appendix A – I/O Information...
  • Page 144 Appendix B Appendix B – Mating Connectors and Cables...
  • Page 145: Appendix B - Mating Connectors And Cables

    Mating Connectors and Cables Mating Connector Mating Label Function Vendor Model no. Cable P/N Audio with detect Aces 50247-012H0H0-001 170X000156 SATA Power PHR-2 1702150155 Power 170204010R Front Panel SHR-10V-S-B 170X000603 SATA Molex 887505318 External +5VSB Power Input and PS_ON# XHP-3 170220020B CN12 USB 2.0 Port6 Molex...

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