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Summary of Contents for TQ TQMa95xxSA
- Page 1 TQMa95xxSA Preliminary User's Manual TQMa95xxSA UM 0001 21.10.2024...
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Page 2: Table Of Contents
Preliminary User's Manual l TQMa95xxSA UM 0001 l © 2024, TQ-Systems GmbH Page i TABLE OF CONTENTS ABOUT THIS MANUAL ....................................1 Copyright and license expenses ................................1 Registered trademarks ....................................1 Disclaimer ........................................1 Intended Use ........................................ 1 Imprint ..........................................2 Tips on safety ........................................ - Page 3 Preliminary User's Manual l TQMa95xxSA UM 0001 l © 2024, TQ-Systems GmbH Page ii Protection against external effects ..............................32 Thermal management .................................... 32 Structural requirements ..................................33 SOFTWARE ........................................33 SAFETY REQUIREMENTS AND PROTECTIVE REGULATIONS ......................34 EMC ..........................................34 ESD ..........................................
- Page 4 Preliminary User's Manual l TQMa95xxSA UM 0001 l © 2024, TQ-Systems GmbH Page iii TABLE DIRECTORY Table 1: Terms and conventions ..................................... 2 Table 2: Pinout SMARC connector X1 ................................10 Table 3: i.MX 95 derivatives ....................................13 Table 4: Boot sources ......................................
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Page 5: Revision History
Preliminary User's Manual l TQMa95xxSA UM 0001 l © 2024, TQ-Systems GmbH Page iv FIGURE DIRECTORY Figure 1: Block diagram i.MX 95 CPU ..................................5 Figure 2: Block diagram TQMa95xxSA ..................................7 Figure 3: SMARC interface with i.MX 95 ................................. 8 Figure 4: Block diagram Boot-Mode .................................. -
Page 6: About This Manual
PERSONAL INJURY, OR SEVERE PHYSICAL OR ENVIRONMENTAL DAMAGE. (COLLECTIVELY, "HIGH RISK APPLICATIONS") You understand and agree that your use of TQ products or devices as a component in your applications are solely at your own risk. To minimize the risks associated with your products, devices and applications, you should take appropriate operational and design related protective measures. -
Page 7: Imprint
Preliminary User's Manual l TQMa95xxSA UM 0001 l © 2024, TQ-Systems GmbH Page 2 Imprint TQ-Systems GmbH Gut Delling, Mühlstraße 2 D-82229 Seefeld Tel: +49 8153 9308–0 Fax: +49 8153 9308–4223 E-Mail: Info@TQ-Group Web: TQ-Group Tips on safety Improper or incorrect handling of the product can substantially reduce its life span. -
Page 8: Handling And Esd Tips
Handling and ESD tips General handling of your TQ-products The TQ-product may only be used and serviced by certified personnel who have taken note of the information, the safety regulations in this document and all related rules and regulations. A general rule is not to touch the TQ-product during operation. This is especially important when switching on, changing jumper settings or connecting other devices without ensuring beforehand that the power supply of the system has been switched off. - Page 9 Preliminary User's Manual l TQMa95xxSA UM 0001 l © 2024, TQ-Systems GmbH Page 4 The following documents are required to fully comprehend the following contents: • MB-SMARC-2 circuit diagram • MB-SMARC-2 User’s Manual • i.MX 95 Data Sheet • i.MX 95 Reference Manual •...
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Page 10: Brief Description
This Preliminary User's Manual describes the hardware of TQMa95xxSA revision 01xx in combination with the MB-SMARC-2 and refers to some software settings. The MB-SMARC-2 serves as an evaluation board for the TQMa95xxSA. A certain TQMa95xxSA derivative does not necessarily provide all features described in this Preliminary User's Manual. This Preliminary User's Manual does also not replace the NXP i.MX 95 Reference Manual (2). -
Page 11: Key Functions And Characteristics
A suitable i.MX 95 derivative can be selected for each requirement. The signals are routed to the card edge connector according to SMARC 2.1 standard. All essential components like CPU, LPDDR5 SDRAM, eMMC and power management are already integrated on the TQMa95xxSA. The main features of the TQMa95xxSA are: •... -
Page 12: Electronics
Preliminary User's Manual l TQMa95xxSA UM 0001 l © 2024, TQ-Systems GmbH Page 7 ELECTRONICS The information provided in this Preliminary User's Manual is only valid in connection with the tailored boot loader, which is preinstalled on the TQMa95xxSA and the BSP provided by TQ-Systems GmbH, see also section 5. -
Page 13: Interfaces To Other Systems And Devices
Interfaces to other systems and devices The TQMa95xxSA has a SMARC pin strip with a total of 314 pins, divided between the top and bottom side of the board, via which it is connected to the baseboard. Furthermore, the module has four holes with which it can be fixed to the carrier board by means of screws. -
Page 14: Pin Multiplexing
Preliminary User's Manual l TQMa95xxSA UM 0001 l © 2024, TQ-Systems GmbH Page 9 Pin multiplexing When using the CPU signals, the multiple pin configurations by different CPU-internal function units must be taken note of. The pin assignment listed in Table 2 refers to the corresponding... -
Page 15: Smarc Connector X1
Preliminary User's Manual l TQMa95xxSA UM 0001 l © 2024, TQ-Systems GmbH Page 10 SMARC connector X1 Table 2: Pinout SMARC connector X1 Ball Dir. Level Group SMARC signal SMARC signal Group Level Dir. Ball CSI1_TX+ / I2C_CAM1_CK CSI1 1.8 V –... - Page 16 Preliminary User's Manual l TQMa95xxSA UM 0001 l © 2024, TQ-Systems GmbH Page 11 3.1.2 SMARC connector X1 (continued) Table 2: Pinout SMARC connector X1 (continued) Ball Dir. Level Group Signal Signal Group Level Dir. Ball AJ41 1.8 V eSPI...
- Page 17 Preliminary User's Manual l TQMa95xxSA UM 0001 l © 2024, TQ-Systems GmbH Page 12 3.1.2 SMARC connector X1 (continued) Table 2: Pinout SMARC connector X1 (continued) Ball Dir. Level Group Signal Signal Group Level Dir. Ball HDMI_CTRL_DAT / DP1_AUX- LCD1_BKLT_EN LVDS1 1.8 V...
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Page 18: I.mx 95 Cpu
Preliminary User's Manual l TQMa95xxSA UM 0001 l © 2024, TQ-Systems GmbH Page 13 i.MX 95 CPU 3.4.1 i.MX 95 derivatives Depending on the TQMa95xxSA version, one of the following i.MX 95 derivatives is assembled. Table 3: i.MX 95 derivatives ® ®... -
Page 19: Memory
When designing a carrier board, it is recommended to have a redundant update concept for field software updates. Memory LPDDR5-RAM with a memory width of 32 bits is used on the TQMa95xxSA. The i.MX 95 supports Inline ECC. The LPDDR memory interface has the following basic parameters: Table 5: Parameter RAM interface Parameter i.MX 95... -
Page 20: Emmc
The standard NOR flash is Winbond W25Q512NWBIQ (64 MByte). EEPROM The TQMa95xxSA has two EEPROMs, one customer specific and one SMARC specific. Both are connected to the I2C_GP bus of the TQMa95xxSA and are supplied with 1.8 V. C address of the SMARC-specific EEPROM is set to 0x50 according to the specification. Information about the module The I configuration can be found at this address. -
Page 21: Optional Rtc Pcf85063
3.12 Optional RTC PCF85063 In addition to the i.MX 95 internal RTC, TQMa95xxSA variants with discrete RTC at I2C_GP are available. It is recommended to use the RTC PCF85063 due to the lower current consumption during standby modes. Unlike the temperature sensor, its interrupt signal is routed directly to a CPU pin. This means that the CPU can be woken up directly by the RTC from any standby mode. -
Page 22: Usb
Preliminary User's Manual l TQMa95xxSA UM 0001 l © 2024, TQ-Systems GmbH Page 17 i.MX 95 SMARC pins 220nF ETH_TX0 PCIE_C_TX / SERDES_1_TX ETH_RX0 PCIE_C_RX / SERDES_1_RX ETH_REF_PAD_CLK PCIE_C_REFCK ENET1_MDIO MDIO ENET2_MDIO PCIE_D_TX / SERDES_0_TX PCIE_D_RX / SERDES_0_RX Figure 8: Block diagram 10G Ethernet 3.16... -
Page 23: Dsi / Displayport
Preliminary User's Manual l TQMa95xxSA UM 0001 l © 2024, TQ-Systems GmbH Page 18 i.MX 95 SMARC pins LVDS0_D[3:0] LVDS0_[3:0] LVDS0_CLK LVDS0_CK LVDS1_D[3:0] LVDS1_[3:0] LVDS1_CLK LVDS1_CK GPIO_IO[05:04] TPM[4:3]_CH0 LCD[1:0]_BLKT_PWM GPIO_IO[03:02] I2C6 I2C_LCD Port expander GPIOs LCD[1:0]_VDD_EN GPIOs LCD[1:0]_BLKT_EN Figure 10: Block diagram LVDS 3.18... -
Page 24: Camera Serial Interface (Csi)
Preliminary User's Manual l TQMa95xxSA UM 0001 l © 2024, TQ-Systems GmbH Page 19 3.19 Camera Serial Interface (CSI) The CPU provides up to two CSI interfaces, one of which can also be used as a DSI interface and is therefore primarily intended for connecting the DisplayPort bridge (see previous chapter). -
Page 25: Spi
Preliminary User's Manual l TQMa95xxSA UM 0001 l © 2024, TQ-Systems GmbH Page 20 3.22 For the SPI0 interface of the SMARC pins, GPIO balls of the i.MX 95 are used. Two chip select signals are provided. i.MX 95 SMARC pins... -
Page 26: Can Bus
PCIE_C and PCIE_D of the SMARC pins are not assigned to PCIe. Due to the internal CPU circuitry, the clock must be supplied from an external source. For this reason, a PCIe clock generator is provided on the TQMa95xxSA. This is connected via I2C and can control each channel separately. -
Page 27: I 2 C
Preliminary User's Manual l TQMa95xxSA UM 0001 l © 2024, TQ-Systems GmbH Page 22 3.27 The I C interfaces of the i.MX 95 are provided at the SMARC connector as follows: Table 7: C interface SMARC pins i.MX 95 interface... -
Page 28: Gpio
Preliminary User's Manual l TQMa95xxSA UM 0001 l © 2024, TQ-Systems GmbH Page 23 3.28 GPIO The SMARC standard specifies a total of 14 GPIOs. The standard recommends to use GPIO0...5 preferably as output and GPIO6...13 preferably as input. The i.MX 95 GPIOs can be used in both directions. -
Page 29: Jtag
Trust Secure Element Depending on the module variant, a Trust Secure Element (TSE) is available on the TQMa95xxSA. This is connected to the I2C_GP bus (address: 0x48). The selected chip SE050 from NXP provides additional smartcard interfaces according to ISO14443 and ISO7816 besides the I2C interface. -
Page 30: Unused Cpu Signals
Preliminary User's Manual l TQMa95xxSA UM 0001 l © 2024, TQ-Systems GmbH Page 25 If the SE050 is equipped as an option, but no ISO14443 and ISO7816 devices are to be operated, the signals on the motherboard are to be wired as follows:... -
Page 31: Power
The SMARC specification specifies a power supply range of 3.0 V to 5.25 V, although this can be further restricted (e.g. to a fixed 3.3 V (3.1 V to 3.4 V)). All supply voltages required by the CPU and the module components are generated by the TQMa95xxSA. -
Page 32: Voltage Monitoring
Power-up sequence TQMa95xxSA / carrier board Since the TQMa95xxSA can be operated with a supply voltage of 3.0 V to 5.25 V and all voltages of the CPU signals are generated on the TQMa95xxSA, there are requirements for the mainboard design concerning the timing behavior of the voltages generated on the mainboard. -
Page 33: Pmic
PF090x. Attention: Malfunction or destruction Improper PMIC programming may cause the i.MX 95 or other peripherals on the TQMa95xxSA to operate outside their specification. This can lead to malfunction, deterioration or destruction of the TQMa95xxSA. -
Page 34: Management Signals
Preliminary User's Manual l TQMa95xxSA UM 0001 l © 2024, TQ-Systems GmbH Page 29 3.34 Management Signals The SMARC standard provides a large number of control signals. The following table shows an overview of the management signals used in accordance with the SMARC standard. -
Page 35: Mechanics
Preliminary User's Manual l TQMa95xxSA UM 0001 l © 2024, TQ-Systems GmbH Page 30 MECHANICS Connector The TQMa95xxSA is connected to the carrier board through 314 PCB contacts. The following table shows some suitable mating connectors for the carrier board. -
Page 36: Component Placement
Preliminary User's Manual l TQMa95xxSA UM 0001 l © 2024, TQ-Systems GmbH Page 31 Figure 26: TQMa95xxSA heights with heatspreader Table 15: Heights Property Value Tolerance Unit Remark 1.55 ±0.15 Board to board distance 1.127 ±0.113 Printed circuit board thickness 2.10... -
Page 37: Adaptation To The Environment
Thermal management To cool the TQMa95xxSA, a maximum of approximately TBD watts must be dissipated, see Table TBD for peak currents. The cooling solution must be able to dissipate this power peak; it will never occur permanently in normal operation. -
Page 38: Structural Requirements
TQMa95xxSA and thus malfunction, deterioration or destruction. Structural requirements The TQMa95xxSA has a low retention force and has to be mounted / secured according to customer requirements. The superior system is defined by the customer depending on the usage of the TQMa95xxSA. -
Page 39: Safety Requirements And Protective Regulations
The operating temperature range for the TQMa95xxSA strongly depends on the installation situation (heat dissipation by heat conduction and convection); hence, no fixed value can be given for the TQMa95xxSA. The TQMa95xxSA is available in three different variants with different temperature ranges. In general, a reliable operation is given when following conditions are met:... -
Page 40: Reliability And Service Life
TQ. TQ is not liable for any delivery delays due to national or international export restrictions or for the inability to make a delivery as a result of those restrictions. -
Page 41: Environment Protection
By environmentally friendly processes, production equipment and products, we contribute to the protection of our environment. To be able to reuse the TQMa95xxSA, it is produced in such a way (a modular construction) that it can be easily repaired and disassembled. The energy consumption of the TQMa95xxSA is minimised by suitable measures. - Page 42 Preliminary User's Manual l TQMa95xxSA UM 0001 l © 2024, TQ-Systems GmbH Page 37 • Regulation with respect to the European Waste Directory as at 1.12.01 (Source of information: BGBl I 2001, 3379) This information is to be seen as notes. Tests or certifications were not carried out in this respect.
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Page 43: Appendix
Preliminary User's Manual l TQMa95xxSA UM 0001 l © 2024, TQ-Systems GmbH Page 38 APPENDIX Acronyms and definitions The following acronyms and abbreviations are used in this document: Table 18: Acronyms Acronym Meaning Analog/Digital Converter ® Advanced RISC Machine ASIL... - Page 44 Preliminary User's Manual l TQMa95xxSA UM 0001 l © 2024, TQ-Systems GmbH Page 39 Acronyms and definitions (continued) Table 18: Acronyms (continued) Acronym Meaning NAND Not-And Not-Or Open-drain On-The-Go One-Time Programmable Printed Circuit Board Peripheral Component Interconnect PCIe Peripheral Component Interconnect Express...
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Page 45: References
Preliminary User's Manual l TQMa95xxSA UM 0001 l © 2024, TQ-Systems GmbH Page 40 References Table 19: Further applicable documents Name Rev., Date Company i.MX 95 Industrial Application Processors Data Sheet Ref.1 Draft F, 06/2023 i.MX 95 Applications Processor ReferenceManual Rev. - Page 46 TQ-Systems GmbH Mühlstraße 2 l Gut Delling l 82229 Seefeld Info@TQ-Group TQ-Group...
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