Tektronix DC 501 Instruction Manual page 14

Theory
of
Operation—DC
501
R60
goes HI.
The
RBO
is
applied to the
D
input
(pin 12)
of
U263B
and
is
transferred to the output
when
the next
scan-clock
HI-to-LO transition occurs.
Thus
if
the
first digit
is
a zero, pin
5 of
U270
is
held
LO,
inhibiting
the
output
until
the
first
rton-zero digit
comes through the decoder.
When
the
first
non-zero
digit arrives,
the
outputs
of
U270
are
enabled and the
digit
is
displayed. Also, the
RBO
output
at
pin
4
is
set
HI,
removing
the
RBI from
pin
S and
allowing
all
succeeding digits
to
be displayed through the
TS,
sequence.
When
the scan gets past the decimal point
in
the display,
or
if
the display overflows,
any
zeroes
arriving at
the
decoder should
be
displayed.
This
is
achieved as follows;
TSg
is
inverted
by U267E
aitd
applied
through
OR
gate
U245B
as a
LO
at
the
direct-set
input of
U263B.
This holds
pin 5
of
U270
HI, preventing zero-blanking during the TSg,
TSg,
artd
TS^ time
slots.
The
location of the decimal point
in
the display
is
determined by
the
MEASUREMENT
INTERVAL
switch.
The
proper information
is
applied
via
the closed contacts of the switch
to
either
NAND
gate
U246A
or
U246B. Then
either
TSg
or
TS^
is
enabled to the
input of
OR
gate
U245B
via these
NAND
gates,
settii>g
U263B
to
the
rton-blank state at
the appropriate time.
In
the case
where
the counter overflows, the HI output from
U245A
is
applied to
U245B,
settiitg
U263B
to the
non-blank
state.
When
the front-panel
RESET
button
is
pushed,
RESET
goes
LO, overriding the output of
U263B, applying the
non-blank and lamp-test functions to
the decoder. This
causes
all
seven
segments
in
the display
LED
to
be
turned
on.
Input
and
Output
Data.
The
following
inputs
and
outputs are available via the plug-in connector to external
equipment. See
Fig.
1-1.
INT
SCAN
DISABLE:
A LO
applied to
this line disables
the
internal
scan clock.
EXT
SCAN:
Provides input for an external scan clock.
INT
SCAN CLOCK
OUT;
Provides
output for
the
internal
scan clock.
TS^:
A
LO
is
present
on
this
output
line in
the
TS^
state
DATA GOOD: A
HI
is
present
on
this
output line
when
a
new
reading
is
being transferred into
the storage register
latches.
OVERFLOW;
This
output
is
HI
when
the
count
overflows.
RESET:
This
is
a
dual-function input/outpul
line.
It
provides a
LO
output
during reset,
or can be
used
as
an
external reset input.
Data
Lines:
1,
2. 4.
8 provide
BCD
output,
serial
by
digit,
from
the
currently enabled storage-register latch.
Other
data lines
include a
LO when
the
MHz
light
is
on. and
a
LO when
the second decimal point
is lit.
Regulated
Power
Supplies
The
DC
501 operating
power
is
obtained
from the
power module mainframe and then electronically regulated
to
provide stable supplies of
4^15 volts,
+5
volts.
—5.2
volts,
and
—10
volts.
The
415-volt supply,
whose
active
device
is
U300, provides the reference for the
remaining
supplies.
Its
output
is
set to
exactly
415 V
by
adjustment
of
R305.
Integrated circuit
U320
regulates the
-*-5 volt
supply,
and
transistors
0330
and
0340
regulate the
—
5.2-volt
and
—10
volt
supplies respectively.
The
series-pass transistors
for
these supplies are located
in
the
mainframe, where they
can provide the proper heat
dissipation.
2-7