Advanced Chipset Features - MSI 915GLM-V User Manual

MSI Reminds You...
Change these settings only if you are familiar with the chipset.
DRAM Timing Selectable
Selects whether DRAM timing is controlled by the SPD (Serial Presence Detect) EEPROM
on the DRAM module. Setting to [Auto By SPD] enables DRAM timings and the following
related items to be determined by BIOS based on the configurations on the SPD.
Selecting [Manual] lets users configure the DRAM timings and the following related
items manually. Setting options: [Manual], [Auto By SPD], [Turbo], [Ultra].
CAS Latency Time
W hen the DRAM Timing Control is set to [Manual], this field is adjustable. The field
controls the CAS latency, which determines the timing delay before SDRAM starts a
read command after receiving it. Setting options: [2T], [2.5T], [3T]. [2T] increases
system performance while [3T] provides more stable system performance.
DRAM RAS# to CAS# Delay (tRCD)
W hen the DRAM Timing Control is set to [Manual], this field is adjustable. W hen
DRAM is refreshed, both rows and columns are addressed separately. This setup item
allows you to determine the timing of the transition from RAS (row address strobe) to
CAS (column address strobe). The less the clock cycles, the faster the DRAM
performance. Setting options: [2T] to [5T].

Advanced Chipset Features

BIOS Setup
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