Texas Instruments Stellaris LM3S9D96 User Manual
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Texas Instruments Stellaris LM3S9D96 User Manual

Texas Instruments Stellaris LM3S9D96 User Manual

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Stellaris® LM3S9D96 Development Kit
User 's Manual
DK-LM3S9D9 6-00
Co pyrigh t © 2 009– 201 1 Te xas In strumen ts

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Summary of Contents for Texas Instruments Stellaris LM3S9D96

  • Page 1 Stellaris® LM3S9D96 Development Kit User ’s Manual DK-LM3S9D9 6-00 Co pyrigh t © 2 009– 201 1 Te xas In strumen ts...
  • Page 2 Copyright Copyright © 2009–2011 Texas Instruments, Inc. All rights reserved. Stellaris and StellarisWare are registered trademarks of Texas Instruments. ARM and Thumb are registered trademarks, and Cortex is a trademark of ARM Limited. Other names and brands may be claimed as the property of others.

  • Page 3: Table Of Contents

    Stellaris® LM3S9D96 Development Kit User’s Manual Table of Contents Chapter 1: Overview ............................7 Features................................7 Development Kit Contents ..........................10 Block Diagram ..............................11 Development Board Specifications........................11 Chapter 2: Hardware Description........................13 Microcontroller Overview ..........................13 Jumpers and GPIO Assignments........................13 Clocking ................................
  • Page 4 SRAM................................54 Configuration PROM............................. 54 Configuration Pushbutton ..........................55 Test Port ............................... 55 Camera Connector............................55 5 V Power Pin ............................... 55 24-MHz Oscillator ............................55 External Peripheral Interface (EPI) Module ....................55 Using the Widget Interface ..........................55 Writing Your Own Stellaris Application ......................56 Memory Map..............................
  • Page 5 Stellaris® LM3S9D96 Development Kit User’s Manual List of Figures Figure 1-1. DK-LM3S9D96 Development Board ....................9 Figure 1-2. DK-LM3S9D96 Development Board Block Diagram ..............11 Figure 2-1. Factory Default Jumper Settings ....................14 Figure 4-1. ICD Interface Out Mode ........................ 23 Figure B-1.
  • Page 6 List of Tables Table 2-1. Board Features and Peripherals that are Disconnected in Factory Default Configuration .... 13 Table 2-2. USB-Related Signals........................15 Table 2-3. Hardware Debugging Configurations .................... 16 Table 2-4. Debug-Related Signals ......................... 17 Table 2-5. LCD-Related Signals........................18 Table 2-6.

  • Page 7: Chapter 1: Overview

    C H A P T E R 1 Overview The Stellaris® LM3S9D96 Development Board provides a platform for developing systems around the advanced capabilities of the LM3S9D96 ARM® Cortex™-M3-based microcontroller. The LM3S9D96 is a member of the Stellaris Firestorm-class microcontroller family. Firestorm-class devices include capabilities such as 80 MHz clock speeds, an External Peripheral Interface (EPI) and Audio I S interfaces.
  • Page 8 Develop using tools supporting Keil™ RealView® Microcontroller Development Kit (MDK-ARM), IAR Embedded Workbench, Sourcery CodeBench development tools, Code Red Technologies development tools, or Texas Instruments’ Code Composer Studio™ IDE Supported by StellarisWare® software including the graphics library, the USB library, and the...

  • Page 9: Figure 1-1. Dk-Lm3S9D96 Development Board

    Stellaris® LM3S9D96 Development Kit User’s Manual Figure 1-1. DK-LM3S9D96 Development Board Headphone Output 5 VDC supply input Audio Line Output Microphone Input USB Connector for Audio Line Input Debug and / or Power On- board JTAG / SWD CAN Bus Interface Debug Interface EPI Expansion Board USB connector with...

  • Page 10: Development Kit Contents

    IAR Embedded Workbench • Sourcery CodeBench development tools • Code Red Technologies development tools • Texas Instruments’ Code Composer Studio™ IDE – Complete documentation – Quickstart application source code – Stellaris® Firmware Development Package with example source code July 3, 2011...

  • Page 11: Block Diagram

    Stellaris® LM3S9D96 Development Kit User’s Manual Block Diagram Figure 1-2. DK-LM3S9D96 Development Board Block Diagram Development Board Specifications Board supply voltage: 4.75–5.25 Vdc from one of the following sources: – Debugger (ICDI) USB cable (connected to a PC) – USB Micro-B cable (connected to a PC) –...
  • Page 12 Overview Dimensions (excluding LCD panel): – 4.50” x 4.25” x 0.60” (LxWxH) with SDRAM board – 4.50” x 4.25” x 0.75” (LxWxH) with EPI breakout board Analog Reference: 3.0 V +/-0.2% RoHS status: Compliant NOTE: When the LM3S9D96 Development Board is used in USB Host mode, the host connector is capable of supplying power to the connected USB device.

  • Page 13: Chapter 2: Hardware Description

    Microcontroller Overview The Stellaris LM3S9D96 is an ARM Cortex-M3-based microcontroller with 512-KB flash memory, 80-MHz operation, Ethernet, USB, EPI, SAFERTOS™ in ROM, and a wide range of peripherals. See the LM3S9D96 Microcontroller Data Sheet (order number DS-LM3S9D96) for complete microcontroller details.

  • Page 14: Clocking

    Hardware Description The ICDI section of the board has a GND-GND jumper that serves no function other than to provide a convenient place to ‘park’ a spare jumper. This jumper may be reused as required. Figure 2-1. Factory Default Jumper Settings Clocking The development board uses a 16.0-MHz (Y2) crystal to complete the LM3S9D96 microcontroller's main internal clock circuit.

  • Page 15: Reset

    Stellaris® LM3S9D96 Development Kit User’s Manual Reset The RESETn signal into the LM3S9D96 microcontroller connects to the reset switch (SW2) and to the ICDI circuit for a debugger-controlled reset. External reset is asserted (active low) under any one of the three following conditions: Power-on reset (filtered by an R-C network) Reset push switch SW2 held down By the ICDI circuit (U12 FT2232, U13D 74LVC125A) when instructed by the debugger (this...

  • Page 16: Debugging

    Hardware Description more than 1 Amp, or if the switches’ thermal limits are exceeded by a device drawing more than 500 mA. USB0PFLT indicates the over-current status back to the microcontroller. The development board can be either a bus-powered USB device or self-powered USB device depending on the power-supply configuration jumpers.

  • Page 17: Virtual Com Port

    Virtual Com Port. The normal VCP connection to UART0 is interrupted when using SWO. Not all debuggers support SWO. See the Stellaris LM3S9D96 Microcontroller Data Sheet for additional information on the Trace Port Interface Unit (TPIU). Color QVGA LCD Touch Panel The development board features a TFT Liquid Crystal graphics display with 320 x 240 pixel resolution.

  • Page 18: Control Interface

    Hardware Description Wide temperature range White LED backlight Integrated RAM Resistive touch panel Control Interface The Color LCD module has a built-in controller IC with a multi-mode parallel interface. The development board uses an 8-bit 8080 type interface with GPIO Port D providing the data bus. Table 2-4 shows the LCD-related signals.

  • Page 19: I 2 S Audio

    Stellaris® LM3S9D96 Development Kit User’s Manual S Audio The LM3S9D96 development board has advanced audio capabilities using an I S-connected Audio TLV320AIC23 CODEC. The factory default configuration has Audio output (Line Out and/or Headphone output) enabled. Four additional I S signals are required for Audio input (Line Input and/or Microphone).
  • Page 20 Hardware Description July 3, 2011...

  • Page 21: Chapter 3: External Peripheral Interface (Epi)

    C H A P T E R 3 External Peripheral Interface (EPI) The External Peripheral Interface (EPI) is a high-speed 8/16/32-bit parallel bus for connecting external peripherals or memory without glue logic. Supported modes include SDRAM, SRAM, and Flash memories, as well as Host-bus and FIFO modes. The LM3S9D96 development kit includes an 8 MB SDRAM board in addition to an EPI break-out board.
  • Page 22 External Peripheral Interface (EPI) July 3, 2011...

  • Page 23: Chapter 4: Using The In-Circuit Debugger Interface

    C H A P T E R 4 Using the In-Circuit Debugger Interface The Stellaris® LM3S9D96 Development Kit can operate as an In-Circuit Debugger Interface (ICDI). ICDI acts as a USB to the JTAG/SWD adaptor, allowing debugging of any external target board that uses a Stellaris microcontroller.
  • Page 24 Using the In-Circuit Debugger Interface July 3, 2011...

  • Page 25: Appendix A: Schematics

    A P P E N D I X A Schematics This section contains the schematics for the DK-LM3S9D96 development board. Micro, EPI connector, USB, and Ethernet on page 26 LCD CAN, Serial Memory, and User I/O on page 27 Power Supplies on page 28 S Audio Expansion Board on page 29 EPI and SDRAM Expansion Boards on page 30 In-circuit Debug Interface (ICDI) on page 31...
  • Page 26 Schematic page 1 EPI Expansion Connector PE2/EPI24 PE2/EPI24 PE3/EPI25 PE3/EPI25 PD2/EPI20 PD2/EPI20 Stellaris Microcontroller PD3/EPI21 PD3/EPI21 PB4/ADC10/EPI23 USB On-the-Go PB4/ADC10/EPI23 PB5/EPI22 PG0/EPI13 PC4/EPI02 PB5/EPI22 PH6/EPI26 PG1/EPI14 PC5/EPI03 PH6/EPI26 PH7/EPI27 PH7/EPI27 PC6/EPI04 PA0/U0RX PA0/U0RX PB0/USB0ID PB0/USBID PH7/EPI27 USB Micro AB PJ0/EPI16 PC7/EPI05 PA1/U0TX PA1/U0TX...
  • Page 27 Schematic page 2 +3.3V +3.3V QVGA LCD Panel microSD Card Slot with touch interface +3.3V 8-bit 8080 mode SDCSn SD_CSn ILED- Reset MOSI N/C DATA2 LED_K MOSI ILED+ PA5/SSI0TX CS DATA3 RESETn JP10 DI CMD LED_A SW-B3S1000 SCLK +3.3V SSICLK 2908-05WB-MG PA2/SSI0CLK CLOCK...
  • Page 28 Schematic page 3 3.3V +3.3V JP60 5.0V PQ1LA333MSPQ M+3.3V DBG+5V +VBUS VOUT ICDI JP61 JP34 2.2UF +5V DC INPUT 2.2UF JP35 0.01UF JP59 JP36 0.1UF PJ-002BH-SMT Main +3.3V Supply Power Source Selection +3.3V TPS2051BDBV +VBUS EPEN USB0EPE PA6/USBEPE/CAN0RX JP37 PFLT USB0PFLT PA7/USBPFLT/CAN0TX 2.2UF...
  • Page 29 Schematic page 4 Line Input 4.7K 0.47UF STX-3000 4.7K 0.47UF 4.7K 4.7K 27PF 27PF Microphone Input 4.7K 2.2UF STX-3000 27PF +3.3V +3.3V Audio Headphone Output 220UF 4.7K 4.7K STX-3000 PB3/I2C0SDA LLINEIN LHPOUT JP40 RLINEIN RHPOUT MICBIAS MICBIAS MICIN PB2/I2C0SCL MICIN 220UF JP41 TXSD...
  • Page 30 Schematic page 5 SDRAM Expansion Board 8MB SDRAM Expansion Connector BA0/D13 BA1/D14 AD10 DQM0 AD11 AD10 DQ10 AD11 DQ11 BA0/D13 DQ12 SDCKE BA1/D14 BA0/D13 DQ13 BA1/D14 DQ14 +3.3V DQ15 RASn RASn CASn SDCLK 2.2UF CASn SDCLK DQM1 SDCKE DQM1 DQMH DQM0 DQML +3.3V...
  • Page 31 Schematic page 6 Debugger USB Interface U14D SN74LVC125A 54819-0572 U13A USBSH SN74LVC125A +3.3V USB Device Controller DBG+5V U14C SN74LVC125A FT_TCK ADBUS0 FT_TDI/DI 3V3OUT ADBUS1 FT_TDO/DO ADBUS2 0.1UF FT_TMS/OUTEN R41 27 ADBUS3 U13B USBDM ADBUS4 SN74LVC125A FT_SRSTN R42 27 ADBUS5 0.01UF DBGENn TMS_SWDIO USBDP...
  • Page 32 Schematics July 3, 2011...

  • Page 33: Appendix B: Component Locations

    A P P E N D I X B Component Locations This appendix contains details on component locations for the DK-LM3S9D96 development board, including: Component placement plot for top (Figure B-1) July 3, 2011...

  • Page 34: Figure B-1. Component Placement Plot For Top

    Component Locations Figure B-1. Component Placement Plot for Top July 3, 2011...

  • Page 35: Appendix C: Connection Details

    A P P E N D I X C Connection Details This appendix contains the connection details for the DK-LM3S9D96 development board including the following sections: DC Power Jack (see page 35) ARM Target Pinout (see page 35) DC Power Jack The EVB provides a DC power jack for connecting an external +5 V regulated (+/-5%) power source.
  • Page 36 Connection Details July 3, 2011...

  • Page 37: Appendix D: Microcontroller Gpio Assignments

    A P P E N D I X D Microcontroller GPIO Assignments Table D-1 shows the pin assignments for the LM3S9D96 microcontroller. Table D-1. Microcontroller GPIO Assignments LM3S9D96 GPIO Pin Development Board Use Number Description Default Function Default Use Alt. Function Alternate Use U0Rx Virtual Com Port...
  • Page 38 Microcontroller GPIO Assignments Table D-1. Microcontroller GPIO Assignments (Continued) LM3S9D96 GPIO Pin Development Board Use Number Description Default Function Default Use Alt. Function Alternate Use LCD Data 1 I2S0RXWS I2S Audio In LCD Data 2 EPI0S20 EPI Breakout LCD Data 3 EPI0S21 EPI Breakout LCD Data 4...
  • Page 39 Stellaris® LM3S9D96 Development Kit User’s Manual Table D-1. Microcontroller GPIO Assignments (Continued) LM3S9D96 GPIO Pin Development Board Use Number Description Default Function Default Use Alt. Function Alternate Use EPI0S26 LCD_WRn EPI0S26 EPI Breakout EPI0S27 LCD_DC EPI0S27 EPI Breakout EPI0S16 SDRAM DQM EPI0S17 SDRAM DQM EPI0S18...
  • Page 40 Microcontroller GPIO Assignments July 3, 2011...

  • Page 41: Appendix E: Stellaris® Lm3S9B96 Flash And Sram Memory Expansion Board

    A P P E N D I X E Stellaris® LM3S9B96 Flash and SRAM Memory Expansion Board This document describes the Flash and SRAM memory expansion board (DK-LM3S9B96-EXP-FS8) plug-in for the Stellaris® LM3S9B96 and LM3S9D96 Development Boards. This expansion board works with the External Peripheral Interface (EPI) port of the Stellaris microcontroller and provides Flash memory, SRAM, and an improved performance LCD interface.

  • Page 42: Figure E-2. Removing Epi Board From Dk-Lm3S9D96 Development Board

    Stellaris® LM3S9B96 Flash and SRAM Memory Expansion Board 3. On the DK-LM3S9D96 board remove the shunt jumpers on JP16-JP31 and the JP39 headers as shown in Figure E-1 on page 41. Figure E-2. Removing EPI Board from DK-LM3S9D96 Development Board Remove board Remove jumpers 4.

  • Page 43: Hardware Description

    Stellaris® LM3S9D96 Development Kit User’s Manual Hardware Description The Flash and SRAM memory expansion board is designed for use with the Stellaris EPI module configured in Host Bus 8 address/data multiplexed mode. This mode requires the use of an external 8-bit latch for storing the lower 8 address lines A[7:0] transmitted during the address phase of an EPI transfer.
  • Page 44 Stellaris® LM3S9B96 Flash and SRAM Memory Expansion Board 8-bit Latch This 8-bit latch is used to store the lower 8-bits of the address, which are transmitted during the address phase of an EPI transfer. The EPI must be configured in Host bus 8 mode 0 mode (HB8 ADMUX), with EPI30 configured as an Address Latch Enable (ALE) signal to control this latch.

  • Page 45: Memory Map

    Stellaris® LM3S9D96 Development Kit User’s Manual Memory Map The DK-LM3S9B96-EXP-FS8 expansion board memory map is shown in Table E-1 and Table E-2 shows the LCD Latch register. Table E-1. Flash and SRAM Memory Expansion Board Memory Map Device A[27:26] A[2:0] Description Access Base address...

  • Page 46: Component Locations

    Stellaris® LM3S9B96 Flash and SRAM Memory Expansion Board Component Locations Figure E-4 shows the details of the component locations. Figure E-4. Component Placement Plot for Top and Bottom Bottom Schematics This section shows the schematics for the DK-LM3S9B96-EXP-FS8 memory expansion board: Flash, SRAM on page 48 LCD Interface on page 49 July 3, 2011...
  • Page 47 Stellaris® LM3S9D96 Development Kit User’s Manual July 3, 2011...
  • Page 48 Flash, SRAM Revision History MAD[7..0] Revision Date Description MA[27..0] EPI I/F 5/29/2009 Released for manufacturing. 3.3V FLASH 7/17/2009 Changed J2 to top entry, moved to bottom. Added R9-R11. MAD2 PC4/EPI2 PG0/EPI13 MA13 2.80k MAD3 PC5/EPI3 PG1/EPI14 MA14 MAD0 2.80k MAD4 PC6/EPI4 PH7/EPI27 MA27...
  • Page 49 LCD Interface MAD[7..0] MAD[7..0] MA[27..0] MA[27..0] L_D[7..0] LCD_DECODE CPLD MAD0 L_D0 A0/GOE0 MAD1 L_D1 F_RSTn MAD2 L_D2 MAD3 L_D3 MAD4 L_D4 MAD5 L_D5 MAD6 L_D6 MAD7 L_D7 L_BL MA24 L_DC L_XN MA25 L_RDn L_YP MA26 L_WRn L_YN MA27 L_YN L_XP L_XN L_D4 L_D4...
  • Page 50 Stellaris® LM3S9B96 Flash and SRAM Memory Expansion Board July 3, 2011...

  • Page 51: Appendix F: Stellaris® Lm3S9B96 Fpga Expansion Board

    A P P E N D I X F Stellaris® LM3S9B96 FPGA Expansion Board This chapter describes the Flash and SRAM memory expansion board for the Stellaris® LM3S9B96 and LM3S9D96 Development Boards.The Flash and SRAM memory expansion board provides a quick start platform to evaluate the capabilities of the Stellaris External Peripheral Interface (EPI) using the highly integrated DK-LM3S9D96 development platform.

  • Page 52: Installation

    Stellaris® LM3S9B96 FPGA Expansion Board Widget-based touchscreen user interface Screen capture to SDCard or USB stick in Windows bitmap (BMP) format Brightness, saturation, tint/hue, and sharpness picture controls Mirror/Flip/Normal Picture controls Installation To install the expansion board on the DK-LM3S9D96 development board, do the following: 1.

  • Page 53: Figure F-2. Removing Epi Board From Dk-Lm3S9D96 Development Board

    Stellaris® LM3S9D96 Development Kit User’s Manual Figure F-2. Removing EPI Board from DK-LM3S9D96 Development Board 5 V Power Remove board Remove POT/PB4 jumper Remove JP16-31 jumpers July 3, 2011...

  • Page 54: Hardware Description

    Stellaris® LM3S9B96 FPGA Expansion Board Hardware Description The Flash and SRAM memory expansion board is designed for use with the Stellaris EPI module. Figure F-3 shows a simplified system block diagram. Components of the default FPGA board are shown in half-tone outline. Figure F-3.

  • Page 55: Configuration Pushbutton

    Stellaris® LM3S9D96 Development Kit User’s Manual Configuration Pushbutton To reload the configuration PROM image to the FPGA, press the configuration pushbutton. This allows you to load a new image via JTAG without resetting the rest of the system. Test Port Eight uncommitted FPGA pins are brought to test pads.

  • Page 56: Writing Your Own Stellaris Application

    Stellaris® LM3S9B96 FPGA Expansion Board Writing Your Own Stellaris Application The Stellaris microcontroller communicates with the default FPGA image through a memory-mapped interface. To get started, you must first configure the EPI port by doing the following: 1. Configure the GPIO. 2.

  • Page 57: Register Descriptions

    Stellaris® LM3S9D96 Development Kit User’s Manual Table F-1. FPGA Expansion Board Memory Map (Continued) Register A[10:1] Size Register Name Access See Page VCRM [8:0] Video Capture Row Match [15:0] Video Memory Address Low [4:0] Video Memory Address High [11:0] Video Memory Stride [7:0] LCD Row Match LVML...

  • Page 58: Table F-2. Version Register

    Stellaris® LM3S9B96 FPGA Expansion Board Version Register The Version register communicates the revision numbers of the PCB, the FPGA RTL, and the Stellaris silicon. A dummy write of 0x0000 to this register determines if the Stellaris silicon is revision C (or higher) and configures the EPI clocking circuit appropriately. This is required during initialization for proper operation.

  • Page 59: Table F-4. Interrupt Enable Register

    Stellaris® LM3S9D96 Development Kit User’s Manual VCEN Video capture DMA enable. Enables video capture to memory. Disabling this bit captures the remainder of the current frame, and then stops. LVDEN LCD Video DMA enable. Enables DMA from the video memory region to the LCD. LGDEN LCD Graphics DMA enable.

  • Page 60: Table F-5. Interrupt Status Register

    Stellaris® LM3S9B96 FPGA Expansion Board VRMIE Video capture row match interrupt enable. LTSIE LCD transfer start interrupt enable. LTEIE LCD transfer end interrupt enable. LRMIE LCD display row match interrupt enable. Interrupt Status Register The Interrupt Status register reports and clears interrupts from the camera and LCD systems. An interrupt latches its corresponding bit high until cleared by writing a 1 to it.

  • Page 61: Table F-6. Test Pad Register

    Stellaris® LM3S9D96 Development Kit User’s Manual Test PadRegister The Test Pad register is used to access the on-board test pads TP1-TP8, which are connected to unused FPGA pins. Table F-6. Test Pad Register TXPAD: 0xA000.000A Bit Name Description TP1-TP3 Test Pins 1-3. These are connected to FPGA I/O pins. Writing a 1 sets the corresponding test pin output to 1.
  • Page 62 Stellaris® LM3S9B96 FPGA Expansion Board LCD panel touchscreen Y control. When set to 0, the LCD Yn signal is set to 0. When set to 1, the LCD Yn signal is tri-stated. LCD panel reset control. When set to 0, the LCD RSTn signal is set to 0. When set to 1 the LCD RSTn signal is set to 1.

  • Page 63: Loading A New Image To The Fpga

    Stellaris® LM3S9D96 Development Kit User’s Manual LCD Graphics Memory Address High Register The LGMH register provides a pointer to the start of graphics memory for output to the LCD and contains the higher 16-bits of the address. LCD Graphics Memory Stride Register The LGMS register specifies the number of bytes between the first pixels on adjacent rows in LCD graphics memory.

  • Page 64: Installing The Software

    Stellaris® LM3S9B96 FPGA Expansion Board Figure F-4. FPGA Boundary Scan NOTE: The DK-LM3S9B96-EXP-FS8 boots in JTAG mode, but transitions to serial mode once configured by the PROM. If your programmer is JTAG-only, you may need to clear the PROM and power cycle before you can directly program the FPGA via JTAG. This issue is rare since most tools support both modes.
  • Page 65 Stellaris® LM3S9D96 Development Kit User’s Manual Memory Windower The memory windower allows the Stellaris microcontroller to work with a rectangular portion of a frame buffer. For example, this can be used to pull macro-cells for JPEG compression. This is contained within the mport.v file. Memory Arbiter The memory arbiter negotiates access to the external SRAM.

  • Page 66: Epi Signal Descriptions

    Stellaris® LM3S9B96 FPGA Expansion Board EPI Signal Descriptions Table F-8 provides the EPI module’s signal descriptions. Table F-8. EPI Signal Descriptions EPI Signal Port FPGA Signal Direction Description EPIOS[31] EPI Clock EPIOS[30] E_IRQn Interrupt Signal to Microcontroller EPIOS[29] E_RD EPI Read Strobe EPIOS[28] E_WR EPI Write Strobe...

  • Page 67: Component Locations

    Stellaris® LM3S9D96 Development Kit User’s Manual Component Locations Figure F-5 shows the details of the component locations from the top view and Figure F-6 shows the details of the component locations from the bottom view. Figure F-5. Component Placement Plot for Top July 3, 2011...

  • Page 68: Schematics

    Stellaris® LM3S9B96 FPGA Expansion Board Figure F-6. Component Placement Plot for Bottom Schematics This section shows the schematics for the DK-LM3S9B96-FPGA memory expansion board: EPI, LCD, Camera I/F on page 70 SRAM, Power, JTAG on page 71 July 3, 2011...
  • Page 69 Stellaris® LM3S9D96 Development Kit User’s Manual July 3, 2011...
  • Page 70 EPI, LCD, Camera I/F 3.3V Revision History EPI[31..0] 2.80k Revision Date Description 2.80k EPI I/F EPI16 6/24/2009 Released for manufacturing. IO_L01P_0 EPI27 IO_L01N_0 EPI14 8/19/2009 Changed camera connector P1 to vertical connector. IO_L02P_0 EPI13 IO_L02N_0 EPI2 PC4/EPI2 PG0/EPI13 EPI13 EPI31 Board width increased by 110mils.
  • Page 71 SRAM, Power, JTAG 3.3V 2.5V VCCO_0 VCCAUX VCCO_0 VCCAUX MCS_n IO_L01P_3 VCCAUX 1.2V 0.1uF 0.1uF MAD0 IO_L01N_3 VCCO_1 VCCAUX MAD1 MA[20..0] IO_L02P_3 VCCO_1 MAD2 IO_L02N_3/VREF_3 VCCINT MAD3 IO_L03P_3 MAD[7..0] VCCO_3 VCCINT 0.1uF 0.1uF MWE_n 10uF IO_L03N_3 VCCO_3 VCCINT MA20 IO_L04P_3/LHCLK0 VCCINT MA18 IO_L04N_3/LHCLK1...
  • Page 72 Stellaris® LM3S9B96 FPGA Expansion Board July 3, 2011...

  • Page 73: Appendix G: Stellaris® Lm3S9B96 Em2 Expansion Board

    A P P E N D I X G Stellaris® LM3S9B96 EM2 Expansion Board This document describes the Stellaris EM2 Expansion Board (DK-LM3S9B96-EXP-FS8) for the Stellaris® LM3S9B96 and LM3S9D96 Development Boards. The Flash and SRAM memory expansion board provides a transition between the Stellaris External Peripheral Interface (EPI) connector and the RF Evaluation Module (EM) connector.

  • Page 74: Figure G-2. Removing Epi Board From Dk-Lm3S9D96 Development Board

    Stellaris® LM3S9B96 EM2 Expansion Board 1. On the DK-LM3S9D96 board (shown in Figure G-2 on page 74), remove any installed board on EPI connector J2 (A). 2. On the DK-LM3S9D96 board (shown in Figure G-2), confirm that shunt jumpers on JP16-JP31 are installed to enable the LCD touch screen.

  • Page 75: Figure G-3. Em2 Expansion Board

    Stellaris® LM3S9D96 Development Kit User’s Manual Figure G-3. EM2 Expansion Board Bottom side of EM2 module Male EPI expansion connector 4. Press firmly downward until the board snaps in place. Figure G-4. Assembled DK-LM3S9D96 Development Board with EM2 Expansion Board EM2 Expansion Board July 3, 2011...

  • Page 76: Installation Of Em Modules Onto The Em2 Expansion Board

    Stellaris® LM3S9B96 EM2 Expansion Board Installation of EM Modules onto the EM2 Expansion Board The Flash and SRAM memory expansion board has a primary EM header (MOD1) and a secondary EM header (MOD2) as indicated on the silk screen (see Figure G-5). The secondary EM header is rotated 180 degrees from the primary EM header.

  • Page 77: Figure G-6. Fully Assembled Dk-Lm3S9D96 Board With Em2 Expansion Board And Wireless Em Module

    Stellaris® LM3S9D96 Development Kit User’s Manual 4. Use a slight pressure to seat the EM module firmly on the Flash and SRAM memory expansion board. See Figure G-6 on page 77 for fully assembled DK-LM3S9D96 board with Flash and SRAM memory expansion board and wireless EM module. Figure G-6.

  • Page 78: Hardware Description

    Stellaris® LM3S9B96 EM2 Expansion Board Hardware Description The block diagram for the Flash and SRAM memory expansion board is shown in Figure G-7. Figure G-7. EM2 Expansion Board Block Diagram 32 KHZ Connector +3.3 V SDIO +3. 3 V MOD_I2C Header PRIMARY UART1...

  • Page 79: Secondary Em Header

    Stellaris® LM3S9D96 Development Kit User’s Manual The primary EM header contains one GPIO connection used to shut down and/or reset the EM module. The actual function depends on the EM module installed. The MODx_nSHUTD signal is pulled up to 3.3 V on the EM2 adapter. Each header has its own MODx_nSHUTD signal. The primary EM header contains additional features not found on the secondary EM header including a 32-KHz oscillator input and a header for a 4-bit SDIO module.
  • Page 80 Stellaris® LM3S9B96 EM2 Expansion Board Table G-1. EPI Signal Descriptions (Continued) LM3S9D96 Function Port EM2 Signal Direction Description SSI1TX SPI_MOSI SPI Transmit U1RX MOD_UART_TX Modulator UART TX, LM3S9D96 RX U1TX MOD_UART_RX Modulator UART RX, LM3S9D96 TX U1RTS MOD_UART_CTS Modulator UART CTS, LM3S9D96 RTS U1CTS MOD_UART_RTS Modulator UART RTS, LM3S9D96 CTS...

  • Page 81: Component Locations

    Stellaris® LM3S9D96 Development Kit User’s Manual Component Locations Figure G-8 shows the details of the component locations. Figure G-8. Component Placement Plot for Top and Bottom Bottom Schematics This section shows the schematics for the Flash and SRAM memory expansion board: EM2 Expansion Board on page 85 July 3, 2011...
  • Page 82 Stellaris® LM3S9B96 EM2 Expansion Board July 3, 2011...
  • Page 83 Stellaris® LM3S9D96 Development Kit User’s Manual July 3, 2011...
  • Page 84 Stellaris® LM3S9B96 EM2 Expansion Board July 3, 2011...
  • Page 85 EM2 Expansion Board Primary EM header +3.3V 32KHz clock for BT boards +3.3V CC-P1 CC-P1 CC-P2 CC-P2 +3.3V MOD1_SDIO_D0 RFMOD1_I2S RFMOD1_I2S RFMOD1_SDIO RFMOD1_SDIO MOD_UART_CTS INSTALL RESISTOR R7 WHEN 2nd MOD1_SDIO_D1 MOD1_AUD_ANA_L MOD1_AUD_CLK 32KHz Clock MODULE NEEDS SLOW CLK. MOD1_SDIO_CMD MOD_SLOWCLK MOD1_AUD_FSYNC MOD1_SDIO_CLK MOD1_SDIO_D2...
  • Page 86 Stellaris® LM3S9B96 EM2 Expansion Board July 3, 2011...

  • Page 87: Appendix H: References

    – RealView MDK web site, www.keil.com/arm/rvmdkkit.asp – IAR Embedded Workbench web site, www.iar.com – Sourcery CodeBench development tools web site, www.codesourcery.com/gnu_toolchains/arm – Code Red Technologies development tools web site, www.code-red-tech.com – Texas Instruments’ Code Composer Studio™ IDE web site, www.ti.com/ccs July 3, 2011...
  • Page 88 References July 3, 2011...
  • Page 89 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. Customers should obtain the latest relevant information before placing orders and should verify that such information is current and complete.

  • Page 90: Customer Service

    Authorized Distribution Brand： Website： Welcome to visit www.ameya360.com Contact Us： Address： 401 Building No.5, JiuGe Business Center, Lane 2301, Yishan Rd Minhang District, Shanghai , China Sales： Direct +86 (21) 6401-6692 Email amall@ameya360.com 800077892 Skype ameyasales1 ameyasales2 Customer Service： Email service@ameya360.com Partnership：...

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