Texas Instruments Stellaris LM3S9B96 User Manual
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Texas Instruments Stellaris LM3S9B96 User Manual

Texas Instruments Stellaris LM3S9B96 User Manual

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Stellaris® LM3S9B96 Development Kit
User 's Manual
DK-LM3S9B96 -05
Co pyrigh t © 2 009– 201 0 Te xas In strumen ts

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Summary of Contents for Texas Instruments Stellaris LM3S9B96

  • Page 1 Stellaris® LM3S9B96 Development Kit User ’s Manual DK-LM3S9B96 -05 Co pyrigh t © 2 009– 201 0 Te xas In strumen ts...
  • Page 2 Copyright Copyright © 2009–2010 Texas Instruments, Inc. All rights reserved. Stellaris and StellarisWare are registered trademarks of Texas Instruments. ARM and Thumb are registered trademarks, and Cortex is a trademark of ARM Limited. Other names and brands may be claimed as the property of others.

  • Page 3: Table Of Contents

    Stellaris® LM3S9B96 Development Kit User’s Manual Table of Contents Chapter 1: Stellaris® LM3S9B96 Development Board Overview ..............7 Features................................7 Development Kit Contents ..........................10 Block Diagram ..............................11 Development Board Specifications........................11 Chapter 2: Stellaris® LM3S9B96 Development Board Hardware Description .......... 13 LM3S9B96 Microcontroller Overview .......................
  • Page 4 SRAM................................52 Configuration PROM............................. 52 Configuration Pushbutton ..........................52 Test Port ............................... 53 Camera Connector............................53 5 V Power Pin ............................... 53 24-MHz Oscillator ............................53 External Peripheral Interface (EPI) Module ....................53 Using the Widget Interface ..........................53 Writing Your Own Stellaris Application ......................53 Memory Map..............................
  • Page 5 Stellaris® LM3S9B96 Development Kit User’s Manual List of Figures Figure 1-1. DK-LM3S9B96 Development Board....................9 Figure 1-2. DK-LM3S9B96 Development Board Block Diagram ..............11 Figure 2-1. Factory Default Jumper Settings ....................14 Figure 4-1. ICD Interface Out Mode ........................ 23 Figure B-1.
  • Page 6 List of Tables Table 2-1. Board Features and Peripherals that are Disconnected in Factory Default Configuration .... 13 Table 2-2. USB-Related Signals........................15 Table 2-3. Hardware Debugging Configurations .................... 16 Table 2-4. Debug-Related Signals ......................... 17 Table 2-5. LCD-Related Signals........................18 Table 2-6.

  • Page 7: Chapter 1: Stellaris® Lm3S9B96 Development Board Overview

    C H A P T E R 1 Stellaris® LM3S9B96 Development Board Overview The Stellaris® LM3S9B96 Development Board provides a platform for developing systems around the advanced capabilities of the LM3S9B96 ARM® Cortex™-M3-based microcontroller. The LM3S9B96 is a member of the Stellaris Tempest-class microcontroller family. Tempest-class devices include capabilities such as 80 MHz clock speeds, an External Peripheral Interface (EPI) and Audio I S interfaces.
  • Page 8 Develop using tools supporting Keil™ RealView® Microcontroller Development Kit (MDK-ARM), IAR Embedded Workbench, Code Sourcery GCC development tools, Code Red Technologies development tools, or Texas Instruments’ Code Composer Studio™ IDE Supported by StellarisWare® software including the graphics library, the USB library, and the...

  • Page 9: Figure 1-1. Dk-Lm3S9B96 Development Board

    Stellaris® LM3S9B96 Development Kit User’s Manual Figure 1-1. DK-LM3S9B96 Development Board Headphone Output 5 VDC supply input Audio Line Output Microphone Input USB Connector for Audio Line Input Debug and /or Power On-board JTAG /SWD CAN Bus Interface Debug Interface EPI Expansion Board USB connector with Reset switch...

  • Page 10: Development Kit Contents

    IAR Embedded Workbench • Code Sourcery GCC development tools • Code Red Technologies development tools • Texas Instruments’ Code Composer Studio™ IDE – Complete documentation – Quickstart application source code – Stellaris® Firmware Development Package with example source code September 5, 2010...

  • Page 11: Block Diagram

    Stellaris® LM3S9B96 Development Kit User’s Manual Block Diagram Figure 1-2. DK-LM3S9B96 Development Board Block Diagram I/O Signal Break-out I/O Signal Break-out JTAG/SWD Output/Input Touch QVGA Color LCD Module Debug Dual Debug USB Device Controller UART0 Switch micro-AB OTG/Host/Device Thumb connector wheel Stellaris Tempest-class...
  • Page 12 Dimensions (excluding LCD panel): – 4.50” x 4.25” x 0.60” (LxWxH) with SDRAM board – 4.50” x 4.25” x 0.75” (LxWxH) with EPI breakout board Analog Reference: 3.0 V +/-0.2% RoHS status: Compliant NOTE: When the LM3S9B96 Development Board is used in USB Host mode, the host connector is capable of supplying power to the connected USB device.

  • Page 13: Chapter 2: Stellaris® Lm3S9B96 Development Board Hardware Description

    LM3S9B96 Microcontroller Overview The Stellaris LM3S9B96 is an ARM Cortex-M3-based microcontroller with 256-KB flash memory, 80-MHz operation, Ethernet, USB, EPI, SAFERTOS™ in ROM, and a wide range of peripherals. See the LM3S9B96 Microcontroller Data Sheet (order number DS-LM3S9B96) for complete microcontroller details.

  • Page 14: Clocking

    assignments that are supported by the 0.1” jumpers and PCB routing. The LM3S9B96 has additional internal multiplexing that enables additional configurations which may require discrete wiring between peripherals and GPIO pins. The ICDI section of the board has a GND-GND jumper that serves no function other than to provide a convenient place to ‘park’...

  • Page 15: Reset

    Stellaris® LM3S9B96 Development Kit User’s Manual Reset The RESETn signal into the LM3S9B96 microcontroller connects to the reset switch (SW2) and to the ICDI circuit for a debugger-controlled reset. External reset is asserted (active low) under any one of the three following conditions: Power-on reset (filtered by an R-C network) Reset push switch SW2 held down By the ICDI circuit (U12 FT2232, U13D 74LVC125A) when instructed by the debugger (this...

  • Page 16: Debugging

    more than 1 Amp, or if the switches’ thermal limits are exceeded by a device drawing more than 500 mA. USB0PFLT indicates the over-current status back to the microcontroller. The development board can be either a bus-powered USB device or self-powered USB device depending on the power-supply configuration jumpers.

  • Page 17: Color Qvga Lcd Touch Panel

    Virtual Com Port. The normal VCP connection to UART0 is interrupted when using SWO. Not all debuggers support SWO. See the Stellaris LM3S9B96 Microcontroller Data Sheet for additional information on the Trace Port Interface Unit (TPIU). Color QVGA LCD Touch Panel The development board features a TFT Liquid Crystal graphics display with 320 x 240 pixel resolution.

  • Page 18: Table 2-5. Lcd-Related Signals

    Wide temperature range White LED backlight Integrated RAM Resistive touch panel Control Interface The Color LCD module has a built-in controller IC with a multi-mode parallel interface. The development board uses an 8-bit 8080 type interface with GPIO Port D providing the data bus. Table 2-4 shows the LCD-related signals.

  • Page 19: I 2 S Audio

    Stellaris® LM3S9B96 Development Kit User’s Manual S Audio The LM3S9B96 development board has advanced audio capabilities using an I S-connected Audio TLV320AIC23 CODEC. The factory default configuration has Audio output (Line Out and/or Headphone output) enabled. Four additional I S signals are required for Audio input (Line Input and/or Microphone).
  • Page 20 September 5, 2010...

  • Page 21: Chapter 3: Stellaris® Lm3S9B96 Development Board External Peripheral Interface (Epi)

    C H A P T E R 3 Stellaris® LM3S9B96 Development Board External Peripheral Interface (EPI) The External Peripheral Interface (EPI) is a high-speed 8/16/32-bit parallel bus for connecting external peripherals or memory without glue logic. Supported modes include SDRAM, SRAM, and Flash memories, as well as Host-bus and FIFO modes.
  • Page 22 September 5, 2010...

  • Page 23: Chapter 4: Using The In-Circuit Debugger Interface

    C H A P T E R 4 Using the In-Circuit Debugger Interface The Stellaris® LM3S9B96 Development Kit can operate as an In-Circuit Debugger Interface (ICDI). ICDI acts as a USB to the JTAG/SWD adaptor, allowing debugging of any external target board that uses a Stellaris microcontroller.
  • Page 24 September 5, 2010...

  • Page 25: Appendix A: Stellaris® Lm3S9B96 Development Board Schematics

    A P P E N D I X A Stellaris® LM3S9B96 Development Board Schematics This section contains the schematics for the DK-LM3S9B96 development board. Micro, EPI connector, USB, and Ethernet on page 26 LCD CAN, Serial Memory, and User I/O on page 27 Power Supplies on page 28 S Audio Expansion Board on page 29 EPI and SDRAM Expansion Boards on page 30...
  • Page 26 Schematic page 1 EPI Expansion Connector PE2/EPI24 PE2/EPI24 PE3/EPI25 PE3/EPI25 PD2/EPI20 PD2/EPI20 Stellaris Microcontroller PD3/EPI21 PD3/EPI21 PB4/ADC10/EPI23 USB On-the-Go PB4/ADC10/EPI23 PB5/EPI22 PG0/EPI13 PC4/EPI02 PB5/EPI22 PH6/EPI26 PG1/EPI14 PC5/EPI03 PH6/EPI26 PH7/EPI27 PH7/EPI27 PC6/EPI04 PA0/U0RX PA0/U0RX PB0/USB0ID PB0/USBID PH7/EPI27 USB Micro AB PJ0/EPI16 PC7/EPI05 PA1/U0TX PA1/U0TX...
  • Page 27 Schematic page 2 +3.3V +3.3V QVGA LCD Panel microSD Card Slot with touch interface +3.3V 8-bit 8080 mode SDCSn SD_CSn ILED- Reset MOSI N/C DATA2 LED_K MOSI ILED+ PA5/SSI0TX CS DATA3 RESETn JP10 DI CMD LED_A SW-B3S1000 SCLK +3.3V SSICLK 2908-05WB-MG PA2/SSI0CLK CLOCK...
  • Page 28 Schematic page 3 3.3V +3.3V JP60 5.0V PQ1LA333MSPQ M+3.3V DBG+5V +VBUS VOUT ICDI JP61 JP34 2.2UF +5V DC INPUT 2.2UF JP35 0.01UF JP59 JP36 0.1UF PJ-002BH-SMT Main +3.3V Supply Power Source Selection +3.3V TPS2051BDBV +VBUS EPEN USB0EPE PA6/USBEPE/CAN0RX JP37 PFLT USB0PFLT PA7/USBPFLT/CAN0TX 2.2UF...
  • Page 29 Schematic page 4 Line Input 4.7K 0.47UF STX-3000 4.7K 0.47UF 4.7K 4.7K 27PF 27PF Microphone Input 4.7K 2.2UF STX-3000 27PF +3.3V +3.3V Audio Headphone Output 220UF 4.7K 4.7K STX-3000 PB3/I2C0SDA LLINEIN LHPOUT JP40 RLINEIN RHPOUT MICBIAS MICBIAS MICIN PB2/I2C0SCL MICIN 220UF JP41 TXSD...
  • Page 30 Schematic page 5 SDRAM Expansion Board 8MB SDRAM Expansion Connector BA0/D13 BA1/D14 AD10 DQM0 AD11 AD10 DQ10 AD11 DQ11 BA0/D13 DQ12 SDCKE BA1/D14 BA0/D13 DQ13 BA1/D14 DQ14 +3.3V DQ15 RASn RASn CASn SDCLK 2.2UF CASn SDCLK DQM1 SDCKE DQM1 DQMH DQM0 DQML +3.3V...
  • Page 31 Schematic page 6 Debugger USB Interface U14D SN74LVC125A 54819-0572 U13A USBSH SN74LVC125A +3.3V USB Device Controller DBG+5V U14C SN74LVC125A FT_TCK ADBUS0 FT_TDI/DI 3V3OUT ADBUS1 FT_TDO/DO ADBUS2 0.1UF FT_TMS/OUTEN R41 27 ADBUS3 U13B USBDM ADBUS4 SN74LVC125A FT_SRSTN R42 27 ADBUS5 0.01UF DBGENn TMS_SWDIO USBDP...
  • Page 32 September 5, 2010...

  • Page 33: Appendix B: Stellaris® Lm3S9B96 Development Board Component Locations

    A P P E N D I X B Stellaris® LM3S9B96 Development Board Component Locations This appendix contains details on component locations, including: Component placement plot for top (Figure B-1) September 5, 2010...

  • Page 34: Figure B-1. Component Placement Plot For Top

    Figure B-1. Component Placement Plot for Top September 5, 2010...

  • Page 35: Appendix C: Stellaris® Lm3S9B96 Development Board Connection Details

    A P P E N D I X C Stellaris® LM3S9B96 Development Board Connection Details This appendix contains the following sections: DC Power Jack (see page 35) ARM Target Pinout (see page 35) DC Power Jack The EVB provides a DC power jack for connecting an external +5 V regulated (+/-5%) power source.
  • Page 36 September 5, 2010...

  • Page 37: Appendix D: Stellaris® Lm3S9B96 Development Board Microcontroller Gpio Assignments

    A P P E N D I X D Stellaris® LM3S9B96 Development Board Microcontroller GPIO Assignments Table D-1 shows the pin assignments for the LM3S9B96 microcontroller. Table D-1. Microcontroller GPIO Assignments LM3S9B96 GPIO Pin Development Board Use Number Description Default Function Default Use Alt.
  • Page 38 Table D-1. Microcontroller GPIO Assignments (Continued) LM3S9B96 GPIO Pin Development Board Use Number Description Default Function Default Use Alt. Function Alternate Use LCD Data 0 I2SRXSCK I2S Audio In LCD Data 1 I2S0RXWS I2S Audio In LCD Data 2 EPI0S20 EPI Breakout LCD Data 3 EPI0S21...
  • Page 39 Stellaris® LM3S9B96 Development Kit User’s Manual Table D-1. Microcontroller GPIO Assignments (Continued) LM3S9B96 GPIO Pin Development Board Use Number Description Default Function Default Use Alt. Function Alternate Use EPI0S11 SDRAM D11 EPI0S26 LCD_WRn EPI0S26 EPI Breakout EPI0S27 LCD_DC EPI0S27 EPI Breakout EPI0S16 SDRAM DQM EPI0S17...
  • Page 40 September 5, 2010...

  • Page 41: Appendix E: Stellaris® Lm3S9B96 Flash And Sram Memory Expansion Board

    A P P E N D I X E Stellaris® LM3S9B96 Flash and SRAM Memory Expansion Board This document describes the Flash and SRAM memory expansion board (DK-LM3S9B96-EXP-FS8) plug-in for the DK-LM3S9B96 development board. This expansion board works with the External Peripheral Interface (EPI) port of the Stellaris microcontroller and provides Flash memory, SRAM, and an improved performance LCD interface.

  • Page 42: Figure E-2. Removing Epi Board From Dk-Lm3S9B96 Development Board

    3. On the DK-LM3S9B96 board remove the shunt jumpers on JP16-JP31 and the JP39 headers as shown in Figure E-1 on page 41. Figure E-2. Removing EPI Board from DK-LM3S9B96 Development Board Remove board Remove jumpers 4. Install the two snap-in nylon standoffs on mounting holes above the EPI connector J2. 5.

  • Page 43: Hardware Description

    Stellaris® LM3S9B96 Development Kit User’s Manual Hardware Description The Flash and SRAM memory expansion board is designed for use with the Stellaris EPI module configured in Host Bus 8 address/data multiplexed mode. This mode requires the use of an external 8-bit latch for storing the lower 8 address lines A[7:0] transmitted during the address phase of an EPI transfer.
  • Page 44 8-bit Latch This 8-bit latch is used to store the lower 8-bits of the address, which are transmitted during the address phase of an EPI transfer. The EPI must be configured in Host bus 8 mode 0 mode (HB8 ADMUX), with EPI30 configured as an Address Latch Enable (ALE) signal to control this latch. Flash Memory The Flash memory used is a 64 Mbit, 90-nsec Spansion S29GL064N90TFI040.

  • Page 45: Memory Map

    Stellaris® LM3S9B96 Development Kit User’s Manual Memory Map The DK-LM3S9B96-EXP-FS8 expansion board memory map is shown in Table E-1 and Table E-2 shows the LCD Latch register. Table E-1. Flash and SRAM Memory Expansion Board Memory Map Device A[27:26] A[2:0] Description Access Base address...

  • Page 46: Component Locations

    Component Locations Figure E-4 shows the details of the component locations. Figure E-4. Component Placement Plot for Top and Bottom Bottom Schematics This section shows the schematics for the DK-LM3S9B96-EXP-FS8 memory expansion board: Flash, SRAM on page 47 LCD Interface on page 48 September 5, 2010...
  • Page 47 Flash, SRAM Revision History MAD[7..0] Revision Date Description MA[27..0] EPI I/F 5/29/2009 Released for manufacturing. 3.3V FLASH 7/17/2009 Changed J2 to top entry, moved to bottom. Added R9-R11. MAD2 PC4/EPI2 PG0/EPI13 MA13 2.80k MAD3 PC5/EPI3 PG1/EPI14 MA14 MAD0 2.80k MAD4 PC6/EPI4 PH7/EPI27 MA27...
  • Page 48 LCD Interface MAD[7..0] MAD[7..0] MA[27..0] MA[27..0] L_D[7..0] LCD_DECODE CPLD MAD0 L_D0 A0/GOE0 MAD1 L_D1 F_RSTn MAD2 L_D2 MAD3 L_D3 MAD4 L_D4 MAD5 L_D5 MAD6 L_D6 MAD7 L_D7 L_BL MA24 L_DC L_XN MA25 L_RDn L_YP MA26 L_WRn L_YN MA27 L_YN L_XP L_XN L_D4 L_D4...

  • Page 49: Appendix F: Stellaris® Lm3S9B96 Fpga Expansion Board

    A P P E N D I X F Stellaris® LM3S9B96 FPGA Expansion Board This chapter describes the FPGA expansion board for the DK-LM3S9B96 development board.The FPGA expansion board provides a quick start platform to evaluate the capabilities of the Stellaris External Peripheral Interface (EPI) using the highly integrated DK-LM3S9B96 development platform.

  • Page 50: Installation

    Widget-based touchscreen user interface Screen capture to SDCard or USB stick in Windows bitmap (BMP) format Brightness, saturation, tint/hue, and sharpness picture controls Mirror/Flip/Normal Picture controls Installation To install the expansion board on the DK-LM3S9B96 development board, do the following: 1.

  • Page 51: Figure F-2. Removing Epi Board From Dk-Lm3S9B96 Development Board

    Stellaris® LM3S9B96 Development Kit User’s Manual Figure F-2. Removing EPI Board from DK-LM3S9B96 Development Board 5 V Power Remove board Remove POT/PB4 jumper Remove JP16-31 jumpers September 5, 2010...

  • Page 52: Hardware Description

    Hardware Description The FPGA expansion board is designed for use with the Stellaris EPI module. Figure F-3 shows a simplified system block diagram. Components of the default FPGA board are shown in half-tone outline. Figure F-3. FPGA Expansion Board Block Diagram FPGA The FPGA expansion board features a Xilinx Spartan 3e FPGA, which interfaces to the Stellaris®...

  • Page 53: Test Port

    Stellaris® LM3S9B96 Development Kit User’s Manual Test Port Eight uncommitted FPGA pins are brought to test pads. Five of the FPGA pins can only be used as inputs. The remaining three FPGA pins can be used as inputs or outputs. Camera Connector The camera is hosted by the FPC Connector P1 located to the left of the FPGA.

  • Page 54: Memory Map

    EPIConfigGPModeSet(EPI0_BASE, (EPI_GPMODE_DSIZE_16 //16 Bit data | EPI_GPMODE_ASIZE_12 //12 Bit address | EPI_GPMODE_WORD_ACCESS //Use Word Access Mode | EPI_GPMODE_READWRITE //Use read and write strobe pins | EPI_GPMODE_READ2CYCLE //Reads take two cycles | EPI_GPMODE_CLKPIN //EPI outputs clock to peripheral | EPI_GPMODE_RDYEN ), //Peripheral emits a ready signal //Not using frame signal, so ignore //Not using clock enable, so ignore...

  • Page 55: Register Descriptions

    Stellaris® LM3S9B96 Development Kit User’s Manual Table F-1. FPGA Expansion Board Memory Map (Continued) Register A[10:1] Size Register Name Access See Page LGML [15:0] LCD Graphics Memory Address Low LGMH [4:0] LCD Graphics Memory Address High LGMS [11:0] LCD Graphics Memory Stride MPNC [9:0] Memory Port Number of Columns...

  • Page 56: Table F-3. System Control Register

    System Control Register The System Control register provides access to configuration bits for the video capture and display system. It is implemented as a read-modify-write register and includes LCD and capture modes. Table F-3. System Control Register SYSCTRL: 0xA000.0002 PCBrA VCTES VCQV VSCAL...

  • Page 57: Table F-4. Interrupt Enable Register

    Stellaris® LM3S9B96 Development Kit User’s Manual Interrupt Enable Register The Interrupt Enable register masks or enables interrupts from the FPGA to the Stellaris LM3S9B96 microcontroller. Masked interrupts will not assert the IRQ line, but they will still appear in the Interrupt Status Register. Table F-4.

  • Page 58: Table F-6. Test Pad Register

    VCFEI Video capture frame end interrupt. Clear the interrupt by setting the corresponding bit to 1. Setting the bit to 0 has no effect. VRMI Video capture row match interrupt. Clear the interrupt by setting the corresponding bit to 1. Setting the bit to 0 has no effect. LTSI LCD transfer start interrupt.

  • Page 59: Table F-7. Lcd Control Register

    Stellaris® LM3S9B96 Development Kit User’s Manual Table F-7. LCD Control Register LCDCTRL: 0xA000.0012 Bit Name Description LCD panel touchscreen X control. When set to 0, the LCD Xn signal is set to 0. When set to 1, the LCD Xn signal is tri-stated. LCD panel touchscreen Y control.
  • Page 60 LCD Video Memory Address Low Register The LVML register provides a pointer to the start of video data for transfer to the LCD. This contains the lower 16-bits of the address. LCD Video Memory Address High Register The LVMH register provides a pointer to the start of video data for transfer to the LCD. This contains the higher 16-bits of the address.

  • Page 61: Loading A New Image To The Fpga

    Stellaris® LM3S9B96 Development Kit User’s Manual Memory Port Register The MPORT register allows sequential video/graphics memory plane access. A write (read) to this port generates a memory write (read) to the memory location calculated as follows: Mem address = {MPH:MPL} + MPR x MPS + MPC. After the transfer, if the MPC is not at the last pixel of the row, it automatically increments by 1.

  • Page 62: Installing The Software

    Installing the Software To install the software, do the following: 1. Plug the provided cable into J4 (on the right side of the board), taking care to ensure proper alignment and orientation. The silk-screened signal names should match, with the exception that 2.5 V corresponds to VDD.

  • Page 63: Epi Signal Descriptions

    Stellaris® LM3S9B96 Development Kit User’s Manual EPI Signal Descriptions Table F-8 provides the EPI module’s signal descriptions. Table F-8. EPI Signal Descriptions EPI Signal Port FPGA Signal Direction Description EPIOS[31] EPI Clock EPIOS[30] E_IRQn Interrupt Signal to Microcontroller EPIOS[29] E_RD EPI Read Strobe EPIOS[28] E_WR...

  • Page 64: Component Locations

    Component Locations Figure F-5 shows the details of the component locations from the top view and Figure F-6 shows the details of the component locations from the bottom view. Figure F-5. Component Placement Plot for Top September 5, 2010...

  • Page 65: Schematics

    Stellaris® LM3S9B96 Development Kit User’s Manual Figure F-6. Component Placement Plot for Bottom Schematics This section shows the schematics for the LM3S9B96 FPGA memory expansion board: EPI, LCD, Camera I/F on page 66 SRAM, Power, JTAG on page 67 September 5, 2010...
  • Page 66 EPI, LCD, Camera I/F 3.3V Revision History EPI[31..0] 2.80k Revision Date Description 2.80k EPI I/F EPI16 6/24/2009 Released for manufacturing. IO_L01P_0 EPI27 IO_L01N_0 EPI14 8/19/2009 Changed camera connector P1 to vertical connector. IO_L02P_0 EPI13 IO_L02N_0 EPI2 PC4/EPI2 PG0/EPI13 EPI13 EPI31 Board width increased by 110mils.
  • Page 67 SRAM, Power, JTAG 3.3V 2.5V VCCO_0 VCCAUX VCCO_0 VCCAUX MCS_n IO_L01P_3 VCCAUX 1.2V 0.1uF 0.1uF MAD0 IO_L01N_3 VCCO_1 VCCAUX MAD1 MA[20..0] IO_L02P_3 VCCO_1 MAD2 IO_L02N_3/VREF_3 VCCINT MAD3 IO_L03P_3 MAD[7..0] VCCO_3 VCCINT 0.1uF 0.1uF MWE_n 10uF IO_L03N_3 VCCO_3 VCCINT MA20 IO_L04P_3/LHCLK0 VCCINT MA18 IO_L04N_3/LHCLK1...
  • Page 68 September 5, 2010...

  • Page 69: Appendix G: Stellaris® Lm3S9B96 Em2 Expansion Board

    A P P E N D I X G Stellaris® LM3S9B96 EM2 Expansion Board This document describes the Stellaris® LM3S9B96 EM2 Expansion Board (DK-LM3S9B96-EM2) for the DK-LM3S9B96 development board. The EM2 expansion board provides a transition between the Stellaris External Peripheral Interface (EPI) connector and the RF Evaluation Module (EM) connector.

  • Page 70: Figure G-2. Removing Epi Board From Dk-Lm3S9B96 Development Board

    2. On the DK-LM3S9B96 board (shown in Figure G-2), confirm that shunt jumpers on JP16-JP31 are installed to enable the LCD touch screen. JP39 (C), the leftmost jumper indicated, should remain uninstalled. Figure G-2. Removing EPI Board from DK-LM3S9B96 Development Board Remove board Leave JP39 Confirm shunt jumpers...

  • Page 71: Figure G-3. Em2 Expansion Board

    Stellaris® LM3S9B96 Development Kit User’s Manual Figure G-3. EM2 Expansion Board Bottom side of EM2 module Male EPI expansion connector 4. Press firmly downward until the board snaps in place. Figure G-4. Assembled DK-LM3S9B96 Development Board with EM2 Expansion Board EM2 Expansion Board September 5, 2010...

  • Page 72: Installation Of Em Modules Onto The Em2 Expansion Board

    Installation of EM Modules onto the EM2 Expansion Board The EM2 expansion board has a primary EM header (MOD1) and a secondary EM header (MOD2) as indicated on the silk screen (see Figure G-5). The secondary EM header is rotated 180 degrees from the primary EM header.

  • Page 73: Figure G-6. Fully Assembled Dk-Lm3S9B96 Board With Em2 Expansion Board And Wireless Em Module

    Stellaris® LM3S9B96 Development Kit User’s Manual 4. Use a slight pressure to seat the EM module firmly on the EM2 expansion board. See Figure G-6 on page 73 for fully assembled DK-LM3S9B96 board with EM2 expansion board and wireless EM module. Figure G-6.

  • Page 74: Hardware Description

    Hardware Description The block diagram for the EM2 expansion board is shown in Figure G-7. Figure G-7. EM2 Expansion Board Block Diagram 32 KHZ Connector +3.3 V SDIO +3. 3 V MOD_I2C Header PRIMARY UART1 UART Audio HEADER MOD1 SPI_CS Header (MOD1) SHUT...

  • Page 75: Secondary Em Header

    Stellaris® LM3S9B96 Development Kit User’s Manual The primary EM header contains one GPIO connection used to shut down and/or reset the EM module. The actual function depends on the EM module installed. The MODx_nSHUTD signal is pulled up to 3.3 V on the EM2 adapter. Each header has its own MODx_nSHUTD signal. The primary EM header contains additional features not found on the secondary EM header including a 32-KHz oscillator input and a header for a 4-bit SDIO module.
  • Page 76 Table G-1. EPI Signal Descriptions (Continued) LM3S9B96 Function Port EM2 Signal Direction Description SSI1TX SPI_MOSI SPI Transmit U1RX MOD_UART_TX Modulator UART TX, LM3S9B96 RX U1TX MOD_UART_RX Modulator UART RX, LM3S9B96 TX U1RTS MOD_UART_CTS Modulator UART CTS, LM3S9B96 RTS U1CTS MOD_UART_RTS Modulator UART RTS, LM3S9B96 CTS I2C1SCL MOD_I2C_SCL...

  • Page 77: Component Locations

    Stellaris® LM3S9B96 Development Kit User’s Manual Component Locations Figure G-8 shows the details of the component locations. Figure G-8. Component Placement Plot for Top and Bottom Bottom Schematics This section shows the schematics for the EM2 expansion board: EM2 Expansion Board on page 78 September 5, 2010...
  • Page 78 RFMOD1_ANALOG RFMOD1_ANALOG SPI_CLK MOD1_SDIO_CMD MOD1_AUD_CLK MOD1_AUD_ANA_R SPI_MOSI MOD_UART_RTS MOD1_AUD_ANA_L MOD1_nSHUTD +3.3V SPI_MISO MOD1_GPIO3 Header_1x4_100_430L Header_1x4_100_430L Stellaris LM3S9B96 EPI header +3.3V 2.7K 2.7K 2.7K 2.7K +3.3V Secondary EM header LM3S9B96 EPI Header LM3S9B96 EPI Header CC-P1 CC-P1 CC-P2 CC-P2 100K 100K +3.3V...

  • Page 79: Appendix H: References

    – RealView MDK web site, www.keil.com/arm/rvmdkkit.asp – IAR Embedded Workbench web site, www.iar.com – Code Sourcery GCC development tools web site, www.codesourcery.com/gnu_toolchains/arm – Code Red Technologies development tools web site, www.code-red-tech.com – Texas Instruments’ Code Composer Studio™ IDE web site, www.ti.com/ccs September 5, 2010...
  • Page 80 September 5, 2010...
  • Page 81 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. Customers should obtain the latest relevant information before placing orders and should verify that such information is current and complete.

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