Asus AAEON PICO-APL1-SEMI User Manual
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Asus AAEON PICO-APL1-SEMI User Manual

Asus AAEON PICO-APL1-SEMI User Manual

Pico-semi system
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PICO-APL1-SEMI
PICO-SEMI System
st
User's Manual 1
Ed
Last Updated: March 4, 2024

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Summary of Contents for Asus AAEON PICO-APL1-SEMI

  • Page 1 PICO-APL1-SEMI PICO-SEMI System User’s Manual 1 Last Updated: March 4, 2024...
  • Page 2 Copyright Notice This document is copyrighted, 2024. All rights are reserved. The original manufacturer reserves the right to make improvements to the products described in this manual at any time without notice. No part of this manual may be reproduced, copied, translated, or transmitted in any form or by any means without the prior written permission of the original manufacturer.
  • Page 3 Acknowledgement All other products’ name or trademarks are properties of their respective owners. Microsoft Windows® is a registered trademark of Microsoft Corp. ⚫ ITE is a trademark of Integrated Technology Express, Inc. ⚫ IBM, PC/AT, PS/2, and VGA are trademarks of International Business Machines ⚫...
  • Page 4 Packing List Before setting up your product, please make sure the following items have been shipped: Item Quantity PICO-APL1-SEMI ⚫ If any of these items are missing or damaged, please contact your distributor or sales representative immediately. Preface...
  • Page 5 About this Document This User’s Manual contains all the essential information, such as detailed descriptions and explanations on the product’s hardware and software features (if any), its specifications, dimensions, jumper/connector settings/definitions, and driver installation instructions (if any), to facilitate users in setting up their product. Users may refer to the product page at AAEON.com for the latest version of this document.
  • Page 6 Safety Precautions Please read the following safety instructions carefully. It is advised that you keep this manual for future references All cautions and warnings on the device should be noted. Make sure the power source matches the power rating of the device. Position the power cord so that people cannot step on it.
  • Page 7 If any of the following situations arises, please the contact our service personnel: Damaged power cord or plug Liquid intrusion to the device iii. Exposure to moisture Device is not working as expected or in a manner as described in this manual The device is dropped or damaged Any obvious signs of damage displayed on the device...
  • Page 8 FCC Statement This device complies with Part 15 FCC Rules. Operation is subject to the following two conditions: (1) this device may not cause harmful interference, and (2) this device must accept any interference received including interference that may cause undesired operation.
  • Page 9 China RoHS Requirements (CN) 产品中有毒有害物质或元素名称及含量 AAEON System QO4-381 Rev.A0 有毒有害物质或元素 部件名称 铅 汞 镉 六价铬 多溴联苯 多溴二苯 醚(PBDE) (Pb) (Hg) (Cd) (Cr(VI)) (PBB) 印刷电路板 × ○ ○ ○ ○ ○ 及其电子组件 外部信号 × ○ ○ ○ ○ ○ 连接器及线材 外壳 ○...
  • Page 10 China RoHS Requirement (EN) Hazardous and Toxic Materials List AAEON System QO4-381 Rev.A0 Hazardous or Toxic Materials or Elements Component Name PCB and Components Wires & Connectors for Ext.Connections Chassis CPU & RAM HDD Drive LCD Module Optical Drive Touch Control Module Battery This form is prepared in compliance with the provisions of SJ/T 11364.

  • Page 11: Table Of Contents

    Table of Contents Chapter 1 - Product Specifications..................1 Specifications ......................2 Function Block ......................5 Chapter 2 – Hardware Information ..................6 Dimensions ....................... 7 Jumpers and Connectors ..................11 List of Jumpers ......................13 2.3.1 Clear CMOS Jumper (JP1 Pins 1, 3, 5) ............. 13 2.3.2 Auto Power Button Mode Selection (JP1 Pins 2, 4, 6) ......
  • Page 12 2.6.1 Installation Steps ..................30 Chapter 3 - AMI BIOS Setup ....................35 System Test and Initialization ................36 AMI BIOS Setup ..................... 37 Setup Submenu: Main ..................38 Setup Submenu: Advanced ................. 39 3.4.1 CPU Configuration ..................40 3.4.2 SATA Configuration ..................41 3.4.3 Hardware Monitor ..................
  • Page 13 IRQ Mapping Chart ....................65 Appendix B – Mating Connectors ..................66 List of Mating Connectors and Cables .............. 67 Preface XIII...

  • Page 14: Chapter 1 - Product Specifications

    Chapter 1 Chapter 1 - Product Specifications...

  • Page 15: Specifications

    Specifications System Form Factor PICO-SEMI Intel® Celeron® Processor N3350 (2C/2T, 1.10 GHz, up to 2.40 GHz, TDP 6W) Chipset Integrated with Intel® SoC Memory Type DDR3L 1600MHz (Max 8GB)/1866MHz (Max 4GB), SODIMM x 1, Non-ECC* BIOS UEFI Wake on LAN Watchdog Timer 255 Levels Security...
  • Page 16 Display Controller Intel® HD Graphics 500/505 LVDS/eDP ━ Display Interface HDMI 1.4b x 1 (up to 3840 x 2160) Multiple Display ━ Audio Codec Realtek ALC897/892 (Optional) Audio Interface Line-out (Optional) Speaker ━ External I/O Ethernet Intel® Ethernet Controller I210 GbE, RJ-45 x 1 USB 3.2 Gen 1 x 2 Serial Port ━...
  • Page 17 External I/O ━ Front Panel HDD LED, PWR LED, Power Button, Buzzer, Reset Others ━ Expansion Mini PCI-E/mSATA Full-size mSATA/mPCIe x 1 (Default: mSATA, select with HW BOM) Half-size mPCIe x 1 ━ Others ━ Environment Operating Temperature 32°F ~ 122°F (0°C ~ 50°C) with 0.5 m/s airflow Storage Temperature -40°F ~ 185°F (-40°C ~ 85°C) Operating Humidity...

  • Page 18: Function Block

    Function Block Chapter 1 – Product Specifications...

  • Page 19: Chapter 2 - Hardware Information

    Chapter 2 Chapter 2 – Hardware Information...

  • Page 20: Dimensions

    Dimensions System Dimensions Chapter 2 – Hardware Information...
  • Page 21 Board Dimensions Com ponent Side >0 ¡Ó 0 .1 >10 ¡Ó 0 .2 >50 ¡Ó 0 .3 >200 ¡Ó 0 .5 >500 ¡Ó 0 .8 ANGLE TOL. ¡Ó 0 .5¢ X Chapter 2 – Hardware Information...
  • Page 22 Solder Side M ATERIAL: PART No. 1907APL102 >0 ¡Ó 0 .1 t=1.6m m SPEC.: DW G No. 1907APL102 >10 ¡Ó 0 .2 >50 ¡Ó 0 .3 NAM E PCB drawing FINISH: APPROVED CHECKED DESIGNED >200 ¡Ó 0 .5 >500 ¡Ó 0 .8 PICO-APL1 UNIT: M M M ODEL No.
  • Page 23 Rear I/O Configuration Chapter 2 – Hardware Information...

  • Page 24: Jumpers And Connectors

    Jumpers and Connectors Com ponent Side Chapter 2 – Hardware Information...
  • Page 25 ITEM DATE REM ARK Solder Side Solder Side 1907APL102 M ATERIAL: PART No. >0 ¡Ó 0 .1 t=1.6m m 1907APL102 SPEC.: DW G No. >10 ¡Ó 0 .2 >50 ¡Ó 0 .3 PCB drawing FINISH: APPROVED CHECKED DESIGNED NAM E >200 ¡Ó...

  • Page 26: List Of Jumpers

    List of Jumpers Please refer to the table below for all of the board’s jumpers that you can configure for your application Label Function JP1 (Pins 1, 3, 5) Clear CMOS Jumper JP1 (Pins 2, 4, 6) Auto Power Button Enable/Disable Selection 2.3.1 Clear CMOS Jumper (JP1 Pins 1, 3, 5) Normal (Default)

  • Page 27: List Of Connectors

    List of Connectors Please refer to the table below for all of the board’s connectors that you can configure for your application. Label Function Front Panel Mini Card Slot (Half-size) SPI Programming Header Mini Card Slot (Full-size)/mSATA (By BOM) SATA Port Battery CN11 USB 3.2 Gen 1 Port 1/Port 2...

  • Page 28: Front Panel (Cn3)

    2.4.1 Front Panel (CN3) Pin Name Pin Name PWR_BTN- PWR_BTN+ HDD_LED- HDD_LED+ BUZZER- BUZZER+ PWR_LED- PWR_LED+ H/W RESET- H/W RESET+ 2.4.2 Mini Card Slot (Half-size) (CN4) Pin Name Signal Type Signal Level PCIE_WAKE# +3.3VSB +3.3V +1.5V +1.5V PCIE_CLK_REQ# PCIE_REF_CLK- DIFF Chapter 2 –...
  • Page 29 Pin Name Signal Type Signal Level PCIE_REF_CLK+ DIFF W_DISABLE# +3.3V PCIE_RST# +3.3V PCIE_RX- DIFF +3.3VSB +3.3V PCIE_RX+ DIFF +1.5V +1.5V SMB_CLK +3.3V PCIE_TX- DIFF SMB_DATA +3.3V PCIE_TX+ DIFF USB_D- DIFF USB_D+ DIFF +3.3VSB +3.3V Chapter 2 – Hardware Information...

  • Page 30: Mini Card/Msata Slot (Full-Size) (Cn6)

    Pin Name Signal Type Signal Level +3.3VSB +3.3V +1.5V +1.5V +3.3VSB +3.3V 2.4.3 Mini Card/mSATA Slot (Full-size) (CN6) Pin Name Signal Type Signal Level PCIE_WAKE# +3.3VSB/+3.3V +3.3V +1.5V +1.5V PCIE_CLK_REQ# UIM_PWR UIM_DATA PCIE_REF_CLK- DIFF Chapter 2 – Hardware Information...
  • Page 31 Pin Name Signal Type Signal Level UIM_CLK PCIE_REF_CLK+ DIFF UIM_RST UIM_VPP W_DISABLE# +3.3V PCIE_RST# +3.3V PCIE_RX-/mSATARX+ DIFF +3.3VSB/+3.3V +3.3V PCIE_RX+/mSATARX- DIFF +1.5V +1.5V SMB_CLK +3.3V PCIE_TX-/mSATATX- DIFF SMB_DATA +3.3V PCIE_TX+/mSATATX+ DIFF USB_D- DIFF USB_D+ DIFF +3.3VSB/+3.3V +3.3V Chapter 2 – Hardware Information...

  • Page 32: Sata (Cn8)

    Pin Name Signal Type Signal Level +3.3VSB/+3.3V +3.3V +1.5V +1.5V +3.3VSB/+3.3V +3.3V 2.4.4 SATA (CN8) Pin Name Signal Type Signal Level SATA_TX1+ DIFF SATA_TX1- DIFF SATA_RX1- DIFF SATA_RX1+ DIFF Chapter 2 – Hardware Information...

  • Page 33: Battery (Cn9)

    2.4.5 Battery (CN9) Pin Name Signal Type Signal Level +3.3V 3.3V 2.4.6 USB 3.2 Gen 1 Port 1/2 (CN11) Pin Name Signal Type Signal Level +5VSB USB0_D- DIFF USB0_D+ DIFF USB0_SSRX− DIFF USB0_SSRX+ DIFF USB0_SSTX− DIFF USB0_SSTX+ DIFF +5VSB USB1_D- DIFF USB1_D+ DIFF...

  • Page 34: Output For Sata Hdd (Cn12)

    2.4.7 +5V Output for SATA HDD (CN12) Pin Name Signal Type Signal Level 2.4.8 HDMI Port (CN13) Pin Name Signal Type Signal Level TMDS_DAT2+ DIFF TMDS_DAT2- DIFF TMDS_DAT1+ DIFF TMDS_DAT1- DIFF TMDS_DAT0+ DIFF TMDS_DAT0- DIFF TMDS_CLK+ DIFF Chapter 2 – Hardware Information...

  • Page 35: External +12V Input (Cn14)

    Pin Name Signal Type Signal Level TMDS_CLK- DIFF DDC_CLK DDC_DATA HPLG_DETECT 2.4.9 External +12V Input (CN14) Pin Name Signal Type Signal Level +121V +12V 2.4.10 DDR3L SODIMM Slot (CN15) Standard specification. Chapter 2 – Hardware Information...

  • Page 36: Com Port 1/2 And Line-Out Connector (Cn17)

    2.4.11 COM Port 1/2 and Line-Out Connector (CN17) Pin Name Signal Type Signal Level DCDB DSRB RTSB ±9V ±9V CTSB DTRB ±9V RIB/+5V/+12V IN/ PWR +5V/+12V DCDA DSRA RTSA ±9V ±9V CTSA DTRA ±9V AGND LOUT_R LOUT_L Chapter 2 – Hardware Information...
  • Page 37 COM Port 2 (RS-485/422) RS-485 Pin Name Signal Type Signal Level RS485_D- ±5V RS485_D+ ±5V NC/+5V/+12V +5V/+12V RS-422 Pin Name Signal Type Signal Level RS422_TX- ±5V RS422_TX+ ±5V RS422_RX+ RS422_RX- NC/+5V/+12V +5V/+12V Note 1: COM 2 RS-232/422/485 can be set by BIOS setting. Default is RS-232. Note 2: COM 2 RI/+5V/+12V function can be set by BOM (R248-RI/ R256-+12V/ R250-+5V).

  • Page 38: Lpc Port (Cn18)

    2.4.12 LPC Port (CN18) Pin Name Signal Type Signal Level LAD0 +3.3V LAD1 +3.3V LAD2 +3.3V LAD3 +3.3V +3.3V +3.3V LFRAME# LRESET# +3.3V LCLK SMB_DATA [Default]/I2C_DATA +3.3V SMB_CLK [Default]/I2C_CLK +3.3V SMB_ALERT [Default]/INT_SERIRQ +3.3V Chapter 2 – Hardware Information...

  • Page 39: Usb 2.0 Port 1 (Cn19)

    2.4.13 USB 2.0 Port 1 (CN19) Pin Name Signal Type Signal Level +5VSB USBD5- DIFF USBD5+ DIFF Chapter 2 – Hardware Information...

  • Page 40: Lan Port (Cn20)

    2.4.14 RJ-45 LAN Port (CN20) Pin Name Signal Type Signal Level MDI0+ DIFF MDI0- DIFF MDI1+ DIFF MDI2+ DIFF MDI2- DIFF MDI1- DIFF MDI3+ DIFF MDI3- DIFF Chapter 2 – Hardware Information...

  • Page 41: Specifications For I/O Ports

    Specifications for I/O Ports Reference Signal Name Rate Output +3.3VSB +3.3V/1.1A Mini-Card Slot +1.5V +1.5V/0.375A +3.3VSB +3.3V/1.1A Mini-Card Slot +1.5V +1.5V/0.375A USB 3.2 Gen 1 Port 1 & 2 CN11 +5VSB +5VSB/1A (per channel) +5V Output for SATA CN12 +5V/1A COM Port 2 CN17 +5V/+12V...

  • Page 42: Installation Guide

    Installation Guide This section will guide you through the basic installation process for your new PICO-APL1-SEMI. For this process you will need a Phillips head screwdriver. PICO-APL1-SEMI component list: Item No. Description Remark/PN PICO-APL1 Board Top Chassis M1APL30010 Bottom Chassis M1APL30020 Heatsink TH0APL1010...

  • Page 43: Installation Steps

    2.6.1 Installation Steps Step 1: On the heatsink, remove the two plastic coverings as shown. Step 2: Place the top chassis onto the heatsink. Note the orientation of the chassis with the heatsink. Secure with four black screws. Step 3: On the PICO-APL1 board, remove the nut and washer from the power input port.
  • Page 44 Step 4: On the solder side of the PICO-APL1 board, install the memory RAM module. Insert at an angle (~30°) and then gently press down until it is secured. CN15 Step 5: To install M.2 storage module, remove the securing screw from the board’s component side.
  • Page 45 Step 7: Insert the PICO-APL1 board into the chassis assembly with the solder side toward the heatsink. DO NOT place the CMOS battery between the board and heatsink. Step 8: Check that the I/O ports are properly aligned. Secure board with four nickel screws.
  • Page 46 Step 9: Thread the power button cable through the hole for the power button. Plug the cable into the front panel connector (CN3). Note: The white dot indicates PIN 1 connector, make sure the connector is properly aligned. Next, gently push the power button in until it is secure (you will hear a ‘snap’).
  • Page 47 Step 11: Attach the bottom chassis by first lining up the right side, then swivel the chassis into place. Note: the bottom chassis does not slide directly on, it must swivel into place as shown in the figure. Step 12: Ensure the bottom chassis is properly lined up and attached. Use black screws to secure, two screws on the bottom and one screw on the left and right sides of the chassis.

  • Page 48: Chapter 3 - Ami Bios Setup

    Chapter 3 Chapter 3 - AMI BIOS Setup...

  • Page 49: System Test And Initialization

    System Test and Initialization The system uses certain routines to perform testing and initialization during the boot up sequence. If an error, fatal or non-fatal, is encountered, the system will output a few short beeps or display an error message. The system can usually continue the boot up sequence with non-fatal errors.

  • Page 50: Ami Bios Setup

    AMI BIOS Setup AMI BIOS ROM has a built-in Setup program that allows users to modify the basic system configuration. This type of information is stored in battery-backed CMOS RAM and BIOS NVRAM so that it retains the Setup information when the power is turned off. Entering Setup Power on the computer and press <Del>or <ESC>...

  • Page 51: Setup Submenu: Main

    Setup Submenu: Main Options Summary System Date Day MM:DD:YYYY Change the month, year and century. The ‘Day’ is changed automatically. System Time HH : MM : SS Change the clock of the system. Chapter 3 – AMI BIOS Setup...

  • Page 52: Setup Submenu: Advanced

    Setup Submenu: Advanced Options Summary CPU Configuration Menu for CPU Configuration Parameters. SATA Configuration Menu for SATA Device Configuration. Hardware Monitor Display system hardware status (CPU temperature, etc.). SIO Configuration SIO Chip configuration. Enable or Disable SIO Logical Devices, Resources and Features settings, etc. DIO Configuration Set Input/ Output of Digital Port Configuration.

  • Page 53: Cpu Configuration

    3.4.1 CPU Configuration Options Summary C-States Disabled Enabled Optimal Default, Failsafe Default Enable/Disable C States. EIST™ Disabled Enabled Optimal Default, Failsafe Default Enable/Disable Intel SpeedStep. Turbo Mode Disabled Enabled Optimal Default, Failsafe Default Turbo mode. Intel Virtualization Disabled Technology Enabled Optimal Default, Failsafe Default When enabled, a VMM can utilize the additional hardware capabilities provided by Vanderpool Technology.

  • Page 54: Sata Configuration

    Options Summary VT-d Disabled Optimal Default, Failsafe Default Enabled Enable/Disable CPU VT-d. Power Limit 1 Enable Disabled Optimal Default, Failsafe Default Enabled Enable/Disable Power Limit 1. 3.4.2 SATA Configuration Options Summary SATA GEN SPEED AUTO Optimal Default, Failsafe Default GEN1 GEN2 GEN3 SATA GEN SPEED selection.

  • Page 55: Hardware Monitor

    Options Summary Port 0/ mSATA port Disabled Enabled Optimal Default, Failsafe Default Enable/Disable SATA port 3.4.3 Hardware Monitor Chapter 3 – AMI BIOS Setup...

  • Page 56: Sio Configuration

    3.4.4 SIO Configuration Options Summary Serial Port 1/2 Configuration View and Set Basic properties of the SIO Logical device. Like IO Base , IRQ Range , DMA Channel and Device Mode. Chapter 3 – AMI BIOS Setup...

  • Page 57: Serial Port Configuration

    3.4.4.1 Serial Port Configuration Options Summary Use This Device Disable Enable Optimal Default, Failsafe Default Enable or Disable this Logical Device. Possible: Use Automatic Settings Optimal Default, Failsafe Default IO=2F8h; IRQ=3 IO=3F8h; IRQ=4 Allows user to change Device's Resource settings. New settings will be reflected on This Setup Page after System restarts.

  • Page 58: Dio Configuration

    3.4.5 DIO Configuration Options Summary DIO * Output Input Set DIO as Input or Output. Level High Optimal Default, Failsafe Default Set output level when DIO pin is output. Chapter 3 – AMI BIOS Setup...

  • Page 59: Trusted Computing

    3.4.6 Trusted Computing Options Summary Security Device Support Disable Enable Optimal Default, Failsafe Default Enables or Disables BIOS support for security device. O.S. will not show Security Device. TCG EFI protocol and INT1A interface will not be available. SHA-1 PCR Bank Disable Enable Optimal Default, Failsafe Default...
  • Page 60 Options Summary Platform Hierarchy Disabled Enabled Optimal Default, Failsafe Default Enable or disable Platform Hierarchy. Storage Hierarchy Disabled Enabled Optimal Default, Failsafe Default Enable or Disable Storage Hierarchy. Endorsement Hierarchy Disabled Enabled Optimal Default, Failsafe Default Enable or Disable Endorsement Hierarchy. TPM2.0 UEFI Spec Version TCG_1_2 TCG_2...

  • Page 61: Power Management

    3.4.7 Power Management Options Summary Power Mode ATX Type Optimal Default, Failsafe Default AT Type Select system power mode. Restore AC Power Loss Last State Optimal Default, Failsafe Default Always On Always Off Determine if the system turns on or off after AC resume from G3 to S5 state. RTC wake system from S5 Disable Optimal Default, Failsafe Default...

  • Page 62: Setup Submenu: Chipset

    Setup Submenu: Chipset Chapter 3 – AMI BIOS Setup...

  • Page 63: North Bridge

    3.5.1 North Bridge Chapter 3 – AMI BIOS Setup...

  • Page 64: South Bridge

    3.5.2 South Bridge Options Summary HD-Audio Support Disabled Enabled Optimal Default, Failsafe Default Enable/ Disabled HD audio. PCIe Speed Auto Optimal Default, Failsafe Default Gen1 Gen2 Configure PCIe Speed. LPSS I2C #2 Support Disable (D22:F1) PCI Mode Optimal Default, Failsafe Default ACPI Mode Enable/ Disable LPSS I2C #2 Support.

  • Page 65: Setup Submenu: Security

    Setup Submenu: Security Change User/Administrator Password You can set an Administrator Password or User Password. An Administrator Password must be set before you can set a User Password. The password will be required during boot up, or when the user enters the Setup utility. A User Password does not provide access to many of the features in the Setup utility.

  • Page 66: Secure Boot

    3.6.1 Secure Boot Options Summary Secure Boot Disabled Optimal Default, Failsafe Default Enabled Secure Boot feature is Active if Secure Boot is Enabled, Platform Key (PK) is enrolled and the System is in User mode. The mode change requires platform reset. Secure Boot Mode Custom Optimal Default, Failsafe Default...

  • Page 67: Key Management

    3.6.1.1 Key Management Options Summary Factory Key Provision Disabled Optimal Default, Failsafe Default Enabled Secure Boot feature is Active if Secure Boot is Enabled, Platform Key (PK) is enrolled and the System is in User mode. The mode change requires platform reset. Restore Factory Keys Force System to User Mode.
  • Page 68 Options Summary Remove 'UEFI CA' from DB Device Guard ready system must not list 'Microsoft UEFI CA' Certificate in Authorized Signature database (db). Restore DB defaults Restore DB variable to factory defaults. Platform Key(PK) Details Export Update Delete Key Exchange Keys Details Export Update...

  • Page 69: Setup Submenu: Boot

    Setup Submenu: Boot Options Summary Quiet Boot Disabled Enabled Optimal Default, Failsafe Default EnableDisable showing boot logo. Monitor Mwait Disable Enabled Auto Optimal Default, Failsafe Default Enable/Disable Monitor Mwait. To install Linux OS, please set this item to disable. Ipv4 PXE Support Disabled Optimal Default, Failsafe Default Enabled...

  • Page 70: Bbs Priorities

    3.7.1 BBS Priorities Chapter 3 – AMI BIOS Setup...

  • Page 71: Setup Submenu: Save & Exit

    Setup Submenu: Save & Exit Chapter 3 – AMI BIOS Setup...

  • Page 72: Chapter 4 - Drivers Installation

    Chapter 4 Chapter 4 – Drivers Installation...

  • Page 73: Driver Download/Installation

    Driver Download/Installation Drivers for the PICO-APL1-SEMI can be downloaded from the product page of the PICO-APL1 board level product on AAEON website by following this link: https://www.aaeon.com/en/p/pico-itx-boards-pico-apl1#downloads Download the driver(s) you need and follow the steps below to install them. Install Chipset Driver Open the Chipset Driver folder and open the SetupChipset.exe file Follow the instructions...
  • Page 74 Install Audio Driver Open the Audio Driver folder and open the Setup.exe file Follow the instructions Driver will be installed automatically Install TXE Driver Open the ME & TXE Driver folder and open the SetupTXE.exe file Follow the instructions Driver will be installed automatically Install COM Port Driver Open the COM port Driver folder and open the FintekSerial.exe file Follow the instructions...

  • Page 75: Appendix A - I/O Information

    Appendix A Appendix A - I/O Information...

  • Page 76: I/O Address Map

    I/O Address Map Appendix A – I/O Information...

  • Page 77: A.2 Memory Address Map

    A.2 Memory Address Map Appendix A – I/O Information...
  • Page 78 A.3 IRQ Mapping Chart Appendix A – I/O Information...
  • Page 79 Appendix B Appendix B – Mating Connectors...
  • Page 80 List of Mating Connectors and Cables The table notes mating connectors and available cables. Label Function Mating Connector Available Cable Cable P/N Vendor Model no Front Panel Molex 51110-1050 Front Panel 1701100156 Connector Cable SATA Port Molex 887505318 SATA Cable 1709070500 Battery Molex 51021-0200...

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