Pmbus/Smbus/I 2 C; Pmbus/Smbus/I 2 C Capabilities; Similarities Between Pmbus, Smbus, And I 2 C 2-Wire Interface; Communication Protection - Analog Devices LT7170 Reference Manual

Reference Manual
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PMBUS/SMBUS/I C
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PMBUS/SMBUS/I C CAPABILITIES
The LT7170/LT7170-1 serial interface is PMBus compliant and can operate at any frequency between 10 kHz and 1 MHz. The device address
is configurable using the nonvolatile memory (NVM). The serial interface supports the following protocols defined in the PMBus and SMBus
specifications:
Send byte, write byte, write word, block write
►
Read byte, read word, block read
►
Alert response address
►
PAGE_PLUS_READ, PAGE_PLUS_WRITE
►
Zone write
►
SMBALERT_MASK read and write
►
The LT7170/LT7170-1 pull the ALERT pin low to indicate conditions that may require attention. See the
Details section for more information.
SIMILARITIES BETWEEN PMBUS, SMBUS, AND I
The PMBus 2-wire interface is an incremental extension of the SMBus. SMBus is built upon I
parameters, and protocol. The PMBus/SMBus protocols are more robust than simple I
timeouts to prevent persistent bus errors and optional packet error checking (PEC) to ensure data integrity. In general, a bus controller device
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that can be configured for I C communication can be used for PMBus communication with little or no change to hardware or firmware. Repeat
start (restart) is not supported by all I
that repeat start is supported.
For a description of the minor extensions and exceptions PMBus adds to SMBus, refer to PMBus Specification Part 1 Revision 1.3.1: Section 5:
Transport.
For a description of the differences between SMBus and I
B—Differences Between SMBus and I

COMMUNICATION PROTECTION

All read operations return a valid PEC if the PMBus controller requests it. If Bit 2 of the MFR_CONFIG_ALL_LT7170 command is set, the
PMBus write operations are not acted upon until a valid PEC is received by the LT7170/LT7170-1. If a PEC is included in a command write, that
PEC must be valid or a PEC write error occurs, regardless of the value of Bit 2 of the MFR_CONFIG_ALL_LT7170 command.
If a PEC write error occurs, an attempt is made to access unsupported commands, or invalid data is written to supported commands, the
LT7170/LT7170-1 ignore the command, set the communications, memory, and logic (CML) bit in the STATUS_BYTE and STATUS_WORD
commands, set the appropriate bit in the STATUS_CML command, and pull the ALERT pin low.
analog.com
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C controllers but is required for SMBus/PMBus reads. If a general-purpose I
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C, refer to System Management Bus (SMBus) Specification Version 3.1: Appendix
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C.
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C 2-WIRE INTERFACE
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C with some minor differences in timing, DC
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C byte commands because PMBus/SMBus provide
LT7170/LT7170-1
Status section in the PMBus Command
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C controller is used, check
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