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TM-V7A/E
CIRCUIT DESCRIPTION
Reset and Backup Circuits
When power is supplied to the set, the reset circuit
generates a delay in the reset IC (IC505: PST9130NR) and
the delay signal is input to the. reset terminal of the main
unit microprocessor to carry out a power ON reset.
When
the power voltage drops, the voltage is detected and the
reset signal is generated.
The reset switch circuit resets the main unit microproc-
essor when the reset switch (S501) is pressed.
After the
reset operations are carried out, the microprocessor goes to
look at the RSTSW port. If the switch is released within 1
second (if the RSTSW port is iow), the operations are the
same as for an ALL reset (MR + power ON). The RSTSW
port is normally low. The backup circuit detects any voltage
drop in the power supply voltage 13.8V line and sets INTO
of the microprocessor high, causing the microprocessor to
send the backup data to the EEPROM (IC512) and go into
STOP mode to reduce power consumption.
ResetSW circuit
IC501
—
D501
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Mari2
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38
.
I
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28C4738(GR
13.8V >—4
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(GR)
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5
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xe
LMACSITI O.tu.
Microprocessor
SSX dss
LS
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+
elt
Q501
2S8C4738(GR)
D502
R501
AAA
bT47,5(B)
MWK
od x
ery
10/10
i
O50
RSTSW
PST9130NR_
Backup circuit
5
[4
r
RESET
VDD
w
Qa
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bk
Que
oy
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OTs
1
I P
INTS
Reset backup circuit
Fig.13 Reset backup circuit
15
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