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TM-V7A/E
@Squelch signal output circuit
CIRCUIT DESCRIPTION
This is the squelch output input to the TNC in reer to
SQC terminal output
L:SQ CLOSE
prevent collisions in packet communications.
The
logic is
(8402 pin 6)
H:SQ BUSY
as shown in Table 9. This is digital transistor output pulled
up to 5V.
Table9
°)|
R519
J |
MeN
"Ny
IC503
To VCO modulation
°
=
"Apin
Variable capacitor diode
R520
«| C526
©
\
CN 503 Lag AN,
Hf
f
microprocessor
MOU
—
—
P34}
—
:
oe
(1200bps)
\
vss
mi
1t
icroprocessor
microp!
30F
C576
(9600bps)
microprocessor
>
(DTMF Monitor)
C567
C566
TF
tF
C571
C570
R591
R590
tI
{|
ANY
+
+
ANY
al
wo
ike)
al
ce
—4
o—
D506
D507
Path®
50pin microprocessor ~«
=
microprocessor
th) (Repeater RD mute)
P37
8
a
TIT
IC507
23pin
Cross point switch (IC510)
C543 R552
cTCSS
2
Bh
BH
Ri
an
Dawe
a
{}
MIC RD
PKDL—
7
C fe)
Al
Fs
Re
Q508
BUFFER AMP
PKS
PRO
5
)
Noe
3
pu
R3
Q506
PRI
sac
®
§
BUFFER AMP
:
$
N,
o
5
Lh
=
=
Bi
Ra
LL
B
.
BUFFER AMP
Pa
N
tee-
IC 506
x
Js
Fai
R5
~
{}>
DTMF
Ba
iB
P
R6
Recorder
C4
Microprocessor 5 "
we
e1
ce
c3
sQ output control
oO
R425
IC503
CLOCK DATA RESET] LOAD
Microprocessor
10
NM
N
N
Packet
stanb'
RDU
RDV
Fe
Bonet taney
1C503
P52
P51
P53
3
.
,
r-—--—-< MIC RD
microprocessor
Path© R527
14
1C507
Fig.12 DATA terminal and peripheral circuit
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