Main Features - IMAGO Vision Cam XM2 Hardware Manual

2 Introduction

Main features

 NVIDIA Orin NX / Nano
6 or 8-core Arm® Cortex®-A78AE v8.2 64-bit CPU
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NVIDIA Ampere architecture with up to 1024 NVIDIA® CUDA® cores and 32 Tensor Cores
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Up to 16 GB RAM
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Image sensors:
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5.2 Megapixel Lince 5M
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Monochrome or Bayer pattern
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Real-Time Communication Controller
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Controls vision- & automation-specific interfaces
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Contains functional units for controlling I/Os in real time:
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Operates independently from Arm processor and OS
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Easy-to-use high-level API for C++ and Python
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 Interfaces
1x Gigabit Ethernet
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4x digital output
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4x digital input
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1x RS-232
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1x USB 2.0
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Optional RS-422 inputs (e.g. for incremental encoders)
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Storage
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NVMe SSD 60 GB
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Housing
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Passive cooling without heat sink
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IP65 versions available
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Lens mount: C-mount
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Digital inputs and outputs
Encoder
Camera Trigger
Trigger unit: creation of trigger signals, derived from other inputs (e.g. encoder)
I/O Scheduler: applies values stored in a FIFO to outputs in real time (based on
trigger event, encoder position, or timer value)
Multiplexer: flexible connection of functional units with each other
IMAGO Technologies GmbH
info@imago-technologies.com; www.imago-technologies.com
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