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Set Interrupt
Command
Read Reverse
Command
DATA TRANSFER
Character Assembly
and Serialization
Asynchronous
Operation
Synchronous
Operation
CCM
• This command from the processor causes this unit to reset the END
signal and to set the interrupt line.
• This command from the processor initiates the transfer of the contents
of CCM to the processor.
This command is valid only for the CCM
Common Device Number.
• All data transfer between the CCM and buffers, in either direction,
is serial by bit.
The assembly of incoming bits and serializing of out-
going characters are performed by the CCM. The first data bit received
from the buffer occupies the low-order bit position of the byte being
assembled.
In cases where the remote terminal or the buffer alters the
sense or sequence of the bits, the programmer must make appropriate
conversion in the processor.
Data is transferred over communication
circuits in either asynchronous or synchronous operation.
• The information bits of each character are preceded by a start framing
element and followed by a stop framing element of one or more units or
bit times. These character framing elements are transferred between the
buffer and the CCM, when receiving, but are deleted before the character
is transferred to the processor by the CCM. When transmitting data to the
communication line, the required framing bits are generated by the CCM.
System classification bits, set by the program in the LSW for each line,
identify the code structure used on that line. (See Section 3, table 3-3.)
• No character framing elements are used in synchronous operation.
Once synchronization has been established, each series of consecutive bits
(number bits per character as defined by system classification) are handled
as discrete characters without further framing considerations. Various
rules for establishing and maintaining synchronization are invoked by the
assigned system classification for the synchronous systems which can be
handled by the CCMo
In some systems, synchronization is established entirely by the CCM
without program involvement.
When receiving bits from the buffer, the
CCM assembles the number of bits specified by systems classification and
tests for the wired-in idle line or synchronizing character (SYN).
If
SYN
is not present, the new codes resulting from reassembly of a new character
as each succeeding bit is received are tested, until SYN is recognizedo The
sequence counter is then incremented.
If
the next character is SYN, syn-
chronization is presumed to be established.
If
a character other than SYN
is received, the counter is reset to 0 and testing for SYN will proceed on a
bit basis.
1-10
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