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Asynchronous
Transmissio., From
Remote Device
to BuHer
Asynchronous Data
Transfer From
Processor to Buffer
CCM
•
When a Read command is issued to the buffer, it begins to examine the
communication line for evidence of a mark-to-space transition indicating
the presence of data on the circuit. Detection of a start bit by the buffer
causes it to
go
RDY to the next Select. The CCM accesses the appropriate
LSWs, determines input/output status, and places the received start bit
in the character assembly area (LSW A). The buffer scan is then advanced
to the next buffer.
In accordance with the bit timing, the .buffer detects the first data bit
of the incoming character, and responds with RDY to the next Selecto The
first data bit is transferred to the character assembly area. This routine
of bit transfer is repeated until the complete character has been accumu-
lated in LSW A (as specified by system classification)
0
The contents of
the character assembly area are examined to insure that the character
is properly framed (presence of start and stop bits) which indicates a valid
character.
The character is then transferred to the character transfer store
(LSW B) and the character assembler is cleared to receive the next char-
acter.
All of these events are accomplished by the buffer scan. All
subsequent handling of this character by the CCM is accomplished during
the processor scan intervals.
The character transfer store area is ex-
amined by the processor scan and, if a character is present, character
parity checking and block parity accumulation are performed during the
processor scano
The bit configuration of this incoming character is compared against
previously wired- in decoding logic.
The decoding logic permits the accessing of operational words o
If
the
character is recognized as not to be decoded, it is treated as data o
If
the
character is recognized as a character which accesses as operational word,
the appropriate action takes place as specified in that OWo
If
the new character is a data character, or a control character to be
transferred to the processor, it is stored in hardware registers associated
with the standard interface; and the service request is set on the multi-
plexor channeL
If
this is a data character not to be transferred to the processor, as a
result of an Ignore specified by an OW, the character transfer store is
cleared and no service request is sent to the standard interface.
The actual transfer of a character to the processor across the standard
interface will be done in response to the appropriate signals from the
multiplexor channeL The processor scan is not advanced until the service
request is honored.
•
When a Write command has been issued to the buffer, the processor
transfers the first character over the multiplexor channel into a hardware
register within the CCM.
During the next processor scan the character
is passed into the decoding logic which determines its identity as a data
character or a character which must access an operational word.
1-16
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