Cherry JAGUAR SBC-RK3588-AMR User Manual page 14

Single board computer for autonmous mobile robots featuring the rockchip rk3588 cutting-edge processor
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Pin Number
GPIO Name
22
GPIO3_A4
24
GPIO3_A5
26
GPIO3_A6
49
GPIO3_A7
27
GPIO3_B0
28
GPIO3_B1
30
GPIO3_B2
32
GPIO3_B3
34
GPIO3_B4
36
GPIO3_B5
38
GPIO3_B6
40
GPIO3_B7
42
GPIO3_C0
44
GPIO3_C1
46
GPIO3_C2
48
GPIO3_C3
50
GPIO3_C4
52
GPIO3_C5
54
GPIO3_C6
56
GPIO3_C7
58
GPIO3_D0
60
GPIO3_D1
62
GPIO3_D2
64
GPIO3_D3
66
GPIO3_D4
68
GPIO3_D5
Pin Number
GPIO Name
14
GPIO3_A0
16
GPIO3_A1
18
GPIO3_A2
20
GPIO3_A3
22
GPIO3_A4
24
GPIO3_A5
26
GPIO3_A6
49
GPIO3_A7
27
GPIO3_B0
28
GPIO3_B1
30
GPIO3_B2
32
GPIO3_B3
34
GPIO3_B4
36
GPIO3_B5
38
GPIO3_B6
40
GPIO3_B7
42
GPIO3_C0
44
GPIO3_C1
46
GPIO3_C2
48
GPIO3_C3
50
GPIO3_C4
52
GPIO3_C5
54
GPIO3_C6
56
GPIO3_C7
58
GPIO3_D0
60
GPIO3_D1
JAGUAR SBC-RK3588-AMR User Manual
© Cherry Embedded Solutions GmbH
Table 2.11 – continued from previous page
CAN
PCIE
CAN1_RX_M0
CAN1_TX_M0
PCIE30X2_BUTTON_RSTN_M1
CAN2_RX_M0
CAN2_TX_M0
PCIE30X4_WAKEN_M2
PCIE20X1_2_CLKREQN_M0
PCIE20X1_2_WAKEN_M0
PCIE20X1_2_PERSTN_M0
PCIE30X2_CLKREQN_M2
PCIE30X2_WAKEN_M2
PCIE30X2_PERSTN_M2
PCIE30X4_BUTTON_RSTN
Table 2.12: Mezzanine multiplex functions (cont.)
ETH
GMAC1_TXD2
GMAC1_TXD3
GMAC1_RXD2
GMAC1_RXD3
GMAC1_TXCLK
GMAC1_RXCLK
ETH1_REFCLKO_25M
GMAC1_RXD0
GMAC1_RXD1
GMAC1_RXDV_CRS
GMAC1_TXER
GMAC1_TXD0
GMAC1_TXD1
GMAC1_TXEN
GMAC1_MCLKINOUT
GMAC1_PTP_REF_CLK
GMAC_PPSTRIG
GMAC1_PPSCLK
GMAC1_MDC
GMAC1_MDIO
MIPI_CAMERA_CLK
MIPI_CAMERA2_CLK_M1
MIPI_CAMERA3_CLK_M1
MIPI_CAMERA4_CLK_M1
continues on next page
UART
UART8_RSTN_M1
UART8_CTSN_M1
UART5_TX_M1
UART5_RX_M1
UART4_RX_M1
UART4_TX_M1
UART9_RTSN_M2
UART9_CTSN_M2
UART9_RX_M2
UART9_TX_M2
SPI
SPI4_MISO_M1
SPI4_MOSI_M1
SPI4_CLK_M1
SPI4_CS0_M1
SPI4_CS1_M1
SPI1_MOSI_M1
SPI1_MISO_M1
SPI1_CLK_M1
SPI1_CS0_M1
SPI1_CS1_M1
SPI3_CS0_M3
SPI3_CS1_M3
SPI3_MISO_M3
SPI3_MOSI_M3
SPI3_CLK_M3
v1.0.1
Page 11

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