Terminal Description - Onkyo TX-SR875 Service Manual

IC BLOCK DIAGRAMS AND TERMINAL DESCRIPTIONS -63
Q8501: SII9135CTU (HDMI RECEIVER)

TERMINAL DESCRIPTION(1/4)

Video and Audio Pins
Pin Name
Q0
Q1
Q2
Q3
Q4
Q5
Q6
Q7
Q8
Q9
Q10
Q11
Q12
Q13
Q14
Q15
Q16
Q17
Q18
Q19
Q20
Q21
Q22
Q23
Q24
Q25
Q26
Q27
Q28
Q29
Q30
Q31
Q32
Q33
Q34
Q35
DE
HSYNC
VSYNC
EVNODD
ODCK
Pin # Strength Type
LVTTL
16 8 mA
LVTTL
15
LVTTL
14
LVTTL
13
LVTTL
10
9 LVTTL
LVTTL
8
7 LVTTL
LVTTL
3
2 LVTTL
LVTTL
1
144 LVTTL
LVTTL
141
LVTTL
140
LVTTL
139
LVTTL
138
LVTTL
135
LVTTL
134
LVTTL
133
LVTTL
132
LVTTL
129
LVTTL
128
LVTTL
127
LVTTL
126
123 LVTTL
LVTTL
122
121 LVTTL
LVTTL
120
117 LVTTL
LVTTL
116
115 LVTTL
LVTTL
114
LVTTL
111
LVTTL
110
LVTTL
109
LVTTL
108
LVTTL
19 8 mA
LVTTL
20 8 mA
LVTTL
21 8 mA
LVTTL
22 8 mA
12 mA
5 LVTTL
Dir Description
Output
36-Bit Output Pixel Data Bus. Q35:0
is highly configurable using the
Output
VDD_CONFIG register. It supports a
Output
wide array of output formats, including
Output
multiple RBG and YCbCr bus formats.
Output
Using the appropriate bits in the PD
Output register, the output drivers can be put
into a high impedance (tri-state)
Output
mode. A weak, internal pull-down
Output
device brings each output to ground.
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Data Enable
Output
Horizontal Sync Output
Output
Vertical Sync Output
Output
Indicates Even or Odd Field for
Interlaced Formats
Output
Output Data Clock
TX-SR875