Onkyo TX-SR875 Service Manual page 106

IC BLOCK DIAGRAMS AND TERMINAL DESCRIPTIONS -52
Q8800: ADV7401 (Multi-Format SDTV/HDTV Video Decoder)
PIN CONFIGURATION
P32
P31
INT
CS/HS
DGND
DVDDIO
P15
P14
P13
P12
DGND
DVDD
P29
P28
SFL/SYNC_OUT
SCLK2
DGND
DVDDIO
SDA2
P11
P10
P9
P8
P27
P7
TERMINAL DESCRIPTION(1/3)
Pin No. Mnemonic
5, 11, 17, DGND
40, 89
49, 50, 60, AGND
66
6, 18 DVDDIO
12, 39, 90 DVDD
63 AVDD
47, 48 PVDD
51 FB
54, 56, 58, AIN1–AIN12
72, 74, 76,
53, 55, 57,
71, 73, 75
42, 41, 28, P2–P9, P12–
27, 26, 25, P19
23, 22, 10,
9, 8, 7, 94,
93, 92, 91
1
PIN 1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
Type Function
G Digital ground
G Analog ground
P Digital I/O supply voltage (3.3 V).
P Digital core supply voltage (1.8 V).
P Analog supply voltage (3.3 V).
P PLL supply voltage (1.8 V).
I FB is a fast switch overlay input that switches between CVBS
and RGB analog signals.
I Analog video input channels.
O Video pixel output port.
ADV7401
LQFP
TOP VIEW
TX-SR875
75 AIN12
74 AIN5
73 AIN11
72 AIN4
71 AIN10
70 TEST0
69 CAPC2
68 CAPC1
67 BIAS
66 AGND
65 CML
64 REFOUT
63 AVDD
62 CAPY2
61 CAPY1
60 AGND
59 TEST1
58 AIN3
57 AIN9
56 AIN2
55 AIN8
AIN1
54
53 AIN7
52 SOG
FB
51