B1 Board Schematic Diagram - Sony KDL-20B4050 Service Manual

Flat panel color tv
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FE_+2V5
FE_+2V5_DDR
THESE CAPACITORS TO BE PLACED UNDERNEATH BGA
C7116
C7115
C7102
C7114
C7113
C7112
FB7101
0 . 1
4 . 7
0 . 1
0 . 1
0 . 1
0 . 1
0uH
3.3V_MAIN
THESE CAPACITORS TO BE PLACED UNDERNEATH BGA
FB7103
0uH
FE_DQ[0-15]
FE_DADD[0-12]
JL7101
_DVREF,FE_DWEB
FE_DBA0,FE_DBA1,FE_DCASB,FE_DCKE,FE_DCLK,FE_DCLKB,FE_DCSB,FE_DQM0,FE_DQM1,FE_DQS0,FE_DQS1,FE_DRASB,FE
DIFFERENTIAL PAIR
OF CLOCK SIGNALS
THIS CAPACITOR TO BE
PLACED UNDERNEATH BGA
FE_M_DATA[7]
FE_M_DATA[6]
FE_M_DATA[5]
FE_M_DATA[4]
FE_M_DATA[3]
FE_M_DATA[2]
FE_M_DATA[1]
FE_M_DATA[0]
FE_M_VAL
FE_M_CKOUT
R7121
47
FE_REGB
R7123
47
FE_IOWRB
R7124
47
FE_IORDB
R7125
47
FE_CI1_RSTB
FE_CI1_INPACKB
FE_CI1_VS1B
FE_CI1_IREQB
FE_CI1_CD1B
FE_CI1_CD2B
FE_CI_TSCLK,FE_CI_TSSYNC,FE_CI_TSVAL
FE_CI_TSD[0-7]
FE_RDATA[0-7]
FE_RADD[19-25]
FE_RADD[25]
FE_RADD[24]
FE_RADD[23]
FE_RADD[22]
FE_RADD[21]
FE_RADD[20]
FE_RADD[19]
FE_RADD[0-11]
FE_RADD[11]
FE_RADD[10]
FE_RADD[9]
FE_RADD[8]
FE_RADD[7]
FE_RADD[6]
FE_RADD[5]
FE_RADD[4]
FE_RADD[3]
FE_RADD[2]
FE_RADD[1]
FE_RADD[0]
FE_FCSB0
R7130
47
FE_FWEB
R7131
47
FE_FOEB
R7132
47
FE_NAND_CLE
R7134
47
FE_NAND_ALE
FE_NAND_RBB
3.3V_MAIN
CI2_CE2B
FE_CI1_CE1B
FE_CI1_WAITB
FE_NMASTER_RESET
TP7130
FE_PWMOUT
FE_CLK27M
FB7118
FE_+1V5
0uH
C7140
C7138
C7141
0 . 1
0 . 1
4 . 7
C7111
0 . 1
E5 E17 F5
F17 G5 G17 T17 U5 U6 U17
E5 E17 F5 F17 G5 G17 T17 U5 U6 U17
FE_DQ[15]
A16
A16
DQ15
FE_DQ[14]
B16
B16
DQ14
FE_DQ[13]
A15
A15
DQ13
FE_DQ[12]
B15
B15
DQ12
FE_DQ[11]
A14
A14
DQ11
FE_DQ[10]
B14
B14
DQ10
FE_DQ[9]
A13
A13
DQ9
FE_DQ[8]
B13
B13
DQ8
FE_DQ[7]
D13
D13
DQ7
FE_DQ[6]
C13
C13
DQ6
FE_DQ[5]
D14
D14
DQ5
FE_DQ[4]
C14
C14
DQ4
FE_DQ[3]
D15
D15
DQ3
FE_DQ[2]
C15
C15
DQ2
FE_DQ[1]
D16
D16
DQ1
FE_DQ[0]
C16
C16
DQ0
SIGN15011
D12
D12
DADD13
FE_DADD[12]
A9
A9
DADD12
FE_DADD[11]
B9
B9
DADD11
FE_DADD[10]
D8
D8
DADD10
FE_DADD[9]
A8
A8
DADD9
FE_DADD[8]
B8
B8
DADD8
FE_DADD[7]
A7
A7
DADD7
FE_DADD[6]
B7
B7
DADD6
FE_DADD[5]
A6
A6
DADD5
FE_DADD[4]
B6
B6
DADD4
FE_DADD[3]
D6
D6
DADD3
FE_DADD[2]
C6
C6
DADD2
FE_DADD[1]
D7
D7
DADD1
FE_DADD[0]
C7
C7
DADD0
FE_DBA1
C8
C8
DBA1
FE_DBA0
D9
D9
DBA0
FE_DQM1
A11
A11
UDQM
FE_DQS1
A12
A12
UDQS
FE_DQM0
C11
C11
LDQM
FE_DQS0
C12
C12
LDQS
FE_DCSB
C9
C9
DCSB
FE_DRASB
D10
D10
DRASB
FE_DCASB
C10
C10
DCASB
FE_DWEB
D11
D11
DWEB
FE_DCKE
B10
B10
DCKE
FE_DCLK
A10
A10
DCLK
FE_DCLKB
B11
B11
DCLKB
FE_DVREF
B12
B12
DVREF
C7128
0 . 1
TP7108
Y17
Y17
VDI_D7 / PPORT121
TP7109
W17
W17
VDI_D6 / PPORT120
TP7110
V17
V17
VDI_D5 / PPORT119
TP7111
AA17
AA17
VDI_D4 / PPORT118
TP7113
AA16
AA16
VDI_D3 / PPORT117
TP7114
Y16
Y16
VDI_D2 / PPORT116
TP7116
W16
W16
VDI_D1 / PPORT115
TP7117
V16
V16
VDI_D0 / PPORT114
TP7118
AA15
AA15
VDI_VCK / PPORT113
A1
A1
STP0_DAT7 / PPORT8
B2
B2
STP0_DAT6 / PPORT7
/ CTS1B
A2
A2
STP0_DAT5 / PPORT6
/ RTS1B
B3
B3
STP0_DAT4 / PPORT5
A3
A3
STP0_DAT3 / PPORT4
C4
C4
STP0_DAT2 / PPORT3
B4
B4
STP0_DAT1 / PPORT2
A4
A4
STP0_DAT0 / PPORT1
A5
A5
STP0_EN / PPORT9
D5
D5
STP0_CLK / PPORT0
F4
F4
REGB / PPORT34
N4
N4
IOWRB / PPORT31
P2
P2
IORDB / PPORT30
G2
G2
INPACKB / PPORT33
R2
R2
GPIO_VS1B / PPORT28
G1
G1
GPIO_RESET / PPORT32
K3
K3
GPIO_IREQB / PPORT24
V1
V1
GPIO_CD1B / PPORT26
C1
C1
GPIO_CD2B / PPORT35
R7128 10k
Y1
Y1
PCE1B(CE2B_2) / PPORT36
P3
P3
PCE0B(CE2B_1) / PPORT27
3.3V_MAIN
B1
B1
IOSI16B / PPORT25
FE_CI_TSSYNC
E4
E4
STP1_STRT / PPORT38
FE_CI_TSVAL
F2
F2
STP1_EN / PPORT37
FE_CI_TSCLK
H1
H1
STP1_CLK / PPORT29
FE_CI_TSD[7]
R1
R1
RDATA15 / STP1_DAT7 / BOOT_NAND_SEL1
FE_CI_TSD[6]
R3
R3
RDATA14 / STP1_DAT6 / BOOT_NAND_SEL0
FE_CI_TSD[5]
T1
T1
RDATA13 / STP1_DAT5 / BOOTSEL1
FE_CI_TSD[4]
T3
T3
RDATA12 / STP1_DAT4 / BOOTSEL0
FE_CI_TSD[3]
U1
U1
RDATA11 / STP1_DAT3 / MINIBOOT
FE_CI_TSD[2]
D1
D1
RDATA10 / STP1_DAT2 / BWSEL
FE_CI_TSD[1]
D2
D2
RDATA9 / STP1_DAT1 / ROMBEND
FE_CI_TSD[0]
C3
C3
RDATA8 / STP1_DAT0 / MCLKSEL2
FE_RDATA[7]
U2
U2
RDATA7 / MCLKSEL1
FE_RDATA[6]
R4
R4
RDATA6 / MCLKSEL0
FE_RDATA[5]
V2
V2
RDATA5 / VRCLKSEL1
FE_RDATA[4]
W2
W2
RDATA4 / VRCLKSEL0
FE_RDATA[3]
V4
V4
RDATA3
FE_RDATA[2]
C2
C2
RDATA2 / MRGMODE1
FE_RDATA[1]
D4
D4
RDATA1 / MRGMODE0
FE_RDATA[0]
E2
E2
RDATA0 / ENDIAN
J1
J 1
RADD25 / HSD7 / EJTAG_MODE
G3
G3
RADD24 / HSD6 / DINT_EN
J4
J 4
RADD23 / HSD5 / DSYSELB
K4
K4
RADD22 / HSD4 / PCI_MODE
L2
L2
RADD21 / HSD3 / PCI_SIZE1
M2
M2
RADD20 / HSD2 / PCI_SIZE0
N2
N2
RADD19 / HSD1 / NAND_CS
JL7112
SIGN14969
L4
L4
RADD18 / HSD0
JL7113
SIGN14974
M4
M4
RADD17 / PKTSTRT
JL7114
SIGN14981
J3
J 3
RADD16 / HSDE
JL7115
SIGN14985
H3
H3
RADD15 / HSDCLK
JL7116
SIGN14987
M1
M1
RADD14
JL7117
SIGN14989
N1
N1
RADD13
JL7118
SIGN14991
K1
K1
RADD12
N3
N3
RADD11
T2
T2
RADD10
M3
M3
RADD9
L3
L3
RADD8
H4
H4
RADD7
G4
G4
RADD6
J2
J 2
RADD5
H2
H2
RADD4
F1
F1
RADD3
E3
E3
RADD2
E1
E1
RADD1
D3
D3
RADD0
V3
V3
FCSB1
R7129
47
K2
K2
FCSB0
L1
L1
FWEB
P1
P1
FOEB
T4
T4
NSEB
W1
W1
NRBB
U3
U3
NCLE
U4
U4
NALE
SIGN15013
AA18
AA18
GCSB3 / PPORT50
SIGN15017
Y18
Y18
GCSB2 / PPORT49
TP7129
SIGN14976
Y2
Y2
GCSB1
R7140 47
P4
P4
GCSB0
F3
F3
GRDYB
AA11
AA11
RSTSWB
SIGN14950
Y10
Y10
RSTOUT
V7
V7
PWMOUT
M21
M21
CLK27IN
N17
N17
AVDDP
C7139
0 . 1
THIS CAPACITOR TO BE
PLACED UNDERNEATH BGA
M17
J 9 J10 J11 J12 J13 K9 K10 K11 K12 K13 L9 L10 L11 L12 L13 M9 M10 M11 M12 M13 N9 N10 N11 N12 N13
M17
J9
J10 J11 J12 J13 K9
K10 K11 K12 K13 L9
E8 E9 E10 E11 E12 E13
E6 E7 E14 E15 E16 H5 H17 J5
J17 K5
K17 L5
L17 M5 N5 P5 P17 R5 T5
U7 U8 U9 U10 U14 U15 U16
E8 E9 E10 E11 E12 E13
E6 E7 E14 E15 E16 H5 H17 J 5 J17 K5 K17 L5 L17 M5 N5
P5 P17 R5 T5 U7 U8 U9 U10 U14 U15 U16
VDOE_VVSB_OUT / INTAB / PPORT67
VDOE_VHSB_OUT / PCICLK / PPORT68
U11 U12 U13 V13
W10
V10
AA10 Y9 W9 W8 AA9
L10 L11 L12 L13 M9 M10 M11 M12 M13 N9 N10 N11 N12 N13
U11 U12 U13 V13
W10
V10
FB7100
0uH
THESE CAPACITORS TO BE PLACED UNDERNEATH BGA
FB7102
0uH
THIS CAPACITOR TO BE
PLACED UNDERNEATH BGA
R17
R17
VDD3_USB
JL7100
P21
P21
USBCLKI / PPORT105
SIGN15015
R20
R20
USB_DP1
SIGN15007
R21
R21
USB_DN1
T20
T20
USB_DP0
T21
T21
USB_DN0
U18
U18
USB_PPON1 / PPORT109
U19
U19
USB_OCI1 / PPORT108
R7102
U20
USB_PPON0 / PPORT107
U20
R7103
U21
U21
USB_OCI0 / PPORT106
AA3
AA3
MSDATA3 / PPORT127
Y4
Y4
MSDATA2 / PPORT126
W4
W4
MSDATA1 / PPORT132
W3
W3
MSDIO/DATA0 / PPORT131
FE_MS_DAT[0]
V5
V5
MSDIR / PPORT128
Y3
Y3
MSBS / PPORT130
FE_MS_BS
AA2
AA2
FE_MS_CLK
MSCLK / PPORT129
JL7102
100
R7104
V15
TXD0B / CAP/COMP0 / PPORT110
V15
JL7103
AA1
AA1
RXD0B / CAP/COMP3 / PPORT137
JL7104
XX
R7105
SIGN14963
W15
W15
CTS0B / CAP/COMP1 / PPORT111
SIGN14971
JL7105
Y15
Y15
RTS0B / CAP/COMP2 / PPORT112
AA5
100
R7106
AA5
FE_TXD1B
TXD1B
AA6
AA6
FE_RXD1B
RXD1B
R7107
B5
B5
RTS1B_B / STP0_STRT / PPORT10
FE_M_SYNC
R7108
C5
C5
CTS1B_B / STP0_ERRB / PPORT11
R7109
M19
M19
DCD1B / PPORT55
R7110
L20
L20
RI1B / PPORT54
W19
CI2_VS1B
W19
TP7100
VDO_VHSB /
TXD2B / PPORT14
AA19
CI2_RSTB
RXD2B / PPORT13
AA19
TP7101
VDO_VVSB /
N18
N18
TP7102
CI2_IREQB
TXD3B / PPORT53
L21
L21
TP7103
nCI2_TSEN
RXD3B / PPORT52
Y8
Y8
100
SDA1
RB7100
AA8
SCL1
AA8
Y7
Y7
SDA0
AA7
AA7
SCL0
P19
SCKINOUT / PPORT46
P19
FE_FTV_CONFIG2
R18
R18
SDIN / PPORT44
FE_FTV_CONFIG0
N20
N20
SDOUT / PPORT45
FE_FTV_CONFIG1
SIGN14994
V18
V18
IR_IN_1 / PPORT47
TP7112
P18
P18
FE_MS_INS
IR_IN_0 / PPORT51
SIGN14979
W18
CI2_CD1B
IR_OUT / PPORT48
W18
TP7115
T19
RB7101 10k
T19
TV_DEM_SEL
SMRST0 / PPORT39
T18
T18
CMDVCC0 / RI0B / PPORT40
N21
N21
OFF0 / DCD0B / PPORT41
3.3V_MAIN
P20
P20
SMCLK0 / DTR0B / PPORT42
R19
R19
SMDAT0 / DSR0B / PPORT43
V9
V9
FE_NCI1_OVR
AO1_DAT / PPORT125
R7115
47
W7
W7
FE_NCI_EN
AO1_LRCK / PPORT123
R7116
47
Y6
Y6
FE_CI1_PWR_EN
AO1_BCK / PPORT124
FE_ABCK,FE_ADO,FE_ALRCK,FE_AMCK
R7117
XX
V8
AO1_MCK / PPORT122
V8
R7118
47
FE_ADO
W6
W6
AO0_DAT
R7119
47
FE_ALRCK
Y5
Y5
AO0_LRCK
R7120
47
FE_ABCK
AA4
AA4
AO0_BCK
R7122
47
FE_AMCK
W5
W5
AO0_MCK
SIGN14984
JL7107
V6
V6
ATX
D20
D20
FE_USB_PON
PAR / PPORT56
47
R7126
FE_NDEMOD_RESET
F19
F19
FE_NDEMOD_RESET
FRAMEB / PPORT57
F18
F18
JL7108
IRDYB / PPORT58
R7127
E21
TRDYB / PPORT59
E21
47
TP7119
E19
E19
STOPB / PPORT60
H21
H21
DIG_OSD_STATUS
IDSEL / PPORT61
E20
E20
DEVSELB / PPORT62
M18
M18
REQB0 / PPORT63
TP7120
N19
N19
FE_JIG_MODE
GNTB0 / PPORT64
E18
E18
PERRB / PPORT65
B17
B17
VDOE_VCK_IN / AD1 / PPORT70
TP7121
C17
C17
VDOE_VVSB_IN / AD2 / PPORT71
TP7122
D17
D17
VDOE_VHSB_IN / AD3 / PPORT72
TP7123
D21
VDOE_VCK / SERRB / PPORT66
D21
TP7124
M20
M20
TP7125
K21
K21
TP7126
A17
A17
FE_NUSB_OVR
VDOE_FLD / AD0 / PPORT69
C18
C18
VDOE_A7 / AD11 / PPORT80
B21
B21
VDOE_A6 / AD10 / PPORT79
A21
A21
VDOE_A5 / AD9 / PPORT78
B20
B20
VDOE_A4 / AD8 / PPORT77
A20
A20
VDOE_A3 / AD7 / PPORT76
A19
A19
VDOE_A2 / AD6 / PPORT75
B18
B18
VDOE_A1 / AD5 / PPORT74
A18
VDOE_A0 / AD4 / PPORT73
A18
G20
G20
VDOE_R7 / AD19 / PPORT88
G19
G19
VDOE_R6 / AD18 / PPORT87
G18
G18
VDOE_R5 / AD17 / PPORT86
F21
F21
VDOE_R4 / AD16 / PPORT85
D18
D18
VDOE_R3 / AD15 / PPORT84
C21
C21
VDOE_R2 / AD14 / PPORT83
C20
C20
VDOE_R1 / AD13 / PPORT82
C19
C19
VDOE_R0 / AD12 / PPORT81
K18
K18
VDOE_G7 / AD27 / PPORT96
J21
J21
VDOE_G6 / AD26 / PPORT95
J20
VDOE_G5 / AD25 / PPORT94
J20
J19
J19
VDOE_G4 / AD24 / PPORT93
H20
H20
VDOE_G3 / AD23 / PPORT92
H19
H19
VDOE_G2 / AD22 / PPORT91
H18
H18
VDOE_G1 / AD21 / PPORT90
G21
G21
VDOE_G0 / AD20 / PPORT89
J18
J18
VDOE_B7 / CBE3 / PPORT104
F20
F20
VDOE_B6 / CBE2 / PPORT103
D19
D19
VDOE_B5 / CBE1 / PPORT102
B19
B19
VDOE_B4 / CBE0 / PPORT101
L19
L19
VDOE_B3 / AD31 / PPORT100
L18
L18
VDOE_B2 / AD30 / PPORT99
K20
VDOE_B1 / AD29 / PPORT98
K20
K19
K19
VDOE_B0 / AD28 / PPORT97
FB7108
0uH
VDO[7]
V21
V21
VDO0_D7 / PPORT23
FB7109
0uH
VDO[6]
V20
V20
VDO0_D6 / PPORT22
FB7110
0uH
VDO[5]
W21
W21
VDO0_D5 / PPORT21
FB7111
VDO[4]
0uH
W20
W20
VDO0_D4 / PPORT20
FB7112
VDO[3]
0uH
Y21
Y21
VDO0_D3 / PPORT19
FB7113
0uH
VDO[2]
Y20
Y20
VDO0_D2 / PPORT18
FB7114
0uH
VDO[1]
AA21
AA21
VDO0_D1 / PPORT17
FB7115
0uH
VDO[0]
AA20
AA20
VDO0_D0 / PPORT16
R7133
0
FB7116
0uH
VDCLK
V19
V19
VDO0_VCK / PPORT15
Y19
Y19
CI2_CD2B
VDO0_FLD / PPORT12
TP7127
V11
Y
V11
VAR
V12
C7131
C7130
V12
U
VAG
XX
XX
W12
W12
V
VAB
AA12
AA12
VAY
AA13
AA13
VAC
Y12
Y12
VACVBS
W13
C7134
C7133
W13
VREF1
XX
XX
Y11
Y11
VREF0
0uH
Y13
Y13
FB7117
RSET1
W11
W11
RSET0
C7137
C7136
0 . 1
0 . 1
V14
V14
C7135
AVDDV
THESE CAPACITORS
4 . 7
W14
XX
W14
TO BE PLACED
AVDDV
R7146
UNDERNEATH BGA
Y14
Y14
AVDDV
AA14
AVDDV
AA14
L7100
10uH
THIS CAPACITOR TO BE
PLACED UNDERNEATH BGA
AA10Y9
W9 W8 AA9
FE_JTCK,FE_JTDI,FE_JTDO,FE_JTMS,FE_JTRST,FE_NMI_EDINT
FE_+1V5
3.3V_MAIN
FE_USB_DP
FE_USB_DN
XX
FE_USB_PON
XX
FE_NUSB_OVR
FE_TXD0B
FE_RXD0B
47
47
47
47
3.3V_MAIN
TP7104
FB7104
0uH
SDA_EMMA
TP7105
FB7105
0uH
SCL_EMMA
TP7106
FB7106
0uH
SDA_DIGITAL
TP7107
FB7107
0uH
SCL_DIGITAL
3.3V_MAIN
VDCLK,VDO[0-7]
JL7119
JL7120
TP7128
C7129
XX
FE_CVBS
C7132
10p
FE_+1V5
3.3V_MAIN

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