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3) The core board is equipped with SPI device, the default boot from SPI flash.
In order to support different boot modes, it is necessary to pull up and down the BOOT pin on the base
board, the circuit diagram is shown below.
BOOT_SEL0# of SW1 corresponds to BOOT_SET_N of the core board, and BOOT_SEL1# is empty.
The currently supported boot mode are configured as shown in the following table.
SW1 Status
01
11
Note: 0 indicates SW1 ends are disconnected; 1 identifies SW1 ends are shorted.
6.11 JTAG Interface（J5）
A JTAG interface is reserved for system debugging.
Room 02-04, 10/F, Block A, Building 8, Shenzhen International Innovation Valley, Dashi Road, Nanshan District, Shenzhen, Guangdong, China
Emai:
support@geniatech.com
BOOT pin configuration circuit
Boot mode
eMMC
Serial port
Tel: (+ 86) 755 86028588
37
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