Table of Contents
Advertisement
High level input voltage
Low level input voltage
High level output voltage
Low level output voltage
3.3 Power Consumption Parameters
Operating State
Free state
Full load state
Note: Test data is related to specific application scenarios and is for reference only.
Free state: the system is started, the development board is not connected to other external modules,
and the program is not executed.
Full load state: the system boots up, the development board is not connected to other external modules,
running the DDR pressure read/write test program, the resource utilization of the two ARM Cortex-A53
cores is about 100%.
3.4 Interface Speed
Parameters
Serial communication speed
SPI communication speed
IIC communication speed
CAN communication speed
SD/MMC/SDIO
USB interface speed
AD acquisition time
Room 02-04, 10/F, Block A, Building 8, Shenzhen International Innovation Valley, Dashi Road, Nanshan District, Shenzhen, Guangdong, China
Emai:
support@geniatech.com
VIH
VIL
VOH
VOL
Voltage Typical
12.0V
12.0V
Minimum
--
--
--
--
--
--
0.7
Tel: (+ 86) 755 86028588
0.7xVDD
--
NVCC_3V3
0
--
VDD - 0.2
--
--
--
Current Typical
0.15A
0.23A
Specifications
Typical
Maximum
115200
--
--
52
100
400
--
1
--
104
--
480
--
1.25
V
--
0.2xVDD
V
--
--
V
--
0.2
V
--
Power Consumption Typical
1.8W
2.76W
Remark
Unit
bps
--
MHz
--
Kbps
--
Mbps
--
Mbps
--
Mbps
--
uS
Fadc=40 MHz
9
Advertisement
Table of Contents
