Geniatech DB-G2L-V2 Hardware Manual page 38

20 UART4 send data
21 QSPI_A Data input output 3/Hold or Reset input
22 UART4 receive data
23 QSPI_A Chip select input
24 Ground signal
25 QSPI_A clock
26 SPI_B Master out slave in
27 Ground signal
28 SPI_B Master in slave out
29 GPIO
30 SPI_B Chip select input
31 GPIO
32 SPI_B synchronous clock signal
33 GPIO
34 Ground signal
35 GPIO
36 I2C_B clock
37 GPIO
38 I2C_B data
39 Ground signal
40 Output power supply 3.3V
Room 02-04, 10/F, Block A, Building 8, Shenzhen International Innovation Valley, Dashi Road, Nanshan District, Shenzhen, Guangdong, China
Emai: support@geniatech.com Tel: (+ 86) 755 86028588
SCIF4_TXD/CAN_PWR
SPI_A_D3/HOLD
SCIF4_RXD
SPI_A_CS0
GND
SPI_A_SCK
SPI_B_SDI(MOSI)
GND
SPI_B_SDO(MISO)
GPIO_A_2
SPI_B_CS0
GPIO_A_3
SPI_B_CLK
GPIO_A_7
GND
GPIO_B_0
I2C_B_SCL
GPIO_B_1
I2C_B_SDA
GND
VCC_3V3
34