Advertisement
4.23.1
PHASE 1, AUTO ZERO
During
auto zero, the errors in the analog
components (offset voltages of buffers, comparators,
etc.)
will
be
automatically
nulled
out.
This
is
performed by internal logic that disconnects the input
pins
(9
&
10)
from
the
applied
analog
signal,
connects them to ground, then closes an internal
feedback loop such that offset error information is
stored in the "auto zero" capacitor, C21. Also during
this phase, "reference capacitor" C22 is charged to
the voltage present on "Vref" (pin 2 of U6).
4.23.2
PHASE 2, SIGNAL INTEGRATE
The input signal is reconnected and then
integrated
for exactly
10,000
clock
pulses.
On
completion of the integration period, the voitage V is
directly
proportional
to
the
input
voltage,
corresponding to the weight applied to the scale,
Capacitor
C20
is the
integration
capacitor,
with
resistor R32 setting the integration current.
At the
end
of this
phase
the
input
signal
polarity
is
determined.
4.23.3
PHASE 3, REF. INTEGRATE, SIGNAL DE-
INTEGRATE
The input to the integrator is switched from
the input signal to reference capacitor C22.
Internal
switches connect capacitor C22 to the integrator input
so that its polarity is opposite that of the previously
applied input signal.
This causes the integrator to
discharge back towards zero,
The number of clock
pulses counted between the beginning of this cycle
and
the time when
the integrator
output
passes
through zero is a digital measure of the magnitude of
the input signal.
This count is stored in an internal
latch on U6 for output to the microcomputer.
4.23.4
ZERO INTEGRATOR PHASE
One
minor additional
phase
is included to
insure that the integration
capacitor
C20
is fully
discharged to zero volts. This typically lasts 100-200
counts.)
4.23.5
CLOCK CIRCUIT
A clock is required for the A/D converter, integrated
circuit 6.
23005 R01
board;
Integrated circuit U2 is a dual
timer circuit. One half (pins 8,9,12,13) is connected as
an astable oscillator and used to generate a system
clock for the A/D converter.
Resistors R6, R7 and
capacitor C2 set the clack frequency to approximately
150 KHz.
23005
R02
board:
A
clock
signal
is generated
internally in microcomputer U? and appears on port
pin "P1.0".
The frequency is internally set by the
microcomputer's software and is nominally 120 KHz.
4.24
POWER
SWITCHING,
VOLTAGE
REGULATION, AND SUPPORT CIRCUITRY
Depending upon their configuration, SCALE-TRONIX®
second
generation
scales
may
contain
disposable
primary cells (models 5002, 5602, 6002, 6502, 6702),
an AC power supply (models 5102, 6202), or an AC
power
supply
with
rechargeable
batteries
(model
6102).
(Note that some
models
may
be specially
ordered to utilize a different power supply than is
normally provided;
refer to the technical description
that best matches the particular scale.)
Additional
circuitry
is included
to switch
the
battery
supply,
provide voltage
regulation,
and
detect low battery
voltage conditions.
4.24.1
BATTERY SWITCHING
In order to conserve battery life the battery supply is
switched on and off as needed by the scale.
23005 R01 board:
Transistor Q1 is a series switch
which applies battery voltage to the remainder of the
circuitry.
Q1 is controlled by transistor Q2 which, in
turn, is controlled by one-half of dual timer UT.
This
half of U1 (pins 1,2,4,5,8,10) is configured as a bi-
stable latch to keep the battery power "on" once set,
To
initiate
power-on
Q1
is
turned
on
through
momentary closure of membrane switch S9
CON)
and diode CR1.
The switch closure is also coupled
through diode CR2 to set latch U1, thus keeping O1
and Q2 "on" when S9 is released. The switch closure
is also coupled through diode CR10 to signal input pin
"PB.7" of port expander U7 that the "ON" switch is
pressed.
(Because
the
model
5102
remains
on
constantly, transistor Q1 is permanently wired "on" by
use of a jumper across J2 or JTEST.)
5002, 5102, 5602, 8002, 6102, 8202, 6502, 6702
19
Advertisement
