Xs1-L2 Device [A] - XMOS XS1-L2 Hardware Manual

USB Audio 2.0 Reference Design, XS1-L2 Edition Hardware Manual (1.6)

3 XS1-L2 Device [A]

The board is based on a single XS1-L2 device in a 124 pin QFN package.
The XS1-L2 consists of a two XCore processors. Each XCore comprises an event-
driven multi-threaded processor with tightly integrated general purpose I/O pins, 64
KBytes of on-chip RAM and 8 KBytes of OTP (One Time Programmable) memory.
XCore processors have time-aware ports that are directly connected to the I/O pins.
Examples of how to write software that interfaces over these ports are provided in
Programming XC on XMOS Devices available from
3.1 Clocking [K]
A discrete 13MHz pierce oscillator is used to feed the XS1-L2 reference clock input
and also the USB3318 USB transceiver. The L2 has MODE1 and MODE0 pins wired to
ground which sets the internal XS1-L2 PLL multiplication factor to 30.75. This results
in a default core clock frequency of 399.75MHz and an I/O reference clock frequency
of 99.9375MHz.
3.2 Reset
A supply voltage supervisor connected to the 1V0 core supply is used to provide
a reset to the L2. This ensures the device is reset at power on and also provides
predictable behaviour under brownout conditions. The device can also be reset over
the XSYS debug interface.
3.3 Boot
The boot mode of the XS1-L2 is set by the MODE3 and MODE2 pins which are
connected together on the board.
With MODE3 and MODE2 both high (default), the device will boot from the 4Mb SPI
FLASH on the board. With MODE3 and MODE2 both low, the device will not boot
from SPI FLASH, thus instead allowing boot via JTAG using the XSYS debug link.
To allow automatic boot mode selection based on debug hardware presence the
MODE2 and MODE3 pins are connected to the TRST_N of the debug connector.
Without debug hardware connected to the XSYS interface, the board will boot from
SPI FLASH. With the XTAG2 connected to the XSYS interface, the host can control the
boot mode of the device by way of the TRST_N line. This functionality is provided
purely for developer convenience. A typical production board might use a jumper or
switch for manual boot mode selection if JTAG boot is required.
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