Supermicro X7DWT User Manual page 64

Supermicro x7dwt motherboards: user guide
Table of Contents

Advertisement

X7DWT-INF User's Manual
Fast String Operations
Set to Enabled to enable the fast string operations for special CPU instructions.
The options are Disabled and Enabled.
Thermal Management 2
Set to Enabled to use Thermal Management 2 (TM2) which will lower CPU voltage
and frequency when the CPU temperature reaches a predefi ned overheat threshold.
Set to Disabled to use Thermal Manager 1 (TM1), allowing CPU clocking to be
regulated via CPU Internal Clock modulation when the CPU temperature reaches
the overheat threshold.
C1/C2 Enhanced Mode
Set to Enabled to enable Enhanced Halt State to lower CPU voltage/frequency to
prevent overheat. The options are Enabled and Disabled. (Note: please refer
to Intel's web site for detailed information.)
Execute Disable Bit (Available if supported by the CPU and the
OS)
Set to Enabled to enable Execute Disable Bit and allow the processor to classify
areas in memory where an application code can execute and where it cannot, and
thus preventing a worm or a virus from inserting and creating a fl ood of codes
to overwhelm the processor or damage the system during an attack. Note: this
feature is available when your OS and your CPU support the function of Execute
Disable Bit. The options are Disabled and Enabled. For more information, please
refer to Intel's and Microsoft's web sites.
Adjacent Cache Line Prefetch
The CPU fetches the cache line for 64 bytes if this option is set to Disabled. The
CPU fetches both cache lines for 128 bytes as comprised if Enabled. The options
are Disabled and Enabled.
Hardware Prefetch
Set to this option to Enabled to enable the hardware components that are used
in conjunction with software programs to prefetch data in order to speed up data
processing. The options are Disabled and Enabled.
Set Maximum Ext. CPUID=3
When set to Enabled, the Maximum Extended CPUID will be set to 3. The options
are Disabled and Enabled.
Direct Cache Access
Set to Enable to route inbound network IO traffi c directly into processor caches
to reduce memory latency and improve network performance.
Disabled and Enabled.
Available when supported by the CPU
(
Available when supported by the CPU
(
Available when supported by the CPU
(
Available if supported by the CPU
(
Available if supported by the CPU
(
Available if supported by the CPU
(
4-14
)
)
)
)
)
)
The options are

Advertisement

Table of Contents
loading

This manual is also suitable for:

X7dwt-inf

Table of Contents