Ide Timing - HighPoint HPT366 Data Manual

HighPoint Technologies,Inc
5.5

IDE Timing

ADDR valid
DIOR-/DIOW-
WRITE
DD(7:0)
READ
DD(7:0)
IORDY
IORDY
IORDY
*Notes:
1. Device address consists of signals CS0_, CS1_ and DA(2:0).
2. Data consists of DD(7:0).
3. The negation of IORDY_ by the device is used to extend the PIO cycle.
The determination of whether the cycle is to be extended is made by the
host after
t
0
t
1
t
A
t
A from the assertion of DIOR-or DIOW-.
t
2
t
t
3 4
t t
5 6
t
C
t
RD
t
t
B
C
5-6
Timing/IDE Timing
t
9
t
2i
t
6z
HPT366 Data Manual
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