Eprom Interface Pins - HighPoint HPT366 Data Manual

HighPoint Technologies,Inc

EPROM Interface Pins

Pin Number Pin Name
53,86,54,52, MA(16-0)
82,83,84,87,
85,97,99,102,
103,106,107,
110,111,114,
115,118,119,
49,50
129,128,126, MD(7-0)/
125,122,120, SD(7-0)
117,116,113,
112,109,108,
105,104,101,
100
132 SCL/
131 SDA/
EFM_WE_
51 PA2/
EFMCS_
Type Description
O Memory Address Bus. This bus is used in conjunction with
the memory address strobe pins and external address latches
to assemble up to a 20-bit address for an external EPROM or
flash memory. This bus puts out the least significant byte first
and finishes with the most significant bits. It is also used to
write data to a flash memory or read data into the chip from
external EPROM/flash memory. They are also use as PCBLID,
SCBLID, PA(1-0), SCS1_,SCS0_,SA(2-0),SD(15-10), PCS1_
and PCS0_ signal. (Please refer to Other Pins for MA7.)
I/O Memory Data Bus. This bus is used in conjunction with the
memory address strobe pins and external address latches to
assemble up to a 20-bit address for an external EPROM or
flash memory. This bus puts out the least significant byte first
and finishes with the most significant bits. It is also used to
write data to a flash memory or read data into the chip from
external EPROM/flash memory. All MD pins have internal
pull-down resistors. They are also used Secondary IDE Data
signal.
O EPROM Output Enable. This pin is used as an output enable
EFM_OE_ signal to an external EPROM or flash memory during read
operations. It is also used as a SCL signal.
O EPROM Write Enable. This pin is used as a write enable signal
to an external flash memory. When system reset, this signal will
be latched on rising edge of PCIRST_ signal. If latched values
of SDA/EFM_WE_ & TRI signals are both high-LEV, the
configuration will be loaded from parallel EPROM automatically.
It is also used as a SDA signal.
O EPROM Chip Select. It is also used as a Primary IDE Device
Address signal.
Signal Descriptions/144 Pins Listing
2-7
HPT366 Data Manual
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