MSI 845PE Max Manual page 63

MS-6580 ATX Mainboard
the following fields automatically to be determined by BIOS based on
the configurations on the SPD. Selecting Disabled allows users to con-
figure these fields manually.
CAS# Latency
This controls the timing delay (in clock cycles) before SDRAM starts
a read command after receiving it. Settings: 2, 2.5 (clocks). 2 (clocks)
increases the system performance the most while 2.5 (clocks) pro-
vides the most stable performance.
RAS# Precharge
This item controls the number of cycles for Row Address Strobe (RAS)
to be allowed to precharge. If insufficient time is allowed for the RAS
to accumulate its charge before DRAM refresh, refresh may be in-
complete and DRAM may fail to retain data. This item applies only
when synchronous DRAM is installed in the system. Available
settings: 2 clocks, 3 clocks.
RAS# to CAS# Delay
When DRAM is refreshed, both rows and columns are addressed
separately. This setup item allows you to determine the timing of the
transition from RAS (row address strobe) to CAS (column address
strobe). The less the clock cycles, the faster the DRAM performance.
Setting options: 3 clocks, 2 clocks.
Precharge Delay
This setting controls the precharge delay, which determines the tim-
ing delay for DRAM precharge. Settings: 5 clocks, 6 clocks, 7 clocks.
Burst Length
This setting allows you to set the size of Burst-Length for DRAM.
Bursting feature is a technique that DRAM itself predicts the address
of the next memory location to be accessed after the first address is
accessed. To use the feature, you need to define the burst length,
which is the actual length of burst plus the starting address and allows
internal address counter to properly generate the next memory location.
The bigger the size, the faster the DRAM performance. Available
settings: 4, 8.
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