ASRock Industrial IMB-1239-WV Quick Start Manual

IMB-1239-WV
The terms HDMI ® and HDMI High-Definition
Multimedia Interface, and the HDMI logo are
trademarks or registered trademarks of HDMI
Licensing LLC in the United States and other
countries.
Revision History
Date Description
April 24, 2023 First Release
August 14, 2023 Second Release

1 : ESPI Header (ESPI1)

Pin Signal Name
1 GND
2 ESPI_CLK
3 GND
4 ESPI_CS#
5 ESPI_RESET#
6 GND
7 +3V
8 GND
9 SMB_CLK
10 SMB_DATA
11 ESPI_IO0
12 ESPI_IO1
13 ESPI_IO2
14 ESPI_IO3
15 GND
16 +3VSB
17 NA
18 GND
19 ESPI_ALERT#
20 GND

2 : M.2 Key-B Socket (M2_B1)

Pin Signal Name Signal Name Pin
1 NA +3.3V 2
3 GND +3.3V 4
5 GND Full_Card_Power_off 6
7 USB_D+ W_DISABLE1# 8
9 USB_D- NA 10
11 GND
21 GND NA 20
23 NA NA 22
25 NA NA 24
27 GND NA 26
29 USB3_RX- NA 28
31 USB3_RX+ UIM_RESET 30
33 GND UIM_CLK 32
35 USB3_TX- UIM_DATA 34
37 USB3_TX+ UIM_PWR 36
39 GND NA 38
41 PERn0 NA 40
43 PERp0 NA 42
45 GND NA 44
47 PETn0 NA 46
49 PETp0 NA 48
51 GND PERST# 50
53 PEFCLKn CLKREQ# 52
55 PEFCLKp WAKE# 54
57 GND NA 56
59 NA NA 58
61 NA NA 60
63 NA NA 62
65 NA NA 64
67 NA NA 66
69 NA NA 68
71 GND +3.3V 70
73 GND +3.3V 72
75 NA +3.3V 74

3 : Battery Connector (BAT1)

Pin Signal Name
1 +BAT
2 GND
4 : SATA Power Output Connector
(SATA_PWR1)
Pin Signal Name
1 +5V
2 GND
3 GND
4 +12V

5 : SATA3 Connectors (SATA3_5, SATA3_6)

Pin Signal Name
1 GND
2 SATA-A+
3 SATA-A-
4 GND
5 SATA-B-
6 SATA-B+
7 GND

Jumpers and Headers Setting Guide

1
1
USB 3.2 Gen2
45
T: USB3_2
B: USB3_1
44
USB 2.0
T: USB3_8
B: USB3_7
43
USB3_4_9
42
41
HDMI2
LAN2
1
40
USB2_5_6
39
1
38
LAN1
1 SPEAKER1
37
36
Line Out
35
1
HD_AUDIO1
34 Mic In
DC_4PIN1
33
DC_JACK1 1
1
1
32
TO_UPS1
SPDIF1
31 30 29 28
6 : Digital Input / Output Power Select
(JGPIO_PWR1)
1-2: +12V (Default)
20
1
2-3: +5V
7 : Digital Input / Output Default Value
Setting (JGPIO_SET1)
1-2: Pull-High (Default)
2-3: Pull-Low

8 : Digital Input/Output Pin Header (JGPIO1)

Pin Signal Name
1 SIO_GP71
3
SIO_GP72
5 SIO_GP73
7
SIO_GP74
9 JGPIOPWR_R

9 : COM Port Headers (COM1, COM3)*

Pin Signal Name
1
DDCD#
3
TTXD
5
GND
7
RRTS#
9
PWR
* This motherboard supports RS232/422/485 on COM1, 3 ports. Please refer to
the table below for the pin definition. In addition, COM1, 3 ports (RS232/422/485)
can be adjusted in BIOS setup utility > Advanced Screen > Super IO Configura-
tion. You may refer to our user manual for details.
COM1, 3 Ports Pin Definition
Pin RS232
1 DCD
2 RXD
3 TXD
4 DTR
5 GND
6 DSR
7 RTS
8 CTS
9 PWR
10 : COM Port PWR Setting Jumpers
2 1
PWR_COM1 (For COM Port1)
BAT1
1-2: +5V (Default)
2-3: +12V
11 : HEATER1 Header (HEATER1)
Pin Signal Name
1 Heater PWR
1 4
2
3
12 : Backlight Power Select
(LCD_BLT_VCC) (BKT_PWR1)
7
1-2: LCD_BLT_VCC: +5V (Default)
2-3: LCD_BLT_VCC: +12V
1
4-5: LCD_BLT_VCC: DC_IN
2 3 4 5 6 7 8 9
1 1
1 1
1
1
ESPI1 JGPIO_SET1 1 JGPIO1 COM3
BAT1
SATA_PWR1
JGPIO_PWR1
1
DDR _A1 5
M2_B1
1
DDR _B1 5
1
IMB-1239-WV
1
BIOS
ROM
M2_KEYE1
1
M2_KEYM1
1
1
CPU_FAN1
PWR_ADAPTER
C HA _FAN1
1 1
PCIE1
27 26 25
1 2 3
1 2 3
Signal Name Pin
2
GPP_H23 2
4
GPP_I10
GPP_E5 6
8
GPP_E6
1
GND 10
Signal Name Pin
10 2
2
RRXD
4
DDTR#
6
DDSR#
8
CCTS# 9 1
10
RS422 RS485
TX- RTX-
RX+ N/A
TX+ RTX+
RX- N/A
GND GND
N/A N/A
N/A N/A
N/A N/A
PWR PWR
1 2 3
3 2 1
GND
NCT
1 5
10 11 12 13
1 1 1 1
PWR_COM1 HEATER1 BKT_PWR1 DACC1
1
COM1 14
15
1
16 (*Backside: EDP1)
1
1
PNL_PWR1
17
1
18
1
EDP_BLT_PWR2
Industrial
1
19
CI1_2
20
CLRMOS1
1
1
21
PWR_BAT1_SIO_AT1
1
22
AT_TEST1_PCIE_PWR1
PLED PWRBTN
23
PANEL1
1
HDLED RESET
24
SMBUS_TEST1
1
13 : DACC1
Open: no ACC
Short: ACC (Default)
• Auto clear CMOS when system boot improperly.
14 : Backlight Volume Control
(BLT_VOL1)
Pin Signal Name
1 GPIO_VOL_UP
2 GPIO_VOL_DW
3 PWRDN
4 BLT_UP
5 BLT_DW
6 GND
10 7 GND
15 : Inverter Power Control Wafer
9
(BLT_PWR1)
Pin Signal Name
1 GND
2 GND
3 CON_LBKLT_CTL
4 CON_LBKLT_EN
5 LCD_BLT_VCC
6 LCD_BLT_VCC
16** : LVDS Panel Connector
(LVDS1)
Pin Signal Name Signal Name
1 LCD_VCC LCD_VCC
3 +3.3V N/A
5 N/A LVDS_A_DATA0#
7 LVDS_A_DATA0 PD (Panel Detection)
9 LVDS_A_DATA1# LVDS_A_DATA1
11 GND LVDS_A_DATA2#
13 LVDS_A_DATA2 GND
15 LVDS_A_DATA3# LVDS_A_DATA3
17 GND LVDS_A_CLK#
19 LVDS_A_CLK GND
21 LVDS_B_DATA0# LVDS_B_DATA0
23 GND LVDS_B_DATA1#
25 LVDS_B_DATA1 GND
27 LVDS_B_DATA2# LVDS_B_DATA2
29 DPLVDD_EN LVDS_B_DATA3#
31 LVDS_B_DATA3 GND
33 LVDS_B_CLK# LVDS_B_CLK
35 GND CON_LBKLT_EN
37 CON_LBKLT_CTL LCD_BLT_VCC
39 LCD_BLT_VCC LCD_BLT_VCC
** PD (Panel Detection): Connect this pin to
LVDS Panel's Ground pin to detect Panel
detection.
40
39 40 1
1
4 0
1 2
1 2
7
1
6
1
** eDP Connector
(on the Backside
of PCB)
Pin
Pin Signal Name
2 1 NA
4
2 GND
6
3 eDP_TX#3_CON
8
4 eDP_TX3_CON
10
5 GND
12
6 eDP_TX#2_CON
14
7 eDP_TX2_CON
16
8 GND
18
20
9 eDP_TX#1_CON
22
10 eDP_TX1_CON
24
11 GND
26
12 eDP_TX#0_CON
28
13 eDP_TX0_CON
30
14 GND
32
15 eDP_AUX_CON
34
36 16 eDP_AUX#_CON
38
17 GND
40
18 LCD_VCC
19 LCD_VCC
20 LCD_VCC
21 LCD_VCC
22 NA
23 GND
24 GND
25 GND
26 GND
27 eDP_HPD_CON
28 GND
29 GND
30 GND
31 GND
32 eDP_BKLTEN
33 eDP_BKLTCTL_R
34 SMB_DATA_MAIN
35 SMB_CLK_MAIN
36 LCD_BLT_VCC
37 LCD_BLT_VCC
38 LCD_BLT_VCC
39 LCD_BLT_VCC
40 NA