CompuLab UCM-iMX93 Reference Manual page 44

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Revised May 2023
LVDS_TX1_N 4.1.2
GND 5.1
LVDS_TX0_P 4.1.2
LVDS_TX0_N 4.1.2
GND 5.1
CSI_CLK_N 4.2
CSI_CLK_P 4.2
GND 5.1
SD3_CLK 4.7
FLEXSPI_SCLK 4.8
GPIO3_IO[20] 4.18
SD3_CMD 4.7
FLEXSPI_SS0 4.8
GPIO3_IO[21] 4.18
GND 5.1
SD3_DATA0 4.7
FLEXSPI_DATA[0] 4.8
GPIO3_IO[22] 4.18
SD3_DATA1 4.7
FLEXSPI_DATA[1] 4.8
GPIO3_IO[23] 4.18
GND 5.1
SD3_DATA2 4.7
FLEXSPI_DATA[2] 4.8
GPIO3_IO[24] 4.18
SD3_DATA3 4.7
FLEXSPI _DATA[3] 4.8
GPIO3_IO[25] 4.18
GPIO2_IO[6] 4.18
TPM5_CH0 4.14
SPI7_SOUT 4.11
UART6_RTS 4.9
I2C7_SDA 4.12
GND 5.1
GPIO2_IO[5] 4.18
TPM4_CH0 4.14
SPI7_SIN 4.11
UART6_RX 4.9
I2C6_SCL 4.12
GPIO2_IO[4] 4.18
TPM3_CH0 4.14
SPI7_PCS0 4.11
UART6_TX 4.9
I2C6_SDA 4.12
ENET1_MDC 4.4.2
UART3_DCB 4.9
I3C2_SCL 4.13
GPIO4_IO[0] 4.18
ENET1_MDIO 4.4.2
UART3_RIN 4.9
I3C2_SDA 4.13
GPIO4_IO[1] 4.18
ONOFF 5.3.1
UCM-iMX93 Reference Guide
Carrier board Interface
19 V_SOM
21 MIPI_DSI1_CLK_N
23 MIPI_DSI1_CLK_P
25 TAMPER0
27 TAMPER1
29 V_SOM
31 CSI_D0_N
33 CSI_D0_P
35 CSI_D1_N
37 CSI_D1_P
39 V_SOM
ENET2_RD0
UART4_RX
41
SAI2_TX_DATA[2]
GPIO4_IO[24]
ENET2_RD1
SPDIF1_IN
43
SAI2_TX_DATA[3]
GPIO4_IO[25]
ENET2_RD2
UART4_RTS
45 SAI2_MCLK
MQS2_RIGHT
GPIO4_IO[26]
ENET2_RD3
SPDIF1_OUT
47 SPDIF1_IN
MQS2_LEFT
GPIO4_IO[27]
49 NC
SD2_RESET
51
GPIO3_IO[7]
ENET2_RX_CTL
UART4_DSR
53
SAI2_TX_DATA[0]
GPIO4_IO[22]
ENET2_RXC
55 SAI2_TX_DATA[1]
GPIO4_IO[23]
57 V_SOM
ENET2_TD0
UART4_TX
59
SAI2_RX_DATA[3]
GPIO4_IO[19]
ENET2_TD1
UART4_RTS
61
SAI2_RX_DATA[2]
GPIO4_IO[18]
ENET2_TD3
63 SAI2_RX_DATA[0]
GPIO4_IO[16]
5.1
4.1.1
4.1.1
4.16
4.16
5.1
4.2
4.2
4.2
4.2
5.1
4.4.2
4.9
4.3.2
4.18
4.4.2
4.3.1
4.3.2
4.18
4.4.2
4.9
4.3.2
4.3.3
4.18
4.4.2
4.3.1
4.3.1
4.3.3
4.18
5.9
4.7
4.18
4.4.2
4.9
4.3.2
4.18
4.4.2
4.3.2
4.18
5.1
4.4.2
4.9
4.3.2
4.18
4.4.2
4.9
4.3.2
4.18
4.4.2
4.3.2
4.18
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