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CompuLab CL-SOM-AM57 Series Reference Manual

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CL-SOM-AM57x
Reference Guide

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Summary of Contents for CompuLab CL-SOM-AM57 Series

  • Page 1 CL-SOM-AM57x Reference Guide...
  • Page 2 To the extent permitted by law no liability (including liability to any person by reason of negligence) will be accepted by Compulab Ltd., its subsidiaries or employees for any direct or indirect loss or damage caused by omissions from or inaccuracies in this document.

  • Page 3: Table Of Contents

    Table of Contents Table of Contents INTRODUCTION ......................6 About This Document ....................6 CL-SOM-AM57x Part Number Legend ..............6 Related Documents ...................... 6 OVERVIEW ........................7 Highlights ........................7 Block Diagram ......................8 CL-SOM-AM57x Features ..................9 CORE SYSTEM COMPONENTS ................11 AM57x SoC .......................
  • Page 4 Table of Contents 4.20 Quadrature Encoder Pulse module (eQEP) ............42 4.21 PRU-ICSS ......................42 4.21.1 PRU-ICSS MII ....................42 4.21.2 PRU-ICSS UART ..................... 43 4.21.3 PRU-ICSS Industrial Ethernet Peripheral ............43 4.21.4 PRU-ICSS Enhanced Capture Event Module (PRU-ICSS eCAP) ....44 4.21.5 PRU-ICSS GPI / GPO ..................
  • Page 5 WL1837MOD is populated  (4.12) Table 39 updated Description and Availability Please check for a newer revision of this manual at the CompuLab web site http://www.compulab.com. Compare the revision notes of the updated manual from the web site with those of the printed or electronic version you have.

  • Page 6: Introduction

    This document is part of a set of reference documents providing information necessary to operate and program CompuLab CL-SOM-AM57x Computer-on-Module. CL-SOM-AM57x Part Number Legend Please refer to the CompuLab website ‘Ordering information’ section to decode the CL-SOM- AM57x part number: http://www.compulab.com/products/computer-on-modules/cl-som-am57x- ti-am5728-am5718-system-on-module/#ordering.

  • Page 7: Overview

    Overview OVERVIEW Highlights  Texas Instruments Sitara AM57x processors, 1.5GHz  Up to 4GB DDR3 and 32GB on-board eMMC  PowerVR SGX544 GPU, 1080p VPU and C66x DSP  Dual-band 802.11a/b/g/n WiFi and Bluetooth 4.1 BLE  2x PCIe, 2x GbE, SATA, USB3, 3x USB2, 9x UART, 87x GPIO ...

  • Page 8: Block Diagram

    Overview Block Diagram Figure 1 CL-SOM-AM57x Block Diagram up to 3x I2C bus 24/8bit Video up to 1x HDQ 1-wire 2x ARM Input Port up to 9x UART Cortex A15 up to 3x SPI 16bit Video up to 4x I2S/McASP Input Port up to 2x CAN bus 2x C66x...

  • Page 9: Cl-Som-Am57X Features

    Overview CL-SOM-AM57x Features The "Option" column specifies the CoM/SoM configuration option required to have the particular feature. When a CoM/SoM configuration option is prefixed by “NOT”, the particular feature is only available when the option is not used. A feature is only available when a CoM/SoM configuration complies with all options denoted in the “Option”...
  • Page 10 Overview Table 4 Electrical, Mechanical and Environmental Specifications Electrical Specifications Supply Voltage 4.2V to 5V Digital I/O voltage 3.3V 2.5 – 6.5 W, depending on board configuration and system workload Active power consumption Mechanical Specifications Dimensions 60 x 68 x 5 mm Weight 35 gram Connectors...

  • Page 11: Core System Components

    Core system components CORE SYSTEM COMPONENTS AM57x SoC The TI Sitara AM57x system-on-chip (SoC) is built around dual-core ARM Cortex-A15 CPU. Dual C66x VLIW DSP cores and dedicated ARM Cortex-M4 IPUs make AM572x a powerful platform for image and video processing systems, while dual PowerVR SGX544 GPU and IVA-HD video sub- system enable multimedia demanding applications.

  • Page 12: Display Subsystem

    Core system components 3.1.1 DSP Subsystem The AM57x SoC includes up to two identical instances (DSP1 and DSP2) of a digital signal processor (DSP), based on the TI's standard TMS320C66x™ DSP CorePac core. Each of the two DSP subsystems integrated in the device includes the following components: ...
  • Page 13 Core system components 3.1.5 2D Graphics Accelerator The 2D graphics accelerator subsystem accelerates 2D graphics applications. The 2D graphics accelerator subsystem is based on the GC320 2D GPU core from Vivante Corporation. The hardware acceleration is brought to numerous 2D applications, including on-screen display and touch screen user interfaces, graphical user interfaces (GUIs) and menu displays, flash animation, and gaming.

  • Page 14: Memory

    Core system components Memory 3.2.1 DRAM AM5728 includes two 32-bit DDR controllers (EMIF1 and EMIF2). AM5718 includes one 32-bit DDR controller (EMIF1). CL-SOM-AM57x is equipped with up to 4GB of onboard DDR3 memory. The DDR3 data bus is 32- bits wide and operates at 533 MHz clock frequency (DDR3-1066). NOTE: 2GB and 4GB DDR3 memory capacities are available with C1500D option only.

  • Page 15: Peripheral Interfaces

    Peripheral Interfaces PERIPHERAL INTERFACES CL-SOM-AM57x implements a variety of peripheral interfaces through the SODIMM-204 carrier board connector. The following notes apply to interfaces available through the SODIMM-204 interface:  Some interfaces/signals are available only with/without certain configuration options of CL-SOM-AM57x. The availability restrictions of each signal are described in the “Signals description”...
  • Page 16 Peripheral Interfaces  "PU18" – Always pulled up to 1.8V on-board CL-SOM-AM57x, (typ. 5KΩ-15KΩ).  "PU33" – Always pulled up to 3.3V on-board CL-SOM-AM57x, (typ. 5KΩ-15KΩ).  "PUSUPPLY" – Always pulled up to 3.8V - 5.25V on-board CL-SOM-AM57x, (typ. 5KΩ-15KΩ). ...

  • Page 17: Display Interface

    Peripheral Interfaces Display Interface CL-SOM-AM57x display interface is derived from the AM57x display subsystem. The display subsystem key features are:  Support of hardware cursor, independent gamma curve on all interfaces, multiple-buffer, and programmable color phase rotation  Display controller: ...

  • Page 18: Hdmi Interface

    Peripheral Interfaces Signal Name Type Description Availability VOUT1_D4 116* Video Output 1 Data output Always VOUT1_D5 118* Video Output 1 Data output Always VOUT1_D6 120* Video Output 1 Data output Always VOUT1_D7 122* Video Output 1 Data output Always VOUT1_D8 124* Video Output 1 Data output Always...

  • Page 19: Parallel Camera Interface

    Peripheral Interfaces  Transfer rate up to 135 Mpps, pixel clock frequency range 10 MHz to135 MHz  Suited for display resolutions ranging from HVGA up to HD with low EMI  Operates From a Single 3.3-V Supply NOTE: CL-SOM-AM57x LVDS display interface is available only with the ‘L’ and 'C1500D' ordering option.
  • Page 20 Peripheral Interfaces  One separate 24-bit video ports for parallel RGB/YUV/RAW data, up to 165 MHz  One separate 8-bit video ports for YUV/RAW data, up to 165 MHz For additional details on VIP modules, please refer to the AM572x or AM571x technical reference manual.
  • Page 21 Peripheral Interfaces Signal Name Type Description Availability VIN1A_D3 Video Input 1 Port A Data input With "C1500" VIN1A_D3 Video Input 1 Port A Data input With "C1500" VIN1A_D3 144* Video Input 1 Port A Data input With "C1500" VIN1A_D3 174* Video Input 1 Port A Data input With "C1500"...
  • Page 22 Peripheral Interfaces Signal Name Type Description Availability VIN2A_D1 103* Video Input 2 Port A Data input With "C1500" VIN2A_D1 Video Input 2 Port A Data input With "C1500D" VIN2A_D1 Video Input 2 Port A Data input With "C1500" VIN2A_D10 139* Video Input 2 Port A Data input With "C1500"...
  • Page 23 Peripheral Interfaces Table 10 Parallel camera VIN2B Interface Signals Signal Name Type Description Availability VIN2B_CLK1 179* Video Input 2 Port B Clock input With "C1500D" VIN2B_CLK1 179* Video Input 2 Port B Clock input With "C1500" VIN2B_D0 163* Video Input 2 Port B Data input With "C1500D"...
  • Page 24 Peripheral Interfaces Signal Name Type Description Availability VIN3A_DE0 104* Video Input 3 Port A Data Enable input With "C1500D" VIN3A_FLD0 Video Input 3 Port A Field ID input With "C1500D" VIN3A_HSYNC0 100* Video Input 3 Port A Horizontal Sync input With "C1500D"...
  • Page 25 Peripheral Interfaces Signal Name Type Description Availability VIN4A_FLD0 Video Input 4 Port A Field ID input With "C1500D" VIN4A_FLD0 Video Input 4 Port A Field ID input With "C1500D" Video Input 4 Port A Horizontal VIN4A_HSYNC0 100* With "C1500D" Sync input Video Input 4 Port A Horizontal VIN4A_HSYNC0 With "C1500D"...

  • Page 26: Pci Express

    Peripheral Interfaces PCI Express CL-SOM-AM57x PCI Express interface is derived from the AM57x integrated PCIe module. Two instances of the PCIe are available. Two operation modes are supported with CL-SOM- AM57x:  A single controller with two lanes (PCIe_SS1 only) ...

  • Page 27: Sata

    Peripheral Interfaces SATA CL-SOM-AM57x incorporates one SATA-2 (3-Gbps) interface. The SATA controller supports the following key features:  Serial ATA 1.5-Gbps and 3-Gbps speeds (SATA-1 and SATA-2)  Support of all SATA power management features  HBA port associated Internal DMA engine ...

  • Page 28: Usb2.0 Ports

    Peripheral Interfaces USB2.0 ports USB2.0 interface is derived from the Sitara AM57x High-Speed (HS) USB 2.0 Dual-Role-Device (DRD) subsystem. USB 2.0 DRD subsystem supports following features:  Integrated HS/FS PHY  Supports USB Peripheral (or Device) mode at speeds HS(480 Mbps), FS, and LS. ...

  • Page 29: Ethernet

    Peripheral Interfaces Ethernet CL-SOM-AM57x incorporates two full-featured 10/100/1000 ethernet ports implemented with the two MACs built into the AM57x SoC, coupled with two AR8033 RGMII Ethernet PHYs from Atheros. Both ethernet interfaces support the following main features:  10/100/1000 BASE-T IEEE 802.3 compliant ...

  • Page 30: Wireless Interfaces

    Peripheral Interfaces Signal Name Type Description Availability With "E1" OR ETH1_MDI1N Negative part of 100ohm diff-pair 1 "E2" With "E1" OR ETH1_MDI1P Positive part of 100ohm diff-pair 1 "E2" With "E1" OR ETH1_MDI2N Negative part of 100ohm diff-pair 2 "E2" With "E1"...

  • Page 31: Dual Band Wlan & Bluetooth

    Peripheral Interfaces NOTE: CL-SOM-AM57x WiFi 802.11 b/g/n (without Bluetooth) functionality is available only with the ‘W’ ordering option. 4.8.2 Dual Band WLAN & Bluetooth CL-SOM-AM57x can be optionally shipped with the Texas Instruments WL1837MOD WLAN/Bluetooth module soldered onboard. WL1837MOD is a WiLink™ 8 based Dual-Band industrial module enabling Wi-Fi®, Bluetooth®, and Bluetooth Low Energy (BLE) functionality with CL-SOM-AM57x.
  • Page 32 Peripheral Interfaces Parameter Test conditions Unit = 16Ω load Signal-to-noise ratio, A- weighted = 10mW 0.056 rms (-5dB) 1kHz output, Total harmonic distortion Rload = 32Ω = 20mW 0.56 rms (-2dB) 1 kHz, 100 mV Power supply rejection ratio 20Hz – 20kHz, 100mV Programmable gain 1 kHz output Programmable-gain step size...

  • Page 33: Digital Audio (Mcasp)

    Peripheral Interfaces 4.10 Digital Audio (McASP) The multichannel digital audio interface available with CL-SOM-AM57x is based on the multichannel audio serial port module integrated into Sitara AM57x SoC. Up to four instances of the McASP block are available with CL-SOM-AM57x. McASP supports the following main features: ...

  • Page 34: Mmc / Sd /Sdio

    Peripheral Interfaces Table 26 McASP5 Interface Signals Signal Name Type Description Availability MCASP5_ACLKR MCASP5 Receive Bit Clock I/O Always MCASP5_ACLKX MCASP5 Transmit Bit Clock I/O Always MCASP5 Transmit High-Frequency Master Clock MCASP5_AHCLKX 152* Always MCASP5_AXR0 MCASP5 Transmit/Receive Data I/O Always MCASP5_AXR1 MCASP5 Transmit/Receive Data I/O Always...

  • Page 35: Uart

    Peripheral Interfaces Signal Name Pin # Type Description Availability MMC1_DAT2 MMC1 data bit 2 Always MMC1_DAT3 MMC1 data bit 3 Always MMC1_SDCD MMC1 Card Detect Always MMC1_SDWP MMC1 Write Protect Always Table 28 MMC/SD/SDIO 3 Interface Signals Signal Name Pin # Type Description Availability...
  • Page 36 Peripheral Interfaces Signal Name Type Description Availability UART1_RIN 149* UART1 Ring Indicator Input Without "W"/ "WAB" UART1_RTSN 147* UART1 request to send active low Without "W"/ "WAB" UART1_RXD UART1 Receive Data Input Always UART1_TXD UART1 Transmit Data Output Always Table 31 UART2 Interface Signals Signal Name Pin #...
  • Page 37 Peripheral Interfaces Signal Name Pin # Type Description Availability UART6_RXD 124* UART6 Receive Data Input Always UART6_RXD 135* UART6 Receive Data Input Always UART6_RXD UART6 Receive Data Input Always UART6_TXD UART6 Transmit Data Output Without "E2" UART6_TXD 126* UART6 Transmit Data Output Always UART6_TXD 129*...

  • Page 38: Spi

    Peripheral Interfaces 4.13 Up-to three SPI interfaces are accessible through the CL-SOM-AM57x carrier board interface. The SPI interfaces are derived from AM57x integrated multichannel serial port interface (McSPI). Each instance of McSPI port can operate as either a master or as an SPI slave. The following features are supported: ...

  • Page 39: Can Bus

    Peripheral Interfaces NOTE: Pins denoted with "*" are multifunctional. For additional details please refer to chapter 5.5 of this document 4.14 CL-SOM-AM57x is equipped with three I2C bus interfaces: I2C2, I2C3, and I2C5. The I2C interfaces are derived from Sitara AM57x I2C controllers. I2C2 controller support Fast mode (up to 400Kbps).

  • Page 40: Resistive Touch Interface

    Peripheral Interfaces  64 message objects in a dedicated message RAM  Support for DMA access For additional details on DCAN, please refer to the Sitara AM57x technical reference manual. The tables below summarize the CAN interface signals Table 46 CAN1 Interface Signals Signal Name Pin #...

  • Page 41: Enhanced High Resolution Pwm Module (Ehrpwm)

    Peripheral Interfaces Table 49 HDQ/1-wire Interface Signals Signal Name Pin # Type Description Availability HDQ0 152* HDQ or 1-wire protocol single interface pin Always HDQ0 HDQ or 1-wire protocol single interface pin Without "E2" NOTE: Pins denoted with "*" are multifunctional. For additional details please refer to chapter 5.5 of this document 4.18 Enhanced High Resolution PWM module (eHRPWM)

  • Page 42: Quadrature Encoder Pulse Module (Eqep)

    Peripheral Interfaces  32-bit time base counter  4-event time-stamp registers (each 32 bits)  Edge polarity selection for up to four sequenced time-stamp capture events  Interrupt on either of the four events  Single shot capture of up to four event time-stamps ...

  • Page 43: Pru-Icss Uart

    Peripheral Interfaces Signal Name Pin # Type Description Availability PR2_MII_MR1_CLK MII1 Receive Clock Always PR2_MII_MT1_CLK MII1 Transmit Clock Always PR2_MII1_COL 152* MII1 Collision Detect Always PR2_MII1_CRS 154* MII1 Carrier Sense Always PR2_MII1_RXD0 179* MII1 Receive Data Always PR2_MII1_RXD1 194* MII1 Receive Data Always PR2_MII1_RXD2 163*...

  • Page 44: Pru-Icss Enhanced Capture Event Module (Pru-Icss Ecap)

    Peripheral Interfaces For additional details on PRU-ICSS IEP, please refer to the Sitara AM57x technical reference manual. The table below summarizes the PRU-ICSS industrial Ethernet interface signals Table 55 PRU-ICSS industrial Ethernet Interface Signals Signal Name Pin # Type Description Availability PR2_EDC_LATCH0_IN 118*...
  • Page 45 Peripheral Interfaces Signal Name Pin # Type Description Availability PR2_PRU0_GPI1 PRU0 General-Purpose Input Always PR2_PRU0_GPI10 136* PRU0 General-Purpose Input Always PR2_PRU0_GPI10 194* PRU0 General-Purpose Input Always PR2_PRU0_GPI11 138* PRU0 General-Purpose Input Always PR2_PRU0_GPI11 179* PRU0 General-Purpose Input Always PR2_PRU0_GPI12 140* PRU0 General-Purpose Input Always PR2_PRU0_GPI12...

  • Page 46: General Purpose Timer

    Peripheral Interfaces Signal Name Pin # Type Description Availability PR2_PRU0_GPO7 PRU0 General-Purpose Output Always PR2_PRU0_GPO8 130* PRU0 General-Purpose Output Always PR2_PRU0_GPO8 202* PRU0 General-Purpose Output Always PR2_PRU0_GPO9 134* PRU0 General-Purpose Output Always PR2_PRU0_GPO9 163* PRU0 General-Purpose Output Always PR2_PRU1_GPI0 PRU1 General-Purpose Input Always PR2_PRU1_GPI1 PRU1 General-Purpose Input...

  • Page 47: Gpio

    Peripheral Interfaces Signal Name Pin # Type Description Availability TIMER2 113* PWM output/event trigger input Always TIMER3 PWM output/event trigger input Always TIMER6 PWM output/event trigger input Always TIMER8 PWM output/event trigger input Always NOTE: Pins denoted with "*" are multifunctional. For additional details please refer to chapter 5.5 of this document 4.23 GPIO...
  • Page 48 Peripheral Interfaces Signal Type Description Availability Name GPIO5_14 203* General-Purpose Input/Output (I/O) Without "A" GPIO5_18 117* General-Purpose Input/Output (I/O) Always GPIO5_19 111* General-Purpose Input/Output (I/O) Always GPIO5_2 135* General-Purpose Input/Output (I/O) Always GPIO5_3 129* General-Purpose Input/Output (I/O) Always GPIO5_4 General-Purpose Input/Output (I/O) Without "U4"...
  • Page 49 Peripheral Interfaces Signal Type Description Availability Name GPIO8_3 112* General-Purpose Input/Output (I/O) Always GPIO8_4 116* General-Purpose Input/Output (I/O) Always GPIO8_5 118* General-Purpose Input/Output (I/O) Always GPIO8_6 120* General-Purpose Input/Output (I/O) Always GPIO8_7 122* General-Purpose Input/Output (I/O) Always GPIO8_8 124* General-Purpose Input/Output (I/O) Always GPIO8_9 126*...

  • Page 50: System Logic

    System Logic SYSTEM LOGIC CL-SOM-AM57x allows access to several system logic related signals through the carrier board interface. Please refer to chapter of this document for signal description notes and legend. Power Supply The CL-SOM-AM57x recommended supply voltage is 4.2V to 5V. Table 60 Power signals Signal Name...

  • Page 51: Flash Write-Protection

    System Logic NOTE: Pins denoted with "*" may be used for other interfaces. For details, please refer to section of this document. 5.2.3 Flash Write-protection The EEPROM_WP signal can be used to prevent accidental corruption of the data stored on the onboard SPI Flash as well as the onboard ID EEPROM.
  • Page 52 System Logic  Standard sequence: Designed for normal system operation with the on-board primary boot device as the boot media.  Alternate sequence: Designed allow recovery from an external boot device in case of data corruption on the on-board primary boot device. Using the alternate sequence allows CL- SOM-AM57x to boot from an external SD card, effectively bypassing the onboard SPI Flash.

  • Page 53: Signal Multiplexing Characteristics

    System Logic Signal Multiplexing Characteristics Up to 110 of the CL-SOM-AM57x carrier board interface pins are multifunctional. Multifunctional pins enable extensive functional flexibility of the CL-SOM- AM57x CoM/SoM by allowing usage of a single carrier board interface pin for one of several functions. Up-to 16 functions (MUX modes) are accessible through each multifunctional carrier board interface pin.
  • Page 54 System Logic mcasp4_aclk vin2a_d16 mcasp4_aclkx spi3_sclk uart8_rxd i2c4_sda vout2_d16 vin1a_d15 vin1a_d15 Driver off C1500 vin1a_d16 mcasp4_axr0 spi3_d0 uart8_ctsn uart4_rxd vout2_d18 vin4a_d18 vin5a_d13:I vin5a_d13 Driver off C1500D vin2a_d18 mcasp4_axr0 spi3_d0 uart8_ctsn uart4_rxd vout2_d18 vin1a_d13 vin1a_d13 Driver off C1500 vin1a_d18 mcasp4_axr1 spi3_cs0 uart8_rtsn uart4_txd vout2_d19...
  • Page 55 System Logic pr2_mii_mr1_c mmc3_dat2 spi3_cs0 uart5_ctsn vin2b_d3 vin1a_d3 vin1a_d3 eQEP3_index pr2_pru0_gpi6 pr2_pru0_gpo6 gpio7_1 Driver off C1500 uart1_rxd mmc4_sdcd gpio7_22 Driver off Always mmc1_sdcd uart6_rxd i2c4_sda gpio6_27 Driver off Always uart1_txd mmc4_sdwp gpio7_23 Driver off Always mmc3_dat0 spi3_d1 uart5_rxd vin2b_d5 vin5a_d5:I vin5a_d5 eQEP3A_in pr2_mii1_txd1...
  • Page 56 System Logic "E2" mmc1_clk gpio6_21 Driver off Always vin4a_vsync gpmc_a14 qspi1_d3 timer6 spi4_cs3 gpio2_4 Driver off C1500D vin2a_vsync gpmc_a14 qspi1_d3 timer6 spi4_cs3 gpio2_4 Driver off C1500 vin1a_vsync mmc1_cmd gpio6_22 Driver off Always With "C1500D" gpmc_a6 vin3a_d22 vout3_d22 vin4a_d6 vin4b_d6 uart8_rxd uart6_ctsn gpio1_28 Driver off...
  • Page 57 System Logic vin2a_d0 pr2_edio_data_ vout1_d16 uart7_rxd vin1a_d0 pr2_edio_data_in0 pr2_pru0_gpi13 pr2_pru0_gpo13 gpio8_16 Driver off C1500 vin1a_d0 out0 vin4b_fld gpmc_a12 vin4a_clk0 gpmc_a0 timer8 spi4_cs1 dma_evt1:I dma_evt1 gpio2_2 Driver off C1500D vin2a_clk0 vin1b_fld gpmc_a12 gpmc_a0 timer8 spi4_cs1 dma_evt1:I dma_evt1 gpio2_2 Driver off C1500 vin1a_clk0 With "C1500D"...
  • Page 58 System Logic vout1_d2 emu2 vin4a_d18 vin3a_d18 obs0 obs16 obs_irq1 pr1_uart0_rxd pr2_pru1_gpi20 pr2_pru1_gpo20 gpio8_2 Driver off C1500D vin2a_d18 vout1_d2 emu2 vin1a_d18 obs0 obs16 obs_irq1 pr1_uart0_rxd pr2_pru1_gpi20 pr2_pru1_gpo20 gpio8_2 Driver off C1500 vin1a_d18 pr1_mii_mr0_c uart3_txd rmii1_rxer mii0_rxclk vin2a_d2 vin4b_d2 spi3_d1 spi4_cs1 pr2_pru1_gpi4 pr2_pru1_gpo4 gpio5_19 Driver off...
  • Page 59 System Logic vin2a_d10 vout1_d10 emu3 vin1a_d10 obs5 obs21 obs_irq2 pr2_edio_sof pr2_pru0_gpi7 pr2_pru0_gpo7 gpio8_10 Driver off C1500 vin1a_d10 vin6a_hsyn pr2_mii_mt0_c mcasp1_axr1 uart6_txd i2c5_scl pr2_pru1_gpi9 pr2_pru1_gpo9 gpio5_3 Driver off C1500D vin1a_hsyn pr2_mii_mt0_c mcasp1_axr1 uart6_txd i2c5_scl pr2_pru1_gpi9 pr2_pru1_gpo9 gpio5_3 Driver off C1500 obs_dmarq vout1_d11 emu10 vin4a_d11...
  • Page 60 System Logic vin2a_d4 pr2_edio_data_ vout1_d20 emu16 vin1a_d4 obs13 obs29 pr2_edio_data_in4 pr2_pru0_gpi17 pr2_pru0_gpo17 gpio8_20 Driver off C1500 vin1a_d4 out4 Without uart1_rtsn uart9_txd mmc4_cmd gpio7_25 Driver off "W"/ "WAB" pr2_edio_data_ vout1_d21 emu17 vin4a_d5 vin3a_d5 obs14 obs30 pr2_edio_data_in5 pr2_pru0_gpi18 pr2_pru0_gpo18 gpio8_21 Driver off C1500D out5 vin2a_d5...
  • Page 61 System Logic usb2_dp Always pcie_rxp1 C1500D pcie_rxn1 C1500D usb1_dp Always usb1_dm Always vin5a_vsync vin5a_vsyn eCAP3_in_PWM3_ mmc3_dat7 spi4_cs0 uart10_rtsn vin2b_clk1 pr2_mii1_rxd0 pr2_pru0_gpi11 pr2_pru0_gpo11 gpio1_25 Driver off C1500D vin1a_vsync vin1a_vsyn eCAP3_in_PWM3_ mmc3_dat7 spi4_cs0 uart10_rtsn vin2b_clk1 pr2_mii1_rxd0 pr2_pru0_gpi11 pr2_pru0_gpo11 gpio1_25 Driver off C1500 spi1_cs1 sata1_led spi2_cs1...
  • Page 62 System Logic With "C1500D" mcasp3_aclk mcasp2_axr mcasp3_aclkx uart7_rxd vin6a_d3 pr2_mii0_crs pr2_pru0_gpi12 pr2_pru0_gpo12 gpio5_13 Driver off Without "A" With "C1500" mcasp3_aclk mcasp2_axr mcasp3_aclkx uart7_rxd vin1a_d3 pr2_mii0_crs pr2_pru0_gpi12 pr2_pru0_gpo12 gpio5_13 Driver off Without "A" usb1_drvvbus timer16 gpio6_12 Driver off Always With "C1500D" mcasp2_axr mcasp3_axr0 uart7_ctsn...

  • Page 63: Rtc

    System Logic The CL-SOM-AM57x RTC is implemented with external real-time clock IC. The RTC provides time and calendar information. Additionally, a backup battery can keep the RTC running to maintain clock and time information even if the main supply is not present. The backup battery should be connected to the VCC_RTC power input.

  • Page 64: Carrier Board Interface

    Carrier board Interface CARRIER BOARD INTERFACE The CL-SOM-AM57x CoM/SoM carrier board interface uses the SODIMM-204 edge connector. The SoM pinout is detailed in the table below Connector Pinout Table 68 Connector P1 Pin # CL-SOM-AM57x Signal Name Ref. Pin # CL-SOM-AM57x Signal Name Ref.
  • Page 65 Carrier board Interface Pin # CL-SOM-AM57x Signal Name Ref. Pin # CL-SOM-AM57x Signal Name Ref. VIN1A_D15 VIN1A_D16 VIN2A_D16 VIN4A_D16 VIN5A_D15 ETH1_MDI1P MCASP4_ACLKR 4.10 MCASP4_ACLKX 4.10 UART8_RXD 4.12 SPI3_SCLK VIN1A_D13 VIN1A_D18 VIN2A_D18 VIN4A_D18 VIN5A_D13 ETH1_LED_LINK1000 MCASP4_AXR0 4.10 UART4_RXD 4.12 UART8_CTSN 4.12 SPI3_D0 VIN1A_D12 VIN1A_D19...
  • Page 66 Carrier board Interface Pin # CL-SOM-AM57x Signal Name Ref. Pin # CL-SOM-AM57x Signal Name Ref. VIN1A_CLK0 VIN2B_HSYNC1 VIN2B_HSYNC1 VIN5A_CLK0 I2C3_SDA 4.14 HDMI1_DATA2Y 4.1.2 EHRPWM2A 4.18 PR2_MII_MT1_CLK 4.21.1 PR2_PRU0_GPI0 4.21.5 PR2_PRU0_GPO0 4.21.5 GPIO6_10 4.23 VIN1A_D2 VIN2B_D2 VIN2B_D2 VIN5A_D2 MMC3_DAT3 4.11 UART5_RTSN 4.12 LVDS_P2 4.1.3...
  • Page 67 Carrier board Interface Pin # CL-SOM-AM57x Signal Name Ref. Pin # CL-SOM-AM57x Signal Name Ref. MMC1_SDWP 4.11 SPI1_D1 UART6_TXD 4.12 TS_XN 4.16 GPIO6_28 4.23 GPIO7_8 4.23 VIN1A_D6 VIN2B_D6 VIN2B_D6 VIN5A_D6 MMC3_CMD 4.11 SPI1_SCLK SPI3_SCLK TS_YP 4.16 ECAP2_IN_PWM2_OUT 4.19 GPIO7_7 4.23 PR2_MII1_TXD2 4.21.1 PR2_PRU0_GPI3...
  • Page 68 Carrier board Interface Pin # CL-SOM-AM57x Signal Name Ref. Pin # CL-SOM-AM57x Signal Name Ref. VIN1A_D23 VIN1A_D7 VIN2A_D7 VIN3A_D23 MMC1_DAT1 4.11 VIN4A_D7 GPIO6_24 4.23 ETH0_MDI0P UART6_RTSN 4.12 UART8_TXD 4.12 GPIO1_29 4.23 MMC1_DAT2 4.11 GPIO6_25 4.23 VIN1A_D18 VIN1A_D2 VIN2A_D2 VIN3A_D18 MMC1_DAT3 4.11 VIN4A_D2 GPIO6_26...
  • Page 69 Carrier board Interface Pin # CL-SOM-AM57x Signal Name Ref. Pin # CL-SOM-AM57x Signal Name Ref. VOUT1_VSYNC 4.1.1 VIN1A_D0 VIN1A_HSYNC0 VIN1A_D16 VIN1A_VSYNC0 VIN2A_D0 VIN2A_HSYNC0 VIN3A_D16 VIN3A_VSYNC0 VIN4A_D0 VIN4A_VSYNC0 ETH0_MDI3N SPI3_SCLK UART5_RXD 4.12 PR2_PRU1_GPI17 4.21.5 GPIO7_3 4.23 PR2_PRU1_GPO17 4.21.5 GPIO4_23 4.23 VIN1A_D1 VOUT1_DE 4.1.1 VIN1A_D17...
  • Page 70 Carrier board Interface Pin # CL-SOM-AM57x Signal Name Ref. Pin # CL-SOM-AM57x Signal Name Ref. VOUT1_D4 4.1.1 VIN1A_HSYNC0 VIN1A_D20 VIN2A_HSYNC0 VIN2A_D20 VIN4A_HSYNC0 VIN3A_D20 UART10_RXD 4.12 VIN4A_D20 I2C3_SDA 4.14 PR1_ECAP0_ECAP_CAPIN_APWM_O 4.21.4 DCAN2_TX 4.15 PR2_PRU0_GPI1 4.21.5 TIMER1 4.22 PR2_PRU0_GPO1 4.21.5 GPIO6_14 4.23 GPIO8_4 4.23 VOUT1_D5...
  • Page 71 Carrier board Interface Pin # CL-SOM-AM57x Signal Name Ref. Pin # CL-SOM-AM57x Signal Name Ref. VOUT1_D11 4.1.1 VIN1A_D11 VIN1A_HSYNC0 VIN2A_D11 UART6_TXD 4.12 VIN3A_D11 I2C5_SCL 4.14 VIN4A_D11 PR2_PRU1_GPI9 4.21.5 PR2_UART0_CTS_N 4.21.2 PR2_PRU1_GPO9 4.21.5 PR2_PRU0_GPI8 4.21.5 GPIO5_3 4.23 PR2_PRU0_GPO8 4.21.5 GPIO8_11 4.23 PCIE_RXP0 04.3 VSYS...
  • Page 72 Carrier board Interface Pin # CL-SOM-AM57x Signal Name Ref. Pin # CL-SOM-AM57x Signal Name Ref. VOUT1_D20 4.1.1 VIN1A_D4 VIN2A_D4 VIN1A_D6 VIN3A_D4 MCASP2_FSX 4.10 VIN4A_D4 PR2_PRU0_GPI19 4.21.5 PR2_EDIO_DATA_IN4 4.21.3 PR2_PRU0_GPO19 4.21.5 PR2_EDIO_DATA_OUT4 4.21.3 PR2_PRU0_GPI17 4.21.5 PR2_PRU0_GPO17 4.21.5 GPIO8_20 4.23 VOUT1_D21 4.1.1 VIN1A_D5 VIN2A_D5 MMC4_CMD...
  • Page 73 Carrier board Interface Pin # CL-SOM-AM57x Signal Name Ref. Pin # CL-SOM-AM57x Signal Name Ref. VIN1A_D0 VIN2B_D0 VIN2B_D0 VIN5A_D0 MMC3_DAT5 4.11 UART10_TXD 4.12 HUBUSB2_DN SPI4_D1 EHRPWM3B 4.18 PR2_MII1_RXD2 4.21.1 PR2_PRU0_GPI9 4.21.5 PR2_PRU0_GPO9 4.21.5 GPIO1_23 4.23 PWRON 5.2.1 HUBUSB2_DP PCIE_RXN1 04.3 VSYS HUBUSB1_DN PCIE_RXP1...

  • Page 74: Mechanical Drawings

    Carrier board Interface Pin # CL-SOM-AM57x Signal Name Ref. Pin # CL-SOM-AM57x Signal Name Ref. VIN1A_D3 LLINEIN MCASP3_ACLKR 4.10 USB1_DRVVBUS MCASP3_ACLKX 4.10 TIMER16 4.22 UART7_RXD 4.12 GPIO6_12 4.23 PR2_PRU0_GPI12 4.21.5 PR2_PRU0_GPO12 4.21.5 GPIO5_13 4.23 VIN1A_D1 VIN2B_D1 VIN2B_D1 VIN1A_D1 VIN5A_D1 RHPOUT MMC3_DAT4 4.11 MCASP3_AXR0...

  • Page 75: Heat Spreader And Cooling Solutions

    Heat Spreader and Cooling Solutions CompuLab provides CL-SOM-AM57x with a dedicated heat-spreader assembly. The CL-SOM- AM57x heat-spreader has been designed to act as a thermal interface and should be used in conjunction with a heat-sink or an external cooling solution. A cooling solution must be provided to ensure that under worst-case conditions the temperature on any spot of the heat-spreader surface is maintained according to the CL-SOM-AM57x temperature specifications.

  • Page 76: Operational Characteristics

    Operational Characteristics OPERATIONAL CHARACTERISTICS Absolute Maximum Ratings Table 69 Absolute Maximum ratings Parameter Condition Unit Main power supply voltage (VSYS) -0.3 Backup battery supply voltage (BACKUP_BAT) -0.3 VBUS input LDOUSB_IN2 (LDOUSB regulator input voltage in -0.3 PMIC) NOTE: Exceeding the absolute maximum ratings may damage the device. Recommended Operating Conditions Table 70 Recommended Operating Conditions...

  • Page 77: Operating Temperature Ranges

    Operational Characteristics Operating Temperature Ranges The CL-SOM-AM57x is available with three options of operating temperature range. Table 73 CL-SOM-AM57x Temperature Range Options Range Temp. Description Sample boards from each batch are tested for the lower and upper Commercial to 70 temperature limits.

  • Page 78: Application Notes

    Application Notes APPLICATION NOTES Carrier Board Design Guidelines  Ensure that all VSYS and GND power pins are connected.  Major power rails - VSYS and GND must be implemented by planes, rather than traces. Using at least two planes is essential to ensure the system signal quality, because the planes provide a current return path for all interface signals.

  • Page 79: Ethernet Magnetics Implementation

    Improper functioning of a customer carrier board can accidentally delete boot-up code from CL-SOM-AM57x, or even damage the module hardware permanently. Before every new attempt of activation, check that your module is still functional with CompuLab SB- SOM-AM57x carrier board.

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