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D16
SVCLK
C14
SVHSYNC
B14
SVVSYNC
A14
SVODD
A17
SVDV
D14,D15,A15,A16,
SVDATA7~
B15,B16,C15,C16
SVDATA0
A20
VCLK
D19
VHS_CSYNC
C20
VVS
B20
VODD
D20
VDV (VSOG)
B17
VCLAMP
A21,A22,A23,B21,
VGRN7~ VGRN0
B22,C21,C22,D21
C17,C18,C19,A18
VRED7~ VRED0
A19,B18,B19,D18
B23,B24,B25,A24
VBLU7~ VBLU0
A25,C23,C24,D24
A26
PPWR
B26
PBIAS
D26，C25，C26
PWM2 ~PWM0
AC7
DCLK
AC16
OEXTR
AE14~AE16,AE19~
A0-~A3-, A0+~A3+
AE23,AF13~AF16
B0-~B3-, B0+~B3+
AF19~AF23,AF11
AD14,AD11,AE13
LVDS_SHIELD[5] ~
AE11,AC11,AF10
LVDS_SHIELD[0]
AE12,AF12,
AC+,AC-,BC+,BC-
AF20,AE20
AD12,AD13,AC12
LVDSB_3.3
AC13,AC14,AC15
LVDSB_GND
AC20,AC21,AC22
LVDSA_3.3
AD19,AC19,AC20
LVDSA_GND
AE17
VDDD33_LVDS
AD17
VSSD33_LVDS
G4
XTAL
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Standard Definition Video Control Port
SV pels clock input
SV horizontal synchronization signal input
SV vertical synchronization signal input
Scan status input
SV data input
Standard Definition Video Data Port
SV ITU656 data input
Video Control Port
Video pels clock signal
Video horizontal synchronization signal input
Video vertical synchronization signal input
Scan status input
Video data input
Video clamp enable output
Green signal or Y signal input
Red signal or V/Cr/Pr signal input
Blue signal or U/Cb/Pb signal input
Screen Control Port
Screen power control
Screen bias control
Pulse width modulation output
Pels clock output
Connect external LVDS bias resistance
LVDS Port
Low voltage difference data input
Low voltage difference protect output
Low voltage difference protect input
Screen Port Power Supply
LVDS B channel power supply
B channel ground
LVDS A channel power supply
A channel ground
Analog power supply
Analog ground
Clock Composite and Power Supply
crystal oscillator interface
10
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