Table of Contents
Related Manuals for Quatech MPAP-200
Summary of Contents for Quatech MPAP-200
- Page 1 RS-422/485 PCMCIA SYNCHRONOUS ADAPTER for PCMCIA Card Standard compatible machines User's Manual QUATECH, INC. 5675 Hudson Industrial Parkway Hudson, Ohio 44236 MPAP-200 TEL: (330) 655-9000 FAX: (330) 655-9010 www.quatech.com...
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Page 2: Warranty Information
The authors have taken due care in the preparation of this document and every attempt has been made to ensure its accuracy and completeness. In no event will Quatech, Inc. be liable for damages of any kind, incidental or consequential, in regard to or arising out of the performance or form of the materials presented in this document or any software programs that might accompany this document. - Page 3 Quatech Inc. warrants the MPAP-200 to be free of defects for five (5) years from the date of purchase. Quatech Inc. will repair or replace any board that fails to perform under normal operating conditions and in accordance with the procedures outlined in this document during the warranty period.
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Page 4: Table Of Contents
3.1 MPAP-200 Client Driver for DOS 3.1.1 Hot Swapping 3.1.2 DOS client driver installation 3.1.3 Auto Fallback configuration 3.2 DOS Client Driver examples 3.3 MPAP-200 Enabler for DOS 3.3.1 Hot Swapping is not supported 3.3.2 DOS Enabler Installation 3.3.3 Configuring a card 3.3.4 Releasing a card's configuration... - Page 5 10.2 Accessing the FIFOs 10.2.1 Transmit FIFO 10.2.2 Receive FIFO 10.3 SCC configuration for FIFO operation 10.3.1 Using channel A for both transmit and receive 10.3.2 Using channel B for receive 10.4 FIFO status and control 10.4.1 Interrupt status 10.4.2 Resetting the FIFOs 10.4.3 Reading current FIFO status 10.4.4 Controlling the FIFOs 10.5 Accessing the SCC while FIFOs are enabled...
- Page 6 22.3.1 Resources Not Available 22.3.2 Insufficient Number Of Command Line Arguments 22.3.3 Bad Parameters ........
- Page 7 Because the PCMCIA 2.1 standard does not include a direct memory access (DMA) interface, the MPAP-200/300 supports only interrupt-driven communications. To compensate for the lack of DMA, the MPAP-200/300 is equipped with 1024-byte FIFOs for transmit and receive data. The FIFOs provide for high data throughput with very low interrupt overhead.
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Page 8: Hardware Installation
3. Attach the narrow connector on the supplied cable to the socket on the end of the MPAP-200. The connector is keyed so that it can only be inserted in one orientation. The connector should attach firmly and smoothly. Do not force the connector into the socket! 4. - Page 9 Two DOS configuration software programs are provided with the MPAP-200: a client driver and a card enabler. These programs are executed from DOS (before entering Windows) and allow operation of the MPAP-200 in both the DOS and Windows 3.x environments. Table 1 highlights the differences between these programs.
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Page 10: Mpap-200 Client Driver For Dos
The client driver supports "hot swapping." After installation, it is not necessary for the MPAP-200 to be inserted in the PCMCIA socket at boot time. When the card is inserted, it will be configured according to the command line options. When the card is removed, the resources it used will be made available for other devices. -
Page 11: Auto Fallback Configuration
5. Save the CONFIG.SYS file and exit the text editor. 6. Insert an MPAP-200 card in a PCMCIA socket, and reboot the computer. (If a card is present in a socket at boot time, the card's configuration is reported on the screen as the client driver loads. - Page 12 Example: Attempt to configure an MPAP-200 inserted into socket 0 with a base address of 300 hex and IRQ 5. Attempt to configure an MPAP-200 inserted into socket 1 with a base address of 340 hex and IRQ 10. This type of configuration may be desirable in systems where more than one MPAP-200 is to be installed.
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Page 13: Mpap-200 Enabler For Dos
"Hot Swapping". The enabler must be executed after insertion of an MPAP-200 card. If more than one MPAP-200 is installed in a system, the enabler must be executed separately for each card. A card that is removed and reinserted must be reconfigured by executing the enabler again. - Page 14 (no spaces). In the descriptions below, replace the '#' symbols with the appropriate numeric values. The PCMCIA socket into which the MPAP-200 will be inserted. This value is a decimal number ranging from 0 to 15. This parameter is always required when configuring a card.
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Page 15: Releasing A Card's Configuration
Use the 'R' parameter to do this. The PCMCIA socket into which the MPAP-200 will be inserted. This value is a decimal number ranging from 0 to 15. This parameter is always required when releasing a card's configuration. -
Page 16: Dos Enabler Examples
Example: Configure the MPAP-200 in socket 0 with a base address of 300H and IRQ 5. MPAP2EN.EXE (s0,b300,i5) Example: Configure the MPAP-200 in socket 1 with a base address of 300H and IRQ 3 using a configuration memory window at segment D800. -
Page 17: Windows 95/98 Installation
Windows 98 using the "Add New Hardware" wizard. Windows 95 uses a similar process to load the INF file from a floppy disk with slightly different dialog boxes. 1. After inserting an MPAP-200 for the first time, the "Add New Hardware" wizard will start. Click the "Next" button. - Page 18 2. Click the "Next" button. Select the radio button for "Search for the best driver for your device." Click the "Next" button to continue. 3. On the next dialog, select the "CD-ROM drive" checkbox. Insert the Quatech COM CD (shipped with the card) into the CD drive. Click the "Next" button.
- Page 19 5. Windows will copy the INF file from the CD and display a final dialog indicating that the process is complete. Click the "Finish" button.
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Page 20: Viewing Resources With Device Manager
3. Double click the device group "Synchronous_Communication". The MPAP-200 model name should appear in the list of adapters. 4. Double click the MPAP-200 model name and a properties box should open for the hardware adapter. 5. Click the "Resources" tab located along the top of the properties box to view the... -
Page 21: Configuration Options
Click "Cancel" to exit without making changes. 6. If changes to the automatic configuration are necessary for compatibility with existing programs, uncheck the "Use Automatic Settings" box and double-click on the Resource Type that needs to be changed. Caution should be used to avoid creating device conflicts with other hardware in the system. -
Page 22: Os/2 Software Installation
OS/2 Software Installation An OS/2 client driver is provided with the MPAP-200. This client driver works with OS/2's Card and Socket Services to allow operation of the MPAP-200 under OS/2. System Requirements OS/2 2.1 or later. OS/2 PCMCIA Card and Socket Services support must be installed. See "Installing OS/2 PCMCIA support"... -
Page 23: Tying A Configuration To A Particular Socket
The client driver supports "hot swapping." After installation, it is not necessary for the MPAP-200 to be inserted in the PCMCIA socket at boot time. When the card is inserted, it will be configured according to the command line options. When the card is removed, the resources... -
Page 24: Os/2 Client Driver Configuration Examples
IRQ 5. If any of these resources are not available, the card will not be configured. If an MPAP-200 is inserted into socket 2, configure it at base address 110 hex and IRQ 15. If any of these resources are not available, the card will not be configured. Up to two MPAP-200s can be used. -
Page 25: Installing Os/2 Pcmcia Support
Warp 3.0 and later. On OS/2 2.1 and 2.11, PCMCIA Card Services is built in, but you must add Socket Services separately. The necessary files can be found on Compuserve in the OS2SUPPORT forum library 23 in the file OS2PCM.ZIP, and may be available elsewhere. Quatech does not distribute these files. -
Page 26: Using The Mpap-200 With Syncdrive
Syncdrive, however, is not aware of the plug-and-play nature of PCMCIA cards. A Syncdrive application will expect to see the MPAP-200 at a specific base address and a specific IRQ. When using Syncdrive with PCMCIA cards, it is necessary to obtain the base address and IRQ assigned to the card by the PCMCIA Card Services and provide those values in the channel configuration array. -
Page 27: Addressing
The MPAP-200 occupies a continuous 16-byte block of I/O addresses. For example, if the base address is set to 300 hex, then the MPAP-200 will occupy address locations 300 hex to 30F hex. If the computer in which the MPAP-200 is installed is running PCMCIA Card and Socket Services, the base address is set by the client driver. -
Page 28: Interrupts
Interrupts The MPAP-200 will operate using the interrupt level (IRQ) assigned by the PCMCIA system. Interrupts can come from the SCC or the external FIFOs. When using interrupts with the MPAP-200, the application must have an interrupt service routine (ISR). There are several things that an ISR must do to allow proper system operation: 1. -
Page 29: Scc General Information
SCC General Information The Serial Communications Controller (SCC) is a dual channel, multi-protocol data communications peripheral. The MPAP-200 provides a single channel for communications, however, portions of the second channel can be utilized to support some special circumstances. The SCC can be configured to satisfy a wide variety of serial communications applications. -
Page 30: Accessing The Registers
9 read registers. These registers only occupy four address locations, which start at the MPAP-200's physical base address that is configured via the on board switches. This and all other addresses are referenced from this base address in the form Base+Offset. An example of this is Base+1 for the SCC Control Port, Channel A. - Page 31 These clocks can be programmed in WR11 to come from the RTXC pin, the TRXC pin, the output of the BRG, or the transmit output of the DPLL. The MPAP-200 uses the TRXC pin for its clock-on-transmit and the RTXC pin for its clock-on-receive. Programming of the clocks should be done before enabling the receiver, transmitter, BRG, or DPLL.
- Page 32 Command Register, Register Pointer, CRC initialization, and resets for various modes Interrupt control, Wait/DMA request control Interrupt vector Receiver initialization and control Transmit/Receive miscellaneous parameters and codes, clock rate, stop bits, parity Transmitter initialization and control Sync character (1st byte) or SDLC address field Sync character (2nd byte) or SDLC Flag WR7' Special HDLC Enhancement Register...
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Page 33: Baud Rate Generator Programming
The equation relating the baud rate to the time constant is given below while Table 5 shows the time constants associated with a number of popular baud rates when using the standard MPAP-200 9.8304 MHz clock. Time_Const = Where: Clock_Frequency = 9.8304 x 10... -
Page 34: Support For Scc Channel B
9.4.3 Extra handshaking for channel A The SCC does not provide a DSR input for either channel. The MPAP-200 routes the DSR signal from the connector to the DCDB input of the SCC. Software can therefore use DCDB as a surrogate for DSR on channel A. -
Page 35: Scc Incompatibility Warnings
Register Pointer Bits In a Zilog 85230, the control port register pointer bits can be set in either channel. With the implementation on the MPAP-200, however, both parts of an SCC control port access must use the same I/O address. -
Page 36: Fifo Operation
These FIFOs are implemented as extensions of the SCC's small internal FIFOs. They have been designed to be as transparent as possible to the software operating the MPAP-200. By using these FIFOs, it is possible to achieve high data rates despite the MPAP-200 not supporting DMA. -
Page 37: Receive Fifo
DMA is not supported between the MPAP-200 and the host computer due to the lack of DMA facilities The MPAP-200 is a single-channel device. Accordingly, most applications will use SCC channel A for both transmit and receive operations. It is possible, however, to use a limited portion of SCC channel B for receive operations (see page 23). -
Page 38: Using Channel A For Both Transmit And Receive
This is the mode in which most applications will run. Set RXSRC (bit 1) in the Configuration Register to logic 0. This will configure the MPAP-200 to use W/REQA for receive DMA and DTR/REQA for transmit DMA. In addition to any other desired SCC... -
Page 39: Using Channel B For Receive
Set RXSRC (bit 1) in the Configuration Register to logic 1. This will configure the MPAP-200 to use W/REQA for transmit DMA and W/REQB for receive DMA. In addition to any other desired SCC configuration, ensure that the following bits... -
Page 40: Fifo Status And Control
38). These bits are write-clear, meaning that software must write a 1 to a bit in order to clear it. FIFO-related interrupts will occur only when the MPAP-200 interrupt source is set to INTSCC. See Table Event Transmit FIFO drained... -
Page 41: Resetting The Fifos
10.4.2 Resetting the FIFOs The FIFOs are automatically disabled and reset at powerup or when the MPAP-200 is inserted into a PCMCIA socket. The transmit and receive FIFOs can also be independently reset by setting and clearing the appropriate bits in the FIFO Control Register. Resetting a FIFO sets the appropriate FIFO empty status bit and resets the FIFO's internal read and write pointers. -
Page 42: Receive Pattern Detection
SCC into the receive FIFO. When this occurs, the RX_PAT bit in the Interrupt Status Register (see page 38) is set. For instance, the MPAP-200 can watch for the end-of-text character to be received, or for three consecutive pad characters to be received. -
Page 43: Receive Fifo Timeout
While the receive pattern detection may be useful here, the MPAP-200 also offers a timeout feature on the external receive FIFO. If the external FIFO is not empty and a time interval equal to a specified number of character-times has elapsed without any further data being received, a receive FIFO interrupt is generated and RX_FIFO bit in the Interrupt Status Register (see page 38) is set. -
Page 44: Communications Register
11 Communications Register The Communications Register is used to set options pertaining to the clocks. The source and type of clock to be transmitted or received can be specified. External synchronization can also be controlled with this register. The address of the Communications Register is Base+4. Table 9 details its bit definitions. - Page 45 Bit 3: RCKEN --- Receive Clock Source: set (logic 1), this bit allows the receive clock (RCLK) signal to be generated by the TRxC pin on channel B of the SCC. When cleared (logic 0), RCLK is received on pins 17 and 9 of the DB-25 connector. Bit 2: TCKEN --- Transmit Clock Source: When set (logic 1), this bit allows the transmit clock (TCLK) to be generated by...
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Page 46: Configuration Register
12 Configuration Register The Configuration Register is used to set the interrupt source and enable the interface between the SCC and the external FIFOs. The address of this register is Base+5. Table 10 details the bit definitions of the register. Bit 7 Bit 6 Table 10 --- Configuration Register - Read/Write... - Page 47 Bit 1: RXSRC --- Receive FIFO DMA Source: bit determines which SCC pins are used to control transmit and receive DMA transactions between the SCC and the external FIFOs (when enabled). The transmit data FIFO is always used with SCC channel A. The receive data FIFO may be used with SCC channel A by setting RXSRC to logic 0, or with SCC channel B by setting RXSRC to logic 1.
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Page 48: Interrupt Status Register
The Interrupt Status Register is used to determine the cause of an interrupt generated by the MPAP-200. The address of this register is Base+8. Table 11 details the bit definitions of the register. The interrupt source in the Configuration Register (see page 36) must be set to INTSCC for any of the statuses indicated by this register to occur. -
Page 49: Fifo Status Register
14 FIFO Status Register The FIFO Status Register is used to return current status information about the external FIFOs. The address of this read-only register is Base+9. Table 12 details the bit definitions of the register. This register can be ignored if the external FIFOs are not being used. Bit 7 Bit 6 Table 12 --- FIFO Status Register - Read Only... -
Page 50: Fifo Control Register
15 FIFO Control Register The FIFO Control Register is used to control the external data FIFOs. The address of this register is Base+A (hex). Table 13 details the bit definitions of the register. This register can be ignored if the external FIFOs are not being used. Bit 7 Bit 6 EN_PAT... -
Page 51: Receive Pattern Character Register
16 Receive Pattern Character Register The Receive Pattern Character Register is used to set the character value to be used in receive pattern detection. The address of this register is Base+B (hex). This register can be ignored if the external FIFOs are not being used. Bit 7 Bit 6 Table 14 --- Receive Pattern Character Register - Read/Write... -
Page 52: Receive Pattern Count Register
17 Receive Pattern Count Register The Receive Pattern Count Register is used to set the counter value to be used in receive pattern detection. The address of this register is Base+C (hex). This register can be ignored if the external FIFOs are not being used. Bit 7 Bit 6 Table 15 --- Receive Pattern Count Register - Read/Write... -
Page 53: Receive Fifo Timeout Register
18 Receive FIFO Timeout Register The Receive FIFO Timeout Register is used to control the operation of the external receive FIFO timeout feature. The address of this register is Base+D (hex). This register can be ignored if the external FIFOs are not being used. See page 33 for details on the receive FIFO timeout feature. -
Page 54: External Connections
19 External Connections The MPAP-200 is configured as a Data Terminal Equipment (DTE) device using a DB-25 male connector. There is no DCE version available. The control signals the DTE can generate are Request To Send (RTS) and Data Terminal Ready (DTR). -
Page 55: Synca (Pin 21)
MPA-200, with the local and remote loopback output signals (LL and RL) and the test mode input signal (TM) replaced with a SYNCA input and two ground conductors. If the MPAP-200 is to be connected to an EIA-530 device, it may be necessary to swap the +/- conductors on the TXD and RXD signals. -
Page 56: Null-Modem Cables
Table 17 shows the pin configuration of the MPAP-200 DTE connector. The definitions of the interchange circuits can be found starting on page 47. From DGND -RRCLK -TTCLK -RTCLK +RTCLK +RRCLK SYNCA +TTCLK 19.3 Null-modem cables The MPAP-200 does not use a standard asynchronous PC serial port connector pinout. -
Page 57: Dte Interface Signals
20 DTE Interface Signals CIRCUIT AB - SIGNAL GROUND CONNECTOR NOTATION: DGND DIRECTION: Not applicable This conductor directly connects the DTE circuit ground to the DCE circuit ground. CIRCUIT BA - TRANSMITTED DATA CONNECTOR NOTATION: +TXD, -TXD DIRECTION: To DCE This signal transfers the data generated by the DTE through the communication channel to one or more remote DCE data stations. - Page 58 DIRECTION: To DCE This signal controls the switching of the DCE to the communication channel. The DTE will generate this signal to prepare the DCE to be connected to or removed from the communication channel. CIRCUIT CF - Received Line Signal Detect (CARRIER DETECT) CONNECTOR NOTATION: +CD, -CD DIRECTION: From DCE This signal indicates to the DTE whether the DCE is conditioned to receive data from the...
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Page 59: Specifications
21 Specifications Bus interface: Physical Dimensions: Type II (5 mm) PCMCIA card Controller: DTE Interface: Transmit drivers: Receive buffers: I/O Address range: Interrupt levels: DMA channels: Power requirements: 100 mA at +5 volts, typical PCMCIA PC Card Standard 2.1 85230-compatible 16-MHz Serial Communications Controller (SCC) Male D-25 connector RS-422/485 compatible,... -
Page 60: Software Troubleshooting
I/O devices such as serial ports or modems. If one of these generic client drivers is installed, it may try to configure the MPAP-200 causing the MPAP-200 client driver to fail installation. In these cases, the user should do one of the following: 1. -
Page 61: Dos Enabler
The enabler should NOT be used if any Card and Socket Services are present on the system. If Card and Socket Services is installed, the enabler may interfere with its operation and with the device(s) it controls. The client driver should be used to configure the MPAP-200 if Card and Socket Services are installed. - Page 62 The base address or IRQ value may be out of range. Make sure that the base address is a hexadecimal number between 100 hex and 3F0 hex ending in 0. Make sure that the IRQ is a decimal number between 2 and 15.
- Page 64 MPAP-200 User's Manual Revision 2.32 March 2004 P/N 940-0129-232...