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Triple 2-channel analog multiplexer /
demultiplexer
BU4053BC / BU4053BCF / BU4053BCFV
The BU4053BC, BU4053BCF, and BU4053BCFV are multiplexers / demultiplexers capable of selecting and combin-
ing analog signals and digital signals in a 2 ch × 3 configuration. Inhibit signals and control signals are used to turn
on the switch corresponding to each of the channels. In addition, even if the logical amplitude (V
signal is low, signals with a large amplitude (V
Also, as each switch has a low ON resistance, it can be connected to a low impedance circuit.
•
Block diagram
•
Logic circuit diagram
V
(16)
DD
INH (6)
LEVEL
A (11)
CONVERTER
B (10)
C
(9)
V
(8)
SS
V
(7)
EE
X
(12)
0
X
(13)
1
Y
(2)
0
Y
(1)
1
Z
(5)
0
Z
(3)
1
-V
DD
Y
1
1
Y
2
0
Z
3
1
Z
4
Z
5
0
INH 6
V
7
EE
V
8
SS
BINARY TO 1of 2
DECODER WITH INH
(14) X
(15) Y
) can be switched.
EE
16
15
Y
1
Y
Y
0
14
Z
1
X
13
X
Z
1
X
0
Z
0
12
INH
A
11
V
B
EE
C
10
9
•
Truth table
INH
L
L
L
L
L
L
L
L
H
(4) Z
X: Irrelevant
86
V
DD
Y
X
X
1
X
0
A
B
C
A
B
L
L
H
L
L
H
H
H
L
L
H
L
L
H
H
H
X
X
-V
) of the control
DD
SS
C
ON SWITCH
L
X
Y
Z
0
0
0
L
X
Y
Z
1
0
0
L
X
Y
Z
0
1
0
L
X
Y
Z
1
1
0
H
X
Y
Z
0
0
1
H
X
Y
Z
1
0
1
H
X
Y
Z
0
1
1
H
X
Y
Z
1
1
1
X
NONE
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