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Figure 1 shows the top side of the MachXO2-4000HC Control Evaluation Board with comments on the specific fea-
tures that are designed in the board.
Figure 1. MachXO2-4000HC Control Evaluation Board, Top Side
GSR Push-button
2x20 GPIO Header
MachXO2-4000HC
microSD Socket
Video Source
(Camera Link)
Notes:
— Video Source 1 is available in both DVI and 7:1 LVDS interfaces. Video Source 2 is not populated.
— An LPDDR memory device is installed on the PCB, but performance is limited to 20 MHz max.
Lattice Semiconductor Devices
MachXO2
This board features a 3.3 V MachXO2 PLD packaged in a 132-ball csBGA package. This package allows density
migration to devices from 256 to 4340 LUTs. A complete description of this device can be found in DS1035,
MachXO2 Family Data
Sheet.
Power Manager II
This board also features a Power Manager II mixed-signal PLD. The POWR1014A device serves as a general-purpose
power supply monitor, reset generator, sequence controller, and high-voltage FET drivers. More information about
Power Manager II devices can be found on the Lattice web site at www.latticesemi.com/products/powermanager.
Software Requirements
You should install Lattice Diamond
the evaluation board.
DVI
Video Output
7:1 LVDS
DVI Video Source
®
design software version 2.0 (or higher) before you begin developing designs for
MachXO2-4000HC Control Development Kit
7:1 LVDS
Video Output
USB 2.0
Interface Socket
3
User Guide
5V Power Indicator
MachXO2 DIP Switches
Electret Microphone
Speaker/Headphone Jack
AC-DC Adapter Jack
ADC Input (J9: Pin 2)
LPDDR Memory
POWR1014A
JTAG Device Select (J6),
MachXO2 Position Shown
MachXO2 LED Field
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