Lattice Semiconductor LatticeXP2 User Manual

Brevia development kit
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LatticeXP2 Brevia Development Kit
User's Guide
June 2010
Revision: EB53_01.1
Downloaded from
Elcodis.com
electronic components distributor

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Summary of Contents for Lattice Semiconductor LatticeXP2

  • Page 1  LatticeXP2 Brevia Development Kit  User’s Guide June 2010 Revision: EB53_01.1 Downloaded from Elcodis.com electronic components distributor...
  • Page 2 Note: Static electricity can severely shorten the life span of electronic components. Features The LatticeXP2 Brevia Development Kit includes: • LatticeXP2 Brevia Evaluation Board – This is a small board (about the size of a business card) with the follow- ing on-board components and circuits: – LatticeXP2-5E 6TN144C –...
  • Page 3 LEDs LatticeXP2 Device This board features a LatticeXP2 FPGA with a 1.2V core supply. It can accommodate all pin-compatible LatticeXP2 devices in the 144-pin TQFP (20x20 mm) package. A complete description of this device can be found in the LatticeXP2 Family Data Sheet.
  • Page 4 The monitor program sends and receives data across the RS232 communications port on the LatticeXP2 Brevia Evaluation Board. It is necessary to start and configure a VT100 or ANSI style terminal emulator program like HyperTerminal (Windows) or Minicom (Linux).
  • Page 5 Read SPI Flash Memory IDCode Command The SPI ROM device on the LatticeXP2 Brevia Evaluation Board can be queried and will return the ID code imple- mented by the ROM manufacturer. The LatticeMico8 initiates memory transactions using the SPI Memory control- ler to acquire the data.
  • Page 6 LatticeXP2 Brevia Development Kit Lattice Semiconductor User’s Guide Read DIP Switch Bank The LatticeMico8 has the ability to read the state of switches 1-4 on the DIP switch bank. The pushbutton switches are can also be read. Each pushbutton press toggles the internal state of a register in the FPGA. The current state of the register is displayed on the high nibble of the output.
  • Page 7 LatticeXP2 Brevia Development Kit Lattice Semiconductor User’s Guide Read Data History From SPI Flash Memory This command copies the Data History from the SPI ROM into the SRAM. After power is supplied, or RESET asserted the SRAM Data History log information is no longer available. Running this command permits the history to be restored from the non-volatile SPI ROM.
  • Page 8 Lattice distributes source and programming files for a variety of demonstration designs compatible with the LatticeXP2 Brevia Evaluation Board. To download demo designs: 1. Browse to the LatticeXP2 Brevia Development Kit web page of the Lattice web site. Select the Demo Applica- tions download and save the file. Downloaded from Elcodis.com...
  • Page 9 LatticeXP2 Brevia Development Kit Lattice Semiconductor User’s Guide 2. Extract the contents of Demo_LatticeXP2_Brevia_Soc_vhdl.zip and Demo_LatticeXP2_Brevia_Soc_verilog.zip to an accessible location on your hard drive. One or more designs will be extracted and each will follow the following basic form. Demo...
  • Page 10 Programming Demo Design with ispVM Demo_LatticeXP2_Brevia_SoC is pre-programmed into the LatticeXP2 Brevia Evaluation Board by Lattice. To restore a LatticeXP2 Brevia Evaluation Board to factory settings, use the procedure described in this section. To program a demo programming file: 1. Power off the LatticeXP2 Brevia Evaluation Board.
  • Page 11 Flash Erase, Program, Verify and click OK. 14. Choose Project > Download. ispVM reprograms the LatticeXP2 Brevia Evaluation Board. A progress bar with a small timer window will appear to show elapsed programming time. At the end of pro- gramming, the configuration setup window’s “Status”...
  • Page 12 This section describes the features of the LatticeXP2 Brevia Evaluation Board in detail. Overview The LatticeXP2 Brevia Evaluation Board is a complete development platform for the LatticeXP2 FPGA. The board includes on-board SRAM and SPI Flash memory, and SPI microcontroller communication interfaces, a RS232 port, and an expansion header to support test connections.
  • Page 13 LatticeXP2 Brevia Development Kit Lattice Semiconductor User’s Guide I/O Mapping Details UART Interface The UART is used to communicate with the PC. U3 does the level translation between the LVCMOS I/Os and the RS232 port. The connector is a 9-pin D-type female. The interface details are included in Table 1.
  • Page 14 LatticeXP2 Brevia Development Kit Lattice Semiconductor User’s Guide Table 2. Expansion Header 1 Interface (Continued) Expansion Connector Expansion Connector/FPGA FPGA Pin Number Pin Name Pin Number Pin Functionality Expansion Connector J4, Bank 2 and 3 EXP_IO26 EXP_IO9 EXP_IO25 EXP_IO8 EXP_IO24...
  • Page 15: Leds And Switches

    FPGA Pin Number SW1A SW1B SW1C SW1D Flash Interface The LatticeXP2 Brevia Evaluation Board provides 4Mbits of non-volatile flash memory. The Flash uses the four- wire SPI communication interface. Table 6. Flash Interface Flash Signal Name FPGA Pin Number FPGA Flash 2 Mbit (U1)
  • Page 16: Sram Interface

    LatticeXP2 Brevia Development Kit Lattice Semiconductor User’s Guide SRAM Interface The LatticeXP2 Brevia Evaluation Board provides 1Mbit of asynchronous SRAM memory in a 128K x 8-bit configu- ration. Table 7. SRAM Interface FPGA Pin SRAM Signal Name Number FPGA SRAM 1 Mbit (U2)
  • Page 17 FPGA The Lattice XP2 Brevia board is based on the Lattice Semiconductor LatticeXP2 non-volatile FPGA. The board is populated with a 5K LUT device in a 144 TQFP package. A complete description of the device can be found in the...
  • Page 18: Troubleshooting

    The functionality displayed by the board does not match the demo features described. It is possible the LatticeXP2 Brevia Evaluation Board has been reprogrammed. You can either reprogram the FPGA with the demonstration bitstream, or read the checksum of the bitstream loaded in the FPGA. To restore the LatticeXP2 Brevia Evaluation Board to the factory default, see the Download Demo Designs section of this docu- ment for details on downloading and reprogramming the device.
  • Page 19: Technical Support Assistance

    Updated directory names in the “Reassembling the Demo LatticeMico8 Firmware” text section. (c) 2010 Lattice Semiconductor Corp. All Lattice trademarks, registered trademarks, patents, and disclaimers are as listed at www.latticesemi.com/legal. All other brand or product names are trademarks or registered trademarks of their respective holders.
  • Page 20: Appendix A. Schematics

    LatticeXP2 Brevia Development Kit Lattice Semiconductor User’s Guide Appendix A. Schematics Figure 4. LatticeXP2 Brevia Evaluation Board Block Diagram Downloaded from Elcodis.com electronic components distributor...
  • Page 21 LatticeXP2 Brevia Development Kit Lattice Semiconductor User’s Guide Figure 5. SPI Flash, SRAM, LEDs and Switches Downloaded from Elcodis.com electronic components distributor...
  • Page 22 LatticeXP2 Brevia Development Kit Lattice Semiconductor User’s Guide Figure 6. Banks 6 and 7 Downloaded from Elcodis.com electronic components distributor...
  • Page 23 LatticeXP2 Brevia Development Kit Lattice Semiconductor User’s Guide Figure 7. Banks 0-5 Downloaded from Elcodis.com electronic components distributor...
  • Page 24 LatticeXP2 Brevia Development Kit Lattice Semiconductor User’s Guide Figure 8. Power Downloaded from Elcodis.com electronic components distributor...
  • Page 25: Appendix B. Bill Of Materials

    LatticeXP2 Brevia Development Kit Lattice Semiconductor User’s Guide Appendix B. Bill of Materials Table 11. Bill of Materials Item Quantity Reference Part PCB Footprint C1,C2,C3,C10,C11,C16,C17,C19,C20, C21,C23,C28,C29,C30,C31,C39,C40, 0.1uF CC0402 C41,C42 C4,C5,C6,C7,C27,C38 CC0402 15pF CC0402 C9,C32,C43,C44,C45 0.01uF CC0402 C12,C13,C14,C15,C18,C22 10nF CC0402 C24,C26,C33,C37...

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