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The AKD5538-B is an evaluation board for AK5538, which is 32bit, 8k – 768kHz, 8ch ADC.
The AKD5538-B has the analog input circuit and a digital audio interface transmitter (DIT). In addition,
the regulators and crystal oscillator on the board generate the necessary power and clock for the ICs.
The AKD5538-B can be easily connected to your audio system.
 Ordering guide
AKD5538-B
(A USB I/F BOX and control software for Windows 10 computer are included in this package.)
 Onboard Voltage Regulators: Operate only with 15V power supplies.
 Onboard System Clocks: No clock source is required.
 Analog Input: Differential input (CANNON)
 Digital Output: PCM, DSD (Header pins) and digital audio interface (BNC and Optical)
 Operation Mode Setting: Register control and pin control are available.
CANNON
(Differential)
AIN1
AIN2
AIN3
AIN4
AIN5
AIN6
AIN7
AIN8
* Circuit diagram and PCB layout are attached at the end of this manual.
<KM131002>
GENERAL DESCRIPTION
--
Evaluation board for AK5538
fs=48kHz, 96kHz, 192kHz are available.
(note: Default setting of the board is register control with I2C)
Banana Jack
-15V
+15V
3.3V
AVDD
Input
Circuit
Input
Circuit
Input
Circuit
Input
Circuit
Figure 1. AKD5538-B Block Diagram
AK5538 Evaluation Board Rev.1
FUNCTION
Regulators
3.3V
or
1.8V
1.8V
TVDD
VDD18
AK5538
MCLK, LRCK, BICK
I2C or SPI
Control Signals
- 1-
AKD5538-B
10pin Headers
PCM
DSD
BNC_TX
(COAX)
AK4118A
(DIT)
OPT_TX
(Optical)
Control
Signals
USB
I/F Box
10pin Header
[AKD5538-B]
2022/01

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Summary of Contents for AsahiKASEI AKM AKD5538-B

  • Page 1 [AKD5538-B] AKD5538-B AK5538 Evaluation Board Rev.1 GENERAL DESCRIPTION The AKD5538-B is an evaluation board for AK5538, which is 32bit, 8k – 768kHz, 8ch ADC. The AKD5538-B has the analog input circuit and a digital audio interface transmitter (DIT). In addition, the regulators and crystal oscillator on the board generate the necessary power and clock for the ICs.
  • Page 2: Evaluation Board Diagram

    [AKD5538-B] Evaluation Board Diagram  Layout of Connectors and Switches AVSS +15V VBIAS AVDD J201 J200 J1002 J1000 J1005 J1004 J1009 -15V T1003 T1001 T1002 AKD5538-B J1001 T1004 TVDD J1006 J300 VDD18 SW803 SW804 J1007 T1005 D3.3V PORT803 J301 J1008 U100 DVSS J1003...
  • Page 3 [AKD5538-B]  Overview of Connectors and Switches (1) U100 ( AK5538 ) 32bit,8k - 768kHz,8ch A/D Converter. (2) J200,J201,J300,J301,J400,J401,J500,J501 ( Cannon Connector ) Differential Analog Signal Input. (3) J600 ( BNC Connector ) Digital Audio Interface Coaxial Output. (4) PORT600 (Optical Connector ) Digital Audio Interface Optical Output.
  • Page 4: Operation Sequence

    [AKD5538-B] Evaluation Board Setting  Operation sequence [1] Power Supply Path Settings [2] Clocks and Data Path Settings [3] Control Mode Settings [4] Analog Input Settings [5] Slave Mode/Master Mode Setting [6] AK4118A Settings [7] AK5538 Setting Tables [8] Start-up Sequence <KM131002>...
  • Page 5 [AKD5538-B] [1] Power supply Path settings (1-1) Power supply Jacks setting : Voltage Name Color Supply Destination Comments Default Usage (Typ) J1000 +15V Green +15V Regulator and Op-amps Should always be connected. Supply +15V J1001 -15V Blue -15V Regulator and Op-amps Should always be connected.
  • Page 6 [AKD5538-B] When you want to operate the IO pins of AK5538 at 1.8V, turn off the internal LDO and supply 1.8V to TVDD pin and VDD18 pin. LDOE TVDD pin VDD18 pin Status SW803-1 Power Supply Voltage External Power Supply Input 1.7 - 1.98V 1.7 - 1.98V LDO Power Output 3.0 - 3.6V...
  • Page 7 [AKD5538-B] [2] Clock and Data path settings (2-1) Connecters for Clocks and Data Name Function Default Status PORT800 LRCK LRCK Input or Output Not connected anywhere BICK BICK Input or Output Not connected anywhere MCLK MCLK Input Not connected anywhere PORT801 SDTO1 CH1 and CH2 A/D Data Output...
  • Page 8 [AKD5538-B] (2-2) Jumper Setting for Clocks and Data Names Functions Setting Select output connector for the digital audio COAX: BNC (default) JP600 TXDATA-SEL interface TX data from AK4118A. OPT: Optical Connector DIT: AK4118A output (default) PORT: Pin Header PORT800-BICK JP801 BICK-SEL Select clock source for BICK.
  • Page 9: Control Mode Settings

    [AKD5538-B] [3] Control Mode Settings AK5538 can be controlled by pins or registers. The pin control mode is called parallel control mode in the AK5538 datasheet. The register control mode is called serial control mode. The register access is made by I2C bus or 3-wire serial bus.
  • Page 10: Switch Setting

    [AKD5538-B] (3-2) 3-wire Serial Bus Control Mode Switch Setting SW804 SW802 SW803 9 10 9 10 2 3 4 : Selected Position Set chip address by CAD0-SPI bit and CAD1 bit. Figure 3-2-1. Switch Settings for 3-wire serial bus control mode The USB I/F BOX and control software don’t support 3-wire serial bus control mode.
  • Page 11 [AKD5538-B] (3-3) Parallel Control Mode Switch Settings SW803 SW804 SW802 9 10 9 10 : Selected Position Figure 3-3-1. Switch Settings for Parallel Control mode In parallel control mode, set the operation mode with the DIP switches. USB I/F BOX and control software are not used. <KM131002>...
  • Page 12 [AKD5538-B] [4] Analog Signal Input Settings Differential signals can be connected to the cannon connectors. The table below shows the relationship between channel number and connector number. AIN1 AIN2 AIN3 AIN4 AIN5 AIN6 AIN7 AIN8 Channel J200 J201 J300 J301 J400 J401 J500...
  • Page 13: Master Mode

    [AKD5538-B] [5] Slave Mode/Master Mode Setting (5-1) Slave Mode (Default) The default setting for the board is slave mode. The MCLK, LRCK and BICK are supplied from AK4118A (DIT) on the board to AK5538. SW802 PORT800 PORT801 PORT802 MCLK-SEL BICK-SEL LRCK-SEL PORT PORT...
  • Page 14 [AKD5538-B] [6] AK4118A settings The onboard AK4118A converts A/D data to digital audio interface format. Select the data format with the DIP switch SW600. SW600 : Selected Position Figure 6. SW400 Assignment (AK4118A) (3-1). Setting for SW600 (Sets AK4118A (U4) audio format and master clock setting) Switch Name Function default...
  • Page 15 [AKD5538-B] [7] AK5538 setting tables (7-1) Serial Control mode (I2C bus) The AK5538 operation modes are set by the control software in I2C control mode. Figure 7-1. Control Software Main Window (AK5538) Register data is indicated on the register map. Each bit on the register map is a push-button switch. Button DOWN with red lettering indicates “1”...
  • Page 16 [AKD5538-B]  MONO2-1: Channel Summation Select Data on Slot MONO2 MONO1 Slot 8 Slot 7 Slot 6 Slot 5 Slot 4 Slot 3 Slot 2 Slot 1 All “0” or All “0” or All “0” or All “0” or All “0” or All “0”...
  • Page 17 [AKD5538-B]  DIF1-0: Audio Data Format Modes Select (default = 00b)  TDM1-0: TDM Modes Select (default = 00b) The format of AK4118A is I2S at the default of the board. When using DIT output, set DIF1-0 bits to "01b". *: Don’t Care LRCK BICK...
  • Page 18 [AKD5538-B]  CKS3-0: Sampling Speed Mode and MCLK Frequency Select In default setting for the board, AK4118A supplies LRCK and MCLK to AK5538. The LRCK (fs) is 48kHz and the MCLK is 512fs. When using the board in default settings, set CKS3-0 bits to "0000b". CKS3 CKS2 CKS1...
  • Page 19 [AKD5538-B]  DSDSEL1-0: Select the Frequency of DCLK (DSD Clock) Frequency DSD Sampling Frequency DSDSEL1 DSDSEL0 Mode fs=32kHz fs=44.1kHz fs=48kHz 64fs 2.048MHz 2.8224MHz 3.072MHz default 128fs 4.096MHz 5.6448MHz 6.144MHz 256fs 8.192MHz 11.2896MHz 12.288MHz Reserved Reserved Reserved Table 7-1-5. DSD Sampling Frequency Select ...
  • Page 20 [AKD5538-B] (7-2) Parallel Control mode (DIP Switches) The AK5538 operation modes are set by the DIP switches in parallel control mode. SW804 SW803 SW802 2 3 4 9 10 9 10 : Selected Position Figure 7-2. DIP Switches for AK5538 Operation Settings Switch Name Function default...
  • Page 21 [AKD5538-B] Switch Name Function default CAD0-SPI Chip Address0 Pin in 3-wire serial control mode. CAD0-I2C Chip Address0 Pin in I2C bus serial control mode. CAD1 Chip Address1 Pin in I2C bus or 3-wire serial control mode. See Table 7-2-6. CKS0 Clock Mode Setting #0 See Table 7-2-6.
  • Page 22 [AKD5538-B]  PW2-0: Power Down control for channel 8-1 (default=”HHH”) ODP pin = “L” Table 7-2-4. Channel Power & Mono Mode Select (ODP pin = “L”) (AK5538) PW2 pin PW1 pin PW0 pin SW802_4 SW802_3 SW802_2 default Table 7-2-4-1. Channel Power ON/OFF Select (ODP pin = “L”) (AK5538) PW2 pin PW1 pin PW0 pin...
  • Page 23 [AKD5538-B] ODP pin = “H” Table 7-2-5. Channel Power & Mono Mode Select (ODP pin = “H”) (AK5538) PW2 pin PW1 pin PW0 pin SW802_4 SW802_3 SW802_2 default Table 7-2-5-1. Channel Power ON/OFF Select (ODP pin = “H”) (AK5538) PW2 pin PW1 pin PW0 pin Slot 8...
  • Page 24 [AKD5538-B]  CKS3-0: Sampling Speed Mode and MCLK Frequency Select CKS3 CKS2 CKS1 CKS0 MSN pin MCLK fs Range SW804-7 SW804-6 SW804-5 SW804-4 SW802-5 Frequency 128fs Quad Speed Mode 108kHz  fs  216kHz 192fs Quad Speed Mode 108kHz  fs  216kHz 256fs Normal Speed Mode 8kHz ...
  • Page 25 [AKD5538-B]  DIF1-0: Audio Data Interface Modes Select (default = ”LH”)  TDM1-0: TDM Modes Select (default = ”LL”) *: Don’t Care LRCK BICK MCLK Multiplex Speed TDM1 TDM0 DIF1 DIF0 SDTO Mode Mode SW803-6 SW803-5 SW802-5 SW803-7 SW803-6 Pol. I/O Freq.
  • Page 26 [AKD5538-B]  DSDSEL1-0: Select the Frequency of DCLK (DSD Clock) Frequency DSD Sampling Frequency DSDSEL1 DSDSEL0 Mode SW803-7 SW803-8 fs=32kHz fs=44.1kHz fs=48kHz L (0) L (0) 64fs 2.048MHz 2.8224MHz 3.072MHz default L (0) H (1) 128fs 4.096MHz 5.6448MHz 6.144MHz H (1) L (0) 256fs 8.192MHz...
  • Page 27 [AKD5538-B] [8] Start-up and stop sequence [SW800] Power Down (PDN) for AK5538 Reset AK5538 (U100) once by brining SW800 to “L” once upon power-up. Keep “H” when AK5538 is in use; keep “L” when AK5538 is not in use. [SW801] Power Down (PDN) for AK4118A Reset AK4118A (U600) once by brining SW801 to “L”...
  • Page 28: Operation Flow

    [AKD5538-B] Control Software Manual  Set-up evaluation board and control software 1. Set up AKD5538-B evaluation board according to above instructions. 2. Connect PC with AKD5538-B evaluation board by USB cable (included in package). 3. Insert the CD-ROM labeled “AKD5538-B Evaluation Kit” into the CD-ROM drive. 4.
  • Page 29: Button Functions

    [AKD5538-B] Click the “Write” button on right side of Addr 01H register. Figure 9-2. Register set window Input dummy command settings and click “OK” to write dummy command to AK5538. The following No Ack error message will pop up. Click “OK”. Figure 9-3.
  • Page 30: Dialog Boxes

    [AKD5538-B]  Dialog boxes 1. [All Register Write]: Dialog box to write register setting files Clicking the [All Reg Write] button in the main window opens the dialog box below. Multiple register setting files created by the [SAVE] button can be set and applied. Figure 9-4.
  • Page 31 [AKD5538-B] 2. [Data Read/Write]: Dialog box to manually enter register setting Click the [Data R/W] button in the main window to open the data read/write dialog box. Data manually entered into Data box is written to the specified address. Figure 9-5. Window of [Data R/W] Textbox Functions: [Address] : Input register address in 2 hexadecimal digits.
  • Page 32 [AKD5538-B] Tab Functions 1. [REG]: Register Map Register data is indicated on the register map. Each bit on the register map is a push-button switch. Button DOWN and red lettering indicates “1” and button UP with blue lettering indicates “0”. Buttons with “---“are undefined in the datasheet.
  • Page 33: Tool]: Testing Tools

    [AKD5538-B] 2. [Tool]: Testing Tools This tab screen is for the evaluation testing tool. Click button for each testing tool. Figure 9-7. [Tool] window <KM131002> 2022/01 - 33-...
  • Page 34: Measurement Results

    [AKD5538-B] Measurement Results [Measurement condition] ・Measurement unit : Audio Precision APx555(No.00760) ・MCKI : 512fs/256fs/128fs (24.576MHz ) ・BICK : 64fs ・fs : 48kHz / 96kHz / 192kHz ・Bit : 24bit ・Measurement Mode : ADC @ Slave Mode ・Power Supply : VOP+(15V)=15V, GND AVDD=+3.3V (Regulator), TVDD=+3.3V (Regulator) ・Input Frequency : 1kHz...
  • Page 35 [AKD5538-B] [Plots] [ SDTO1 ] : Stereo Mode fs = 48 kHz Blue : Lch, Red : Rch AK5538 FFT (-1dBFS Input) AVDD=+3.3V, TVDD=+3.3V, MCLK=512fs, fin=1kHz Figure 9-1-1. FFT (-1dBFS Input) AK5538 FFT ( -60dBFS Input) AVDD=+3.3V, TVDD=+3.3V, MCLK=512fs, fin=1kHz Figure 9-1-2.
  • Page 36 [AKD5538-B] fs = 48 kHz AK5538 FFT ( No Signal Input) AVDD=+3.3V, TVDD=+3.3V, MCLK=512fs, fin=1kHz Figure 9-1-3. FFT (No Signal Input) AK5538 THD+N vs. Input Level AVDD=+3.3V, TVDD=+3.3V, MCLK=512fs, fin=1kHz Figure 9-1-4. THD+N vs. Input Level <KM131002> 2022/01 - 36-...
  • Page 37 [AKD5538-B] fs = 48 kHz AK5538 THD+N vs. Input Frequency AVDD=+3.3V, TVDD=+3.3V, MCLK=512fs, -1dBFS Input Figure 9-1-5. THD+N vs. Input Frequency AK5538 Linearity AVDD=+3.3V, TVDD=+3.3V, MCLK=512fs, fin=1kHz Figure 9-1-6. Linearity <KM131002> 2022/01 - 37-...
  • Page 38 [AKD5538-B] fs = 48 kHz AK5538 Frequency Response AVDD=+3.3V, TVDD=+3.3V, MCLK=512fs, -1dBFS input Figure 9-1-7. Frequency Response AK5538 Crosstalk AVDD=+3.3V, TVDD=+3.3V, MCLK=512fs, -1dBFS Input Figure 9-1-8. Crosstalk <KM131002> 2022/01 - 38-...
  • Page 39 [AKD5538-B] Blue : Lch, Red : Rch fs = 96 kHz AK5538 FFT (-1dBFS Input) AVDD=+3.3V, TVDD=+3.3V, MCLK=256fs, fin=1kHz Figure 9-2-1. FFT (-1dBFS Input) AK5538 FFT ( -60dBFS Input) AVDD=+3.3V, TVDD=+3.3V, MCLK=256fs, fin=1kHz Figure 9-2-2. FFT (-60dBFS Input) <KM131002> 2022/01 - 39-...
  • Page 40 [AKD5538-B] fs =96 kHz AK5538 FFT ( No Signal Input) AVDD=+3.3V, TVDD=+3.3V, MCLK=256fs, fin=1kHz Figure 9-2-3. FFT (No Signal Input) AK5538 THD+N vs. Input Level AVDD=+3.3V, TVDD=+3.3V, MCLK=256fs, fin=1kHz Figure 9-2-4. THD+N vs. Input Level <KM131002> 2022/01 - 40-...
  • Page 41 [AKD5538-B] fs = 96 kHz AK5538 THD+N vs. Input Frequency AVDD=+3.3V, TVDD=+3.3V, MCLK=256fs, -1dBFS Input Figure 9-2-5. THD+N vs. Input Frequency AK5538 Linearity AVDD=+3.3V, TVDD=+3.3V, MCLK=256fs, fin=1kHz Figure 9-2-6. Linearity <KM131002> 2022/01 - 41-...
  • Page 42 [AKD5538-B] fs = 96 kHz AK5538 Frequency Response AVDD=+3.3V, TVDD=+3.3V, MCLK=256fs, -1dBFS Input Figure 9-2-7. Frequency Response AK5538 Crosstalk AVDD=+3.3V, TVDD=+3.3V, MCLK=256fs, -1dBFS Input Figure 9-2-8. Crosstalk <KM131002> 2022/01 - 42-...
  • Page 43 [AKD5538-B] Blue : Lch, Red : Rch fs = 192 kHz AK5538 FFT (-1dBFS Input) AVDD=+3.3V, TVDD=+3.3V, MCLK=128fs, fin=1kHz Figure 9-3-1. FFT (-1dBFS Input) AK5538 FFT ( -60dBFS Input) AVDD=+3.3V, TVDD=+3.3V, MCLK=128fs, fin=1kHz Figure 9-3-2. FFT (-60dBFS Input) <KM131002> 2022/01 - 43-...
  • Page 44 [AKD5538-B] fs =192 kHz AK5538 FFT ( No Signal Input) AVDD=+3.3V, TVDD=+3.3V, MCLK=128fs, fin=1kHz Figure 9-3-3. FFT (No Signal Input) AK5538 THD+N vs. Input Level AVDD=+3.3V, TVDD=+3.3V, MCLK=128fs, fin=1kHz Figure 9-3-4. THD+N vs. Input Level <KM131002> 2022/01 - 44-...
  • Page 45 [AKD5538-B] fs = 192 kHz AK5538 THD+N vs. Input Frequency AVDD=+3.3V, TVDD=+3.3V, MCLK=128fs, -1dBFS Input Figure 9-3-5. THD+N vs. Input Frequency AK5538 Linearity AVDD=+3.3V, TVDD=+3.3V, MCLK=128fs, fin=1kHz Figure 9-3-6. Linearity <KM131002> 2022/01 - 45-...
  • Page 46 [AKD5538-B] fs = 192 kHz AK5538 Frequency Response AVDD=+3.3V, TVDD=+3.3V, MCLK=128fs, -1dBFS Input Figure 9-3-7. Frequency Response AK5538 Crosstalk AVDD=+3.3V, TVDD=+3.3V, MCLK=128fs, -1dBFS Input Figure 9-3-8. Crosstalk <KM131002> 2022/01 - 46-...
  • Page 47: Revision History

    [AKD5538-B] REVISION HISTORY Date Manual Board Reason Page Contents (YY/MM/DD) Revision Revision 18/10/29 KM131000 First edition 20/10/01 KM131001 Change Change the overall configuration Board revision update(Rev.0→1). 22/01/26 KM131002 Modification Change of U100. <KM131002> 2022/01 - 47-...
  • Page 48 [AKD5538-B] IMPORTANT NOTICE 0. Asahi Kasei Microdevices Corporation (“AKM”) reserves the right to make changes to the information contained in this document without notice. When you consider any use or application of AKM product stipulated in this document (“Product”), please make inquiries the sales office of AKM or authorized distributors as to current status of the Products.
  • Page 49 AVSS R100 short R153 0 SD/PMOD AVSS SD/PMOD AVSS AVSS1 SD/PMOD R101 open C100 C101 R102 short 0.1u R152 0 AVDD1 SLOW/DCKB AVDD SLOW/DCKB AVDD1 SLOW/DCKB R103 short R151 0 AIN3-P0 CKS3/CAD1 AIN3P CKS3/CAD1 AIN3P CKS3/CAD1 C102 0.015u R104 short R150 51 AIN3-N0 CKS2/SCL/CCLK...
  • Page 50 VOP+ R205 C211 U201 C205 100u R203 3.3k AIN1P C250 100p AIN1-P0 BIAS11 J200 R207 R209 short AIN1(x86)/non(x42) VOP- C206 100u NJM5534 AVSS AIN1N C207 C208 C213 C214 C217 XLM-3-31PCV 0.01u 0.01u 100p AVSS R206 C212 VBIAS U202 R201 R204 3.3k C251 100p...
  • Page 51 VOP+ R305 C311 U301 C305 100u R303 3.3k AIN3P C350 100p AIN3-P0 J300 BIAS31 R307 R309 short AIN3(x86)/AIN1(x42) VOP- C306 100u NJM5534 AVSS AIN3N C307 C308 C313 C314 C317 XLM-3-31PCV 0.01u 0.01u 100p AVSS R306 C312 VBIAS U302 R301 R304 3.3k C351 100p...
  • Page 52 VOP+ R405 C411 U401 C405 100u R403 3.3k AIN5P C450 100p AIN5-P0 BIAS51 J400 R407 R409 short AIN5(x86)/AIN3(x42) VOP- C406 100u NJM5534 C417 AVSS AIN5N C407 C408 C413 C414 XLM-3-31PCV 0.01u 0.01u 100p AVSS R406 C412 VBIAS U402 R401 R404 3.3k C451 100p...
  • Page 53 VOP+ R505 C511 U501 C505 100u R503 3.3k AIN7P C550 100p AIN7-P0 J500 BIAS71 R507 R509 short AIN7(x86)/non(x42) VOP- C506 100u NJM5534 AVSS AIN7N C507 C508 C513 C514 C517 XLM-3-31PCV 0.01u 0.01u 100p AVSS R506 C512 VBIAS U502 R501 R504 3.3k C551 100p...
  • Page 54 C601 D33V C602 0.01u DVSS R600 C603 0.47u IPS0/RX4 INT0 NC02 OCKS0/CSN/CAD0 OCKS0-T D33V DIF0/RX5 OCKS1/CCLK/SCL OCKS1-T SW600 D33V TEST2 CM1/CDTI/SDA DIF1/RX6 CM0/CDTO/CAD1 U600 DVSS OCKS0-T VSS1 PDN20 OCKS1-T AK4118A DIF2/RX7 C608 X600 X600 Frequency Check -> 24.576MHz 24.576MHz + 1pin Socket (AK4118 Xtal) IPS1/IIC C609 DVSS...
  • Page 55 D33V R706 TVDD1 100k C700 0.01u PCA9306DP1 U700 DVSS R708 R709 C711 0.01u VREF2 VREF1 R703 SCL/CCLK SCL/CCLK SCL/CCLK SCL2 SCL1 R704 SDA/CDTI SDA/CDTI SDA/CDTI SDA2 SDA1 R707 TVDD1 100k C701 0.01u PCA9306DP1 U701 DVSS R710 R712 C713 0.01u PORT700 VREF2 VREF1 R705...
  • Page 56 PORT800 JP800 PORT802 MCLK PORT800-MCLK DSDOL1 PORT802-DSDOL1 PORT802-DSDOL1 MCLK-4118A-T DSDOL1-T1 MCLK-T1 BICK PORT800-BICK PORT800-MCLK PORT R807 DSDOR1 PORT802-DSDOR1 PORT802-DSDOR1 R808 DSDOR1-T1 LRCK PORT800-LRCK DSDOL2 PORT802-DSDOL2 PORT802-DSDOL2 R809 DSDOL2-T1 DSDOR2 PORT802-DSDOR2 PORT802-DSDOR2 R810 DSDOR2-T1 PCM-PORT1 EXT-T MCLK-SEL PORT802-DSDOL3 R811 DSDOL3-T1 PORT801 J800 R881 PORT802-DSDOR3...
  • Page 57 1: A(D33V) <-> B(TVDD) 1: A(D33V) <-- B(TVDD) 2: A(D33V) --> B(TVDD) 2: A(D33V) <-- B(TVDD) U900 U903 R900 R904 BICK/DCLK R920 R924 LRCK/DSDOL1 BICK-T1 LRCK/DSDOL1 BICK/DCLK DSDOL1-T1 R901 R905 LRCK/DSDOL1 R921 R925 TDMIN/DSDOR1 LRCK-T1 LRCK/DSDOL1 DSDOR1-T1 TDMIN/DSDOR1 MSN01-N DP01-P DP01-N 1DIR 1DIR...
  • Page 58 +15V +15V VOP+ J1000 L1000 (short) +15V T1001 T-45(Green) BA033CC0T -15V +15V-->+3.3V J1001 R1000 short AVDD1 -15V R1007 short T-45(Blue) C1000 C1001 C1002 C1003 T-45(Red) 0.01u 0.01u J1004 R1008 open J1002 AVDD AVSS T-45(Black) AVSS VBIAS R1009 short R1001 short AVSS J1003 C1024...
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