AsahiKASEI AK4493S Manual

Evaluation board

Advertisement

The AKD4493S-A is an evaluation board for the AK4493S (Premium 32-bit 2ch stereo DAC) that supports
Network-Audios, USB-DAC, Car-Audio Systems. It integrates differential output low pass filters, allowing
quick evaluation with digital audio interface.
Ordering Guide
AKD4493S-A -- Evaluation Board for the AK4493S
 Low Pass Filters (LPF) for Pre-amplifier Outputs
 Digital Audio Interface (AK4118A)
 10-pin Header for Serial Control (AK4493S)
DIR
COAX In
Opt In
Note 1. Circuit schematics are attached at the end of this document.
<KM136000>
1. General Description
(A USB I/F board for
IBM-AT compatible computers and control software are
included in this package.
AK4118A
AK4493S
Figure 1. AKD4493S-A Block Diagram
AK4493S Evaluation Board Rev.0
)
2. Function
2nd Order LPF
(Note
- 1-
[AKD4493S-A]
AKD4493S-A
Lch
Rch
1)
2022/01

Advertisement

Table of Contents
loading
Need help?

Need help?

Do you have a question about the AK4493S and is the answer not in the manual?

Questions and answers

Subscribe to Our Youtube Channel

Summary of Contents for AsahiKASEI AK4493S

  • Page 1 AK4493S Evaluation Board Rev.0 1. General Description The AKD4493S-A is an evaluation board for the AK4493S (Premium 32-bit 2ch stereo DAC) that supports Network-Audios, USB-DAC, Car-Audio Systems. It integrates differential output low pass filters, allowing quick evaluation with digital audio interface.
  • Page 2: Board Appearance

    Board: AKD4493S-A-SUB-48LQFP (5) AK4118A (U101) The AK4118A is a digital audio transceiver. It is used when evaluating sound quality of the AK4493S by SPDIF signals. (6) µP-IF PORT (PORT103) 10-pin Header for the USB I/F board for AK4493S. Connect the USB I/F board for IBM-AT compatible computers to this port for a connection to a USB port of a PC.
  • Page 3 (7) DIP Switches ( Main Board : SW101 / SW200 ) ( Sub Board (AKD4493S-A-SUB-48LQFP) : SW10 / SW11 ) Setting Switches for the AK4493S and the AK4118A. Upside is “H” (ON) and Downside is “L” (OFF). Settings Refer to “■ Jumper Pin and DIP Switch ”...
  • Page 4: Operation Sequence

    -15V These are used when supplying MVREFL (Regulator J502 MVREFL(+15V) Green +10 to +15V Open MVREFL/R(+15V) from a for AK4493S) MVREF connector for a regulator. MVREFR (Regulator Set the JP509 and JP510 jumper J503 MVREFR(+15V) Green +10 to +15V Open for AK4493S) pins to “MVREF”...
  • Page 5: Evaluation Mode

    [AKD4493S-A] ■ Evaluation Mode (1) Evaluation with a DIR (COAX) < Default > The J106 (COAX) jack is used in this mode. The DIR (AK4118A) generates MCLK, BICK, LRCK and SDATA from the input data of the J106 (COAX) connector. Set the JP108 (RX-SEL) jumper pin to ‘Up’...
  • Page 6 [AKD4493S-A] (3) In the case that all interface clocks including the master clock are input externally. (JP223, JP224) Input all interface clocks including the master clock to the JP223 and JP224. The JP223 (EXT for MCLK) and the JP224 (EXT for BICK and SDATA and LRCK) jumper ports is used in this mode.
  • Page 7 [AKD4493S-A] ■ Jumper Pin and DIP Switch Settings (1) Jumper Pin Settings Table 3-1-1. Jumper Settings for power supply [ Main Board ] Default Name Content Setting AVDD pin input select REG(3.3V): The AVDD pin is supplied from the T100 regulator. JP100 AVDD REG(3.3V)
  • Page 8 DVDD power supply for DVDD (the AK4493S) regulator output select JP16 DVDD-SEL short: The DVDD pin (the AK4493S) is supplied from the T102 regulator. short open: The DVDD pin (the AK4493S) is LDO output voltage. Table 3-2-1. Jumper Settings for data & clock [ Main Board ]...
  • Page 9 WCK (Word clock) input data signal is supplied from 2-pin of JP13. AK4493S Input/Output data select. JP14 DZFL short: DIF0 input data is supplied from SW10. open open: DZFL output data signal is monitored. (AK4493S) AK4493S Input/Output data select. JP15 DZFR short: DIF1 input data is supplied from SW10. open open: DZFR output data signal is monitored.
  • Page 10 < Default > 256fs 96 kHz 512fs 48 kHz 128fs 192 kHz Table 4-1-2. Master Clock Setting of the AK4118A AK4493S Settings : Sub Board [AKD4493S-A-SUB-48LQFP] [SW10]: Setting of the AK4493S Name ON (“H”) OFF (“L”) Default SMUTE Mute “ON”...
  • Page 11 Short delay sharp roll-off filter < Default > Short delay slow roll-off filter Super Slow roll-off filter Low dispersion Short delay filter *: Do not care Table 4-2-1. Digital Filter Setting of the AK4493S (Pin Control Mode) DIF2 DIF1 DIF0 Mode Input Format BICK ...
  • Page 12 [SW100] (PDN): DAC Reset control. It must be set to “H” during operation. After power-up, the AKD4493S-A must be reset once. To reset the AKD4493S-A, set the SW100 toggle switch to “L” and power down the AK4493S and the AK4118A. Then, release the power-down by setting back the SW100 to “H”. ■...
  • Page 13 3: Control Soft “ak4493s.exe” open. 2-1: Setting : I2C, CAD1-0 2-2: InitPort & Write Default. 2-3: [Script] Tab -> Refer -> “ak4493s-defaultset.txt” Load. Note. The read file (text file) is packed with the evaluation board. Control Soft: RegMap Window (after “Refer”)
  • Page 14 [AKD4493S-A] 001: 20bit, LSB justified 010: 24bit, MSB justified 011: 24 or 16bit, I2S compatible 100: 24bit, LSB justified 101: 32bit, LSB justified 110: 32bit, MSB justified 111: 32bit, I2S compatible Addr Register Name Control 2 DZFE DZFM DFS1 DFS0 DEM1 DEM0 SMUTE...
  • Page 15 Serial Control Mode The AKD4493S-A (for the AK4493S) should be connected to a PC (IBM-AT compatible) via a USB control box (AKDUSBIF-B) included in this package. The USB control box is connected to a PC with a USB cable and the AKD4493S-A with a 10-pin flat cable.
  • Page 16 [AKD4493S-A] Set up the resistor parts. (Control Mode Setting) : For the AK4493S … Selected Position Control Mode settings. Serial SW10 (AK4493S) SW11 (AK4493S) Control Software Control ( No.7: PSN ) ( No.1 : I2C ) (Control I/F) Mode SW10...
  • Page 17 [AKD4493S-A] Set up the jumper pins. JP10 = CSN short, JP11 = CCLK/SCL short, JP12 = CDTI/SDA short JP13 = L short, JP14 = open, JP15 = open JP14 JP15 SMUTE CCLK/SCL SD CDTI/SDA SLOW DZFL DZFR JP10 JP11 JP12 JP13 Figure 12.
  • Page 18 PC. 4. Insert the CD-ROM labeled “AKD4493S-A Evaluation Kit” into the CD-ROM drive. 5. Access the CD-ROM drive and double-click the icon “ak4493s.exe” to open the control program. 6. Begin evaluation by following the procedure below.
  • Page 19 Note 5. The [All Read] button is only valid when the interface mode for register control is in I C bus control mode. When input dummy command settings to AK4493S and the connection error by the evaluation board to a PC with USB cable, the following Init error message will pop up. Click “OK”. <KM136000>...
  • Page 20 [AKD4493S-A] ■ Tab Functions 1. [RegMap] Tab: Register Map This tab is for register read and write. Each bit on the register map is a push-button switch. Button Down indicates “1” and the bit name is shown in red (when read-only the name is shown in dark red). Button Up indicates “0”...
  • Page 21 [AKD4493S-A] [Write] button: Data Write Dialog Select the [Write] button located on the right of the each corresponding address when changing two or more bits on the same address simultaneously. Click the [Write] button for the register pop-up dialog box shown below. When the checkbox next to the register is checked, the data will become “1”.
  • Page 22 [AKD4493S-A] 2. [ Script ] Tab : Script Function Figure 15. Window of [Script] [Refer] : Select a script file. The script written on the file will be executed automatically. [Repeat] : The selected script file will be executed once again. <KM136000>...
  • Page 23: Sequence Setting

    [AKD4493S-A] ■ Dialog Box 1. [Sequence]: Sequence Dialog Box Click the [Sequence] button in the main window for Sequence dialog box. Register sequence may be set and executed. Figure 16. [Sequence] Window ~ Sequence Setting ~ Set register sequence according to the following process. Select a command Use [Select] pull-down box to choose commands.
  • Page 24 [AKD4493S-A] 2. Input Sequence [Address]: Data Address [Data]: Write Data [Mask]: Mask This value “ANDed” with the write data becomes the input data. When Mask = 0x00, current setting is hold. When Mask = 0xFF, the 8bit data which is set in the [Data] box is written. When Mask = 0x0F, lower 4bit data which is set in the [Data] box is written.
  • Page 25 [AKD4493S-A] Revision History Date Manual Board Reason Page Contents (y/m/d) Revision Revision 22/01/01 KM136000 First Edition <KM136000> 2022/01 - 25-...
  • Page 26: Important Notice

    [AKD4493S-A] IMPORTANT NOTICE 0. Asahi Kasei Microdevices Corporation (“AKM”) reserves the right to make changes to the information contained in this document without notice. When you consider any use or application of AKM product stipulated in this document (“Product”), please make inquiries the sales office of AKM or authorized distributors as to current status of the Products.
  • Page 27: Measurement Results

    : 64fs  fs : 44.1kHz, 96kHz, 192kHz  Bit : 24bit  Power Supply for AK4493S: AVDD=3.3V, TVDD=3.3V, DVDD=1.8V VDDL/R=5V, VREFHL/R=5V  Pass : DIR → AK4493S → Cannon Connector  Interface : Internal DIR (44.1 kHz / 96kHz / 192kHz) ...
  • Page 28 [AKD4493S-A] [Plots] fs = 44.1 kHz AK4493S THD+N vs. Input Level AVDD=3.3V, TVDD=3.3V, DVDD=1.8V, VDDL/R=VREFHL/R=5V, MCLK=256fs, fs=44.1kHz DAC1 Ch1 : Lch, Ch2 : Rch Figure 20-1. THD+N vs. Input Level AK4493S THD+N vs. Input Frequency AVDD=3.3V, TVDD=3.3V, DVDD=1.8V, VDDL/R=VREFHL/R=5V, MCLK=256fs, fs=44.1kHz...
  • Page 29 = 44.1 kHz AK4493S Linearity AVDD=3.3V, TVDD=3.3V, DVDD=1.8V, VDDL/R=VREFHL/R=5V, MCLK=256fs, fs=44.1kHz DAC1 Ch1 : Lch, Ch2 : Rch Figure 20-3. Linearity AK4493S Frequency Response AVDD=3.3V, TVDD=3.3V, DVDD=1.8V, VDDL/R=VREFHL/R=5V, MCLK=256fs, fs=44.1kHz DAC1 Ch1 : Lch, Ch2 : Rch Figure 20-4. Frequency Response <KM136000>...
  • Page 30 AK4493S Crosstalk AVDD=3.3V, TVDD=3.3V, DVDD=1.8V, VDDL/R=VREFHL/R=5V, MCLK=256fs, fs=44.1kHz DAC1 Ch1 : Lch, Ch2 : Rch Figure 20-5. Crosstalk AK4493S FFT (0dBFS Input) AVDD=3.3V, TVDD=3.3V, DVDD=1.8V, VDDL/R=VREFHL/R=5V, MCLK=256fs, fs=44.1kHz DAC1 Ch1 : Lch, Ch2 : Rch Figure 20-6. FFT (0dBFS Input) <KM136000>...
  • Page 31 AVDD=3.3V, TVDD=3.3V, DVDD=1.8V, VDDL/R=VREFHL/R=5V, MCLK=256fs, fs=44.1kHz DAC1 Ch1 : Lch, Ch2 : Rch Figure 20-7. FFT (-60dBFS Input) AK4493S FFT ( No Signal Input) AVDD=3.3V, TVDD=3.3V, DVDD=1.8V, VDDL/R=VREFHL/R=5V, MCLK=256fs, fs=44.1kHz DAC1 Ch1 : Lch, Ch2 : Rch Figure 20-8. FFT (No Signal Input) <KM136000>...
  • Page 32 [AKD4493S-A] fs = 96kHz AK4493S THD+N vs. Input Level AVDD=3.3V, TVDD=3.3V, DVDD=1.8V, VDDL/R=VREFHL/R=5V, MCLK=128fs, fs=96kHz DAC1 Ch1 : Lch, Ch2 : Rch Figure 21-1. THD+N vs. Input Level AK4493S THD+N vs. Input Frequency AVDD=3.3V, TVDD=3.3V, DVDD=1.8V, VDDL/R=VREFHL/R=5V, MCLK=128fs, fs=96kHz DAC1 Ch1 : Lch, Ch2 : Rch Figure 21-2.
  • Page 33 = 96kHz AK4493S Linearity AVDD=3.3V, TVDD=3.3V, DVDD=1.8V, VDDL/R=VREFHL/R=5V, MCLK=128fs, fs=96kHz DAC1 Ch1 : Lch, Ch2 : Rch Figure 21-3. Linearity AK4493S Frequency Response AVDD=3.3V, TVDD=3.3V, DVDD=1.8V, VDDL/R=VREFHL/R=5V, MCLK=128fs, fs=96kHz DAC1 Ch1 : Lch, Ch2 : Rch Figure 21-4. Frequency Response <KM136000>...
  • Page 34 AK4493S Crosstalk AVDD=3.3V, TVDD=3.3V, DVDD=1.8V, VDDL/R=VREFHL/R=5V, MCLK=128fs, fs=96kHz DAC1 Ch1 : Lch, Ch2 : Rch Figure 21-5. Crosstalk AK4493S FFT (0dBFS Input) AVDD=3.3V, TVDD=3.3V, DVDD=1.8V, VDDL/R=VREFHL/R=5V, MCLK=128fs, fs=96kHz DAC1 Ch1 : Lch, Ch2 : Rch Figure 21-6. FFT (0dBFS Input) <KM136000>...
  • Page 35 AVDD=3.3V, TVDD=3.3V, DVDD=1.8V, VDDL/R=VREFHL/R=5V, MCLK=128fs, fs=96kHz DAC1 Ch1 : Lch, Ch2 : Rch Figure 21-7. FFT (-60dBFS Input) AK4493S FFT ( No Signal Input) AVDD=3.3V, TVDD=3.3V, DVDD=1.8V, VDDL/R=VREFHL/R=5V, MCLK=128fs, fs=96kHz DAC1 Ch1 : Lch, Ch2 : Rch Figure 21-8. FFT (No Signal Input) <KM136000>...
  • Page 36 [AKD4493S-A] fs = 192kHz AK4493S THD+N vs. Input Level AVDD=3.3V, TVDD=3.3V, DVDD=1.8V, VDDL/R=VREFHL/R=5V, MCLK=128fs, fs=192kHz DAC1 Ch1 : Lch, Ch2 : Rch Figure 22-1. THD+N vs. Input Level AK4493S THD+N vs. Input Frequency AVDD=3.3V, TVDD=3.3V, DVDD=1.8V, VDDL/R=VREFHL/R=5V, MCLK=128fs, fs=192kHz DAC1 Ch1 : Lch, Ch2 : Rch Figure 22-2.
  • Page 37 = 192kHz AK4493S Linearity AVDD=3.3V, TVDD=3.3V, DVDD=1.8V, VDDL/R=VREFHL/R=5V, MCLK=128fs, fs=192kHz DAC1 Ch1 : Lch, Ch2 : Rch Figure 22-3. Linearity AK4493S Frequency Response AVDD=3.3V, TVDD=3.3V, DVDD=1.8V, VDDL/R=VREFHL/R=5V, MCLK=128fs, fs=192kHz DAC1 Ch1 : Lch, Ch2 : Rch Figure 22-4. Frequency Response <KM136000>...
  • Page 38 AK4493S Crosstalk AVDD=3.3V, TVDD=3.3V, DVDD=1.8V, VDDL/R=VREFHL/R=5V, MCLK=128fs, fs=192kHz DAC1 Ch1 : Lch, Ch2 : Rch Figure 22-5. Crosstalk AK4493S FFT (0dBFS Input) AVDD=3.3V, TVDD=3.3V, DVDD=1.8V, VDDL/R=VREFHL/R=5V, MCLK=128fs, fs=192kHz DAC1 Ch1 : Lch, Ch2 : Rch Figure 22-6. FFT (0dBFS Input) <KM136000>...
  • Page 39 AVDD=3.3V, TVDD=3.3V, DVDD=1.8V, VDDL/R=VREFHL/R=5V, MCLK=128fs, fs=192kHz DAC1 Ch1 : Lch, Ch2 : Rch Figure 22-7. FFT (-60dBFS Input) AK4493S FFT ( No Signal Input) AVDD=3.3V, TVDD=3.3V, DVDD=1.8V, VDDL/R=VREFHL/R=5V, MCLK=128fs, fs=192kHz DAC1 Ch1 : Lch, Ch2 : Rch Figure 22-8. FFT (No Signal Input) <KM136000>...
  • Page 40 VREFLL VREFLR R113 C107 C108 C109 C110 R114 220u(A) 0.1u 0.1u 220u(A) U100 VREFHL VREFHR VREFHL VREFHR VREFHL VREFHR AVSS AK4493S AVSS TESTE R147 TESTE AVSS R146 ACKS/CAD1 AVDD ACKS/CAD1 C111 C112 AVDD AVSS 10u(A) 0.1u LDOE AVSS LDOE AVDD...
  • Page 41 CL100 Cut Land AVSS DVSS CL101 Cut Land AVSS DVSS AVSS AVSS AVSS AVSS AVSS AVSS PM-1 (23pin) L100 47u(L) PORT104 PM-1 (23pin) PM-1 (23pin) 92pin_3 C103 C102 DVSS 10u(A) AK449x Sub Board 0.1u(F) C107 10u(A) VSSL VSSR AVSS AVSS C106 0.1u JP108...
  • Page 42 AK4191 Digital-IC Block J200 TP200 DIGEXT-3p3V DTVDD1 MVDD+ T200 JP211 JP221 TVDD1-DIG0 BA033CC0T EXT(3.3V) JP210 MCLK-DIR R200 MCLK-DIR0 MCLK-1 DIGVDD1 DIGVDD1-3p3V REG(3.3V) PORT200 REG(3.3V) For TVDD1 REG(1.8V) JP222 EXT-DIGDATA BICK BICK-DIR R201 T201 BICK-DIR0 BICK-1 C200 TVDD1 SDATA SDATA-DIR R202 AK4490/AK4493/AK4497-DSD_EXT MCLK SDTO-DIR0...
  • Page 43 C308 C300 100u(A) R308 R312 R300 (short) MVDDL2+ AOUTLP C304 C309 R304 open U300A R324 (short) AVSS AVSS AVSS OPA1612 R316 MVDDL2- R317 J300 XLOUT AVSS AVSS C310 C301 100u(A) R309 R313 R301 (short) MVDDL2+ AOUTLN C305 C311 R305 open U300B R325 (short)
  • Page 44 J504 VREFHL MVDD+ JP501 VREFHL VREFHL Q500 MVDD+ JP509 BCP 56 MVREFL MVREFL MVREF J502 R500 R501 C505 R503 100u(A) MVREFL(+15V) 3.83k C503 C501 0.1u(A) 0.1u(A) D500 J510 J511 AVSS DVSS U500 R502 JP500 VSS-SEL1 JP520 VSS-SEL2 Q501 SB1188 CSC AVSS DVSS AD817A/AD...
  • Page 45 - 45-...
  • Page 46 - 46-...
  • Page 47 - 47-...
  • Page 48 - 48-...
  • Page 49 - 49-...
  • Page 50 - 50-...
  • Page 51 - 51-...
  • Page 52 - 52-...
  • Page 53 - 53-...
  • Page 54 - 54-...
  • Page 55 - 55-...
  • Page 56 - 56-...
  • Page 57 - 57-...
  • Page 58 - 58-...
  • Page 59 - 59-...
  • Page 60 - 60-...
  • Page 61 - 61-...
  • Page 62 - 62-...
  • Page 63 - 63-...
  • Page 64 - 64-...

Table of Contents