Marantz SR8001 Service Manual page 137

IC78 : LC747828A13
Pin No. Symbol
1 V
SS
2 Xtal
3 Xtal
4 CTRL1
5 BLANK
6 OSC
7 OSC
8 CHARA
9 CS
10 SCLK
11 SIN
12 V
DD
13 CV
OUT
14 NC
15 CV
16 V
DD
17 SYN
18 SEP
19 SEP
20 SEP
21 CTRL2
22 CTRL3
23 RST
24 V
DD
Function
1 Ground
IN
Crystal oscillator connection
OUT
Crystal oscillator input switching
Blanking output
IN
LC oscillator connection
OUT
Character output
Enable input
Clock input
Data input
2 Power supply
Video signal output
Video signal input
IN
1 Power supply
Sync separator circuit input
IN
Sync separator circuit bias voltage
C
Composite sync signal output
OUT
Vertical synchronization
IN
signal input
NTSC/PAL-M switching input
SEP input control
IN
Reset input
1 Power supply (+5 V)
Ground connection (digital system ground)
Used to connect the crystal oscillator and capacitor used to generate the internal
synchronization signal, or to input an external clock (2fsc or 4fsc).
Switches between external clock input mode and crystal oscillator mode.
Low = crystal oscillator mode, high = external clock mode
Outputs the blank signal (the OR of the character and border signals). (Outputs a composite
sync signal when MOD0 is high.) Outputs the crystal oscillator clock during reset (when the
RST pin is low), but can be set up to not output this signal by microprocessor command.
Connections for the coil and capacitor that form the oscillator that generates the character
output dot clock.
Outputs the character signal. (Functions as the external synchronization signal discrimination
signal output pin when MOD0 is high, and outputs the state of the judgment as to whether the
external synchronization signal is present or not. Outputs a high level when the synchronization
signal is present.) Outputs the dot clock (LC oscillator) during reset, but can be set up to not
output this signal by microprocessor command.
Serial data input enable input. Serial data input is enabled when low. A pull-up resistor is built in
(hysteresis input).
Serial data input clock input.
A pull-up resistor is built in (hysteresis input).
Serial data input. A pull-up resistor is built in (hysteresis input).
Composite video signal level adjustment power supply pin (analog system power supply).
Composite video signal output
Must be either connected to ground or left open.
Composite video signal input
Power supply (+5 V: digital system power supply)
Video signal input for the built-in sync separator circuit (Used for either horizontal
synchronization signal or composite sync signal input when the built-in sync separator circuit is
not used.)
Built-in sync separator circuit bias voltage monitor pin
Built-in sync separator circuit composite sync signal output. (When MOD1 is high, outputs a high
level during internal synchronization and a low level during external synchronization.) (Outputs
the SYN input signal when the internal sync separator circuit is not used.)
IN
Inputs a vertical synchronization signal created by integrating the SEP
integrator must be attached at the SEP
The setting indicated by this pin takes priority in switching between the NTSC, PAL, PAL-M and
PAL-N formats. A low level selects NTSC after a reset. The microprocessor command NTSC,
PAL, PAL-M, or PAL-N setting is valid. High = PAL-M format.
Controls whether or not the VSYNC signal is input to the SEP
high = VSYNC not input.
System reset input. A pull-up resistor is built in (hysteresis input).
Power supply (+5 V: digital system power supply)
171
Description
pin output signal. An
OUT
pin. This pin must be tied to V
OUT DD
input. Low = VSYNC input,
IN
1 if unused.