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A balanced input audio amplifier is formed with one half of a NE5532dual low noise op-amp
(U4a). A reference supply for the non-inverting input is obtained from R31, R32 and C42. The
high frequency response of U4a is limited by C41, C45 and C47, while capacitors C43 and C44
reduce the low frequency response.
The output of U4a is fed via a 1uF coupling capacitor to the AF gain potentiometer. The audio
signal is also made available via R40 on a separate connector for a LED S meter to display
receive signal strength. Transistor Q7 is turned on in TX state and shorts the audio signal input
to the LED S meter to ground. This stops switching transients from being displayed.
As the receiver gain is fixed between the antenna and the AF gain control, the audio level across
the AF gain control is directly proportional to the receive signal strength. This allows an
optional LED S meter to measure this audio level and accurately display the receive signal
strength on an LED bar graph.
3.9 A
P
UDIO
OWER
Audio fed from the wiper of the AF gain control is amplified by the other half of the dual op-amp
(U4b) which is configured for a gain of 5. The amplified signal is then applied to the audio power
amplifier (U5) to drive a loudspeaker. This is a TDA7052A device with a Bridge-Tied Load (BTL)
output. This configuration has a number of advantages for operation at low supply voltages, and
also allows the speaker to be directly connected to the chip without the need for a large
coupling capacitor.
Both speaker wires are connected directly to the IC. Connecting a speaker wire or
external load to ground may damage the IC.
3.10 A
AGC
UDIO
The main reason for choosing the TDA7052A is the ability to alter the gain over a very large
range by varying the DC voltage at pin 4. If pin 4 is left floating an internal source provides
about 1.1V resulting in a maximum gain of +30dB. As pin 4 is pulled low the gain decreases, and
if pulled all the way to ground the device is effectively shut off. By varying the amount of current
pulled from pin 4 the gain can be continuously varied. This feature is used here to provide an
Automatic Gain Control (AGC) circuit to even out receive audio and limit blasts from the speaker
on very strong signals.
The power supply for U5 is set to +8V by a 7808 regulator. This is done for two reasons. Firstly
the TDA7502A can become unstable at high supply voltages, but more importantly to fix the
voltage at the output pins under no signal conditions. With no signal this voltage is half the
supply voltage (+4V), but when audio is fed to the speaker the voltage at pin 5 will swing above
and below the 4V quiescent point. The base of transistor Q9 is DC connected to pin 5 by a
resistor and a trimpot. The trimpot (VR3) is adjusted so that transistor Q9 is just below
conduction when there is no audio. When a signal is received the positive audio peaks at pin 5
will start to turn on Q9 and cause some current to be pulled from pin 4 and lower the gain.
When the audio decreases, Q9 will begin to turn off which raises the voltage on pin 4, and
increases the gain. This action continually attempts to adjust the audio level and provide AGC
action. Capacitor C56 stores the charge in between positive cycles to avoid Q9 turning off during
negative peaks and causing distortion. For such a simple circuit the dynamics are very good and
make a great addition to the receiver.
MST3 Construction and Operation Manual – Issue 1
A
MPLIFIER
Page 11
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