Spi Flash Boot - QMTECH XC7A100T User Manual

2.2.2

SPI Flash Boot

In def ault, the FPGA XC7A100T boots from external SPI Flash, detailed hardware design is shown in below
f igure. The SPI f lash is using MT25QL128 manuf actured by Micron, with 128Mbit memory storage.
The FPGA boot sequence setting M0:M1:M2 is configured as 1:0:0 which indicates FPGA will boot from SPI
Flash af ter power on.
The LED D1 will be turned on af ter the FPGA successfully loading configuration file from SPI Flash during
power on stage. In this case, LED D1 could be used as FPGA loading status indicator.
3V3
U3
1
FPGA_CSO_B
4.7K R3
nCE
2
FPGA_DQ1
SO/SIO1
3
FPGA_DQ2
4.7K R4
SIO2
4
VSS
MT25QL128ABA1ESE
Figure 2-6. SPI Flash
U1A
H11
TMS
TMS_0
H12
TCK
TCK_0
J10
TDO
TDO_0
H10
TDI
TDI_0
W9
M2_0
Y 9
M1_0
AB7
3V3
M0_0
R12
DXP_0
R11
DXN_0
G14
VCCBATT_0
M12
1V8
VCCADC_0
M11
GNDADC_0
XC7A100T-FGG676
Figure 2-7. M0:M1:M2 Hardware Settings
FPGA_DONE
Figure 2-8. FPGA_DONE Status Indicator
QMTECH XC7A 100T Starter Kit
8
VDD
7
FPGA_DQ3
4.7K R2
SIO3
6
FPGA_CCLK
SCK
5
FPGA_DQ0
SI/SIO0
W10
FPGA_DONE
DONE_0
AE16
PROG_B
PROGRAM_B_0
V11
R9 4.7K
3V3
INIT_B_0
H13
FPGA_CCLK
CCLK_0
AB15
3V3
CFGBVS_0
P12
VREFP_0
N11
VREFN_0
N12
VP_0
P11
VN_0
3V3
R1
1K
D1
Red
R5
1K
3V3
User Manual V01