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Aries Embedded M100PF Hardware Manual

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M100PF Hardware Manual
M100PF Hardware Manual
Version:
2.1
Created on:
May 19, 2022
Created by:
Diana Korchmar
© ARIES Embedded GmbH. The information contained in this document is strictly confiden-
tial. This document may not be copied, reproduced, translated, changed or distributed
without the written approval of ARIES Embedded GmbH
Page 1 of 24

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Summary of Contents for Aries Embedded M100PF

  • Page 1 May 19, 2022 Created by: Diana Korchmar © ARIES Embedded GmbH. The information contained in this document is strictly confiden- tial. This document may not be copied, reproduced, translated, changed or distributed without the written approval of ARIES Embedded GmbH...

  • Page 2: Table Of Contents

    M100PF Hardware Manual CONTENTS 1 About this manual 1.1 Imprint ..........
  • Page 3 M100PF Hardware Manual 3.8 Schematics ..........

  • Page 4: About This Manual

    ARIES Embedded. ARIES Embedded explicitly reserves the rights to change or add to the contents of this Preliminary User’s Manual or parts of it without notification.

  • Page 5: Copyright

    1.3 Copyright This document may not be copied, reproduced, translated, changed or distributed, completely or partially in any form without the written approval of ARIES Embedded GmbH. 1.4 Registered Trademarks The contents of this document may be subject of intellectual property rights (including but not limited to copyright, trademark, or patent rights).

  • Page 6: Overview

    OVERVIEW 2.1 M100PF The M100PF is based on the PolarFire FPGA family by Microchip. The SoM targets demanding industrial and medical applications and offers the full flexibility of the populated FPGAs. The populated FPGAs deliver the industry’s lowest power at mid-range densities with exceptional security and reliability. The FPGA SoM for Embedded Applications spans from 100K logic elements (LEs) to 300K LEs, features 12.7G...

  • Page 7: Feature Set

    M100PF Hardware Manual 2.2 Feature Set • Microchip PolarFire FPGA – MPF100T - 109KLE, 336 Math Blocks (18x18MACC) – MPF200T - 192KLE, 588 Math Blocks (18x18MACC) – MPF300T - 300KLE, 924 Math Blocks (18x18MACC) • 512 MiB / 1 GiB / 2 GiB DDR3 RAM •...

  • Page 8: Block Diagram

    M100PF Hardware Manual 2.3 Block Diagram Chapter 2. Overview Page 8 of 24...

  • Page 9: Dimensions

    M100PF Hardware Manual 2.4 Dimensions Chapter 2. Overview Page 9 of 24...

  • Page 10: Part Overview

    M100PF Hardware Manual 2.5 Part Overview Connector Location: Chapter 2. Overview Page 10 of 24...

  • Page 11: Handling Recommendations

    The populated Samtec connectors require certain mechanical force to insert the SoM into its mating base- board con- nectors. To avoid mechanical damage to the components populated on M100PF it is strongly recommended not to apply mechanical force on the Ball Grid Array (BGA) components. The BGA compo- nents are marked as shaded in the figure below: Chapter 2.

  • Page 12: Resources

    M100PF Hardware Manual CHAPTER THREE RESOURCES 3.1 Components 3.1.1 FPGA The Polarfire FPGA on the M100PF comes in the FCG484 (23x23, 1.0 mm) package and up provides to 244 User I/O (96 HSIO, 148 GPIO) and 8 XCVRs. Features MPF100T MPF200T MPF300T...
  • Page 13 M100PF Hardware Manual Function FPGA Pin Function FPGA Pin DDR3_A0 DDR3_A1 DDR3_A2 DDR3_A3 DDR3_A4 DDR3_A5 AA16 DDR3_A6 DDR3_A7 DDR3_A8 DDR3_A9 DDR3_A10 AB12 DDR3_A11 AA12 DDR3_A12 AB13 DDR3_A13 AA13 DDR3_A14 DDR3_A15 DDR3_DQ0 DDR3_DQ1 DDR3_DQ2 DDR3_DQ3 DDR3_DQ4 DDR3_DQ5 DDR3_DQ6 DDR3_DQ7 DDR3_DQ8 DDR3_DQ9...

  • Page 14: E.mmc Flash

    M100PF Hardware Manual 3.1.3 e.MMC Flash M100PF features up to 64 GB of eMMC Flash using Micron MTFC4GACAANA-4M IT. Function FPGA Pin RSTN DAT0 DAT1 DAT2 DAT3 DAT4 DAT5 DAT6 DAT7 3.1.4 SPI NOR Flash MT25QU01GBBB8E12 SPI NOR Flash provides 128 MiB of non-volatile storage. On power-up the SPI NOR is connected to the FPGA, allowing the FPGA to load one of multiple configuration images stored on the SPI Flash.

  • Page 15: Pic Microcontroller

    The RTCC is connected to I2C using address 0x6F, the EEPROM uses address 0x57. Function FPGA Pin Description RTC_MFP RTC multi function pin 3.1.9 SERDES M100PF provides 8 SERDES lanes each with up to 12.7 Gbps datarate. Function FPGA Pin Connector Function FPGA Pin Connector...

  • Page 16: Spi Configuration And Programming

    If the FPGA is configured as SPI slave, then its data directions are swapped. 3.3 Clocking The clocking scheme on the M100PF is generated by an IDT 5P49V6965 Clock Generator (PLL). Its base is sourced from a 25 MHz oscillator to generate the required clocks for the board’s components. The IDT 5P49V6965 is accessible from FPGA on the I2C 1 bus at address 0xD4 for reconfiguration.
  • Page 17 M100PF Hardware Manual I2C 1 Device Description dress 0xD4 5P49V6965 Clock Generator Allows reconfiguration of the clocks present on M100PF 0x57 MCP794xx EEPROM of the RTCC 0x6F MCP794xx Real Time Clock Calendar Master Polarfire FPGA Connected to FPGA Pins J4 (SCL) and H4 (SDA)

  • Page 18: Jtag

    M100PF Hardware Manual 3.5 JTAG The M100PFEVP Baseboard provides a JTAG header for the FlashPro programmer to programm the FPGA using Microchip’s standard tools. The PCAL6408ABS IO-Expander is connected to Test-Reset via bit 0x10. Function FPGA Pin Connector 6 (J1 A)

  • Page 19: Ethernet

    M100PF Hardware Manual 3.7.2 Ethernet Function FPGA Pin Connector Function FPGA Pin Connector ETH0_MDIO 115 (J2 B) ETH1_MDIO 164 (J1 C) ETH0_MDC 112 (J2 B) ETH1_MDC 161 (J1 C) ETH0_GTXCLK 113 (J2 B) ETH1_GTXCLK 159 (J1 C) ETH0_TX_EN 114 (J2 B)

  • Page 20: Gpio

    M100PF Hardware Manual 3.7.4 GPIO The following pins are available for GPIO: FPGA Connector FPGA Connector FPGA Connector FPGA Connector 30 (J1 A) 149 (J2 C) 147 (J2 C) 80 (J2 B) 54 (J1 A) 153 (J2 C) 131 (J2 C)

  • Page 21: Samtec Connector

    M100PF Hardware Manual 3.7.5 Samtec Connector M100PF uses two Samtec QSH-090-01-F-D-A connectors to supply its signals to a baseboard. Below are tables with the pins of the connectors and their corresponding function. 3.7.6 Connector J1 Connector J1 A Function Function...
  • Page 22 M100PF Hardware Manual Connector J1 B Function Function Function Function GPIO_G2 GPIO_H2 GPIO_J2 GPIO_L2 GPIO_M2 GPIO_H1 UART1_TX GPIO_J1 UART1_RX GPIO_K1 ETH1_RXC GPIO_F1 GPIO_T5 GPIO_R3 GPIO_T1 GPIO_R1 Ground Plate Ground Plate Ground Plate Ground Plate Connector J1 C Function Function Function...

  • Page 23: Connector J2

    M100PF Hardware Manual 3.7.7 Connector J2 Connector J2 A Function Function Function Function XCVR0_REF_CLK_P 4 XCVR1_REF_CLK_P 33 RX2_P RX6_P XCVR0_REF_CLK_N 6 XCVR1_REF_CLK_N 35 RX2_N RX6_N RX0_P RX4_P TX2_P TX6_P RX0_N RX4_N TX2_N TX6_N TX0_P TX4_P RX3_P RX7_P TX0_N TX4_N RX3_N...

  • Page 24: Contents

    GPIO_E13 GPIO_J3 CLK25_3 GPIO_D13 GPIO_E10 3.3V 3.3V GPIO_F12 3.3V 3.3V GPIO_D11 GPIO_K3 3.3V 3.3V Ground Plate Ground Plate Ground Plate Ground Plate 3.8 Schematics Schematics for the M100PF may be obtained on request. Chapter 3. Resources Page 24 of 24...

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