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Summary of Contents for hilscher NXHX 51-ETM
- Page 1 Device Description NXHX 51ETM Development Board Hilscher Gesellschaft für Systemautomation mbH www.hilscher.com DOC120606HW06EN | Revision 6 | English | 201501 | Released | Public...
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Page 2: Table Of Contents
2.4.10 Power supply +24 V (X100)................ 31 LEDs.......................... 32 Using external debuggers ..................... 33 Accessories .......................... 35 Devices for host interface .................... 35 4.1.1 Overview...................... 35 4.1.2 I/O Device at host interface (NXHXIO)............ 35 4.1.3 SDRAM device at host interface (NXHXSDR) .......... 37 4.1.4 PHY and serial DualPort Memory device at host interface (NXHXPHY) .. 39 4.1.5 PHY and SDR memory device at host interface (NXHXPHYSDR) .... 41 4.1.6 SDR memory and SPI device at host interface (NXHXSDRSPI) .... 43 4.1.7 Parallel DualPort Memory at host interface............ 45 4.1.8 Using NXHX 6RE or NXHX 52RE as Extension Bus at host interface .. 46 4.1.9 Accessory cables and connectors for host interface ........ 46 Fieldbus and serial adapters/interfaces................ 47 4.2.1 NXHXDP ...................... 48 NXHX 51ETM | Development Board © Hilscher 2012 – 2015 DOC120606HW06EN | Revision 6 | English | 201501 | Released | Public... - Page 3 NXHXSDRAM .................... 59 5.1.8 NXHXPHY ...................... 60 5.1.9 NXHXPHYSDR .................... 61 5.1.10 NXHXSDRSPI .................... 62 Bill of materials ....................... 63 5.2.1 NXHX 51ETM.................... 63 5.2.2 NXHXIO...................... 64 5.2.3 NXHXSDR...................... 65 5.2.4 NXHXPHY ...................... 65 5.2.5 NXHXPHYSDR .................... 66 5.2.6 NXHXSDRSPI .................... 66 Matrix label ........................ 67 Technical data NXHX 51ETM .................... 68 List of figures .......................... 69 List of tables ........................... 70 Contacts .......................... 72 NXHX 51ETM | Development Board © Hilscher 2012 – 2015 DOC120606HW06EN | Revision 6 | English | 201501 | Released | Public...
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Page 4: Introduction
20120903 Created 20130321 Structure of document revised. Description of boot strap options (S1) in section Configuration boot strap options switch (S1) [} page 12] revised. Tables with pin assignments for DPM and SDRAM Modes, Extension Bus Modes, MII Mode in section Host interface (X3) [} page 19] added. Graphics in section Fieldbus and serial adapters/interfaces [} page 47] added. 20130708 Section Accessory cables and connectors for host interface [ } page 46] added. 20130716 Description of Configuration of Boot Strap Options – Switch (S1) in section Configuration boot strap options switch (S1) [ } page 12] revised. Section Devices for host interface [} page 35] revised (formerly section Host Interfaces). 20131028 Description of the Host Mode Configuration Switch (S2) in section Configuration host mode switch (S2) [} page 15] updated for hardware revision 4. Schematics in section Schematics [} page 52] updated for hardware revision 4. 20150127 Chapter Legal notes [} page 6] added. Description of NXHXSDRSPI device added. Section Host interface (X3) [} page 19] updated. Description of NXHXPHY device in section PHY and serial DualPort Memory device at host interface (NXHXPHY) [} page 39] updated according to hardware revision 2 of NXHXPHY device. Depiction of settings for NXHXPHY Board in section Host interface configuration jumper (X10) [} page 16] corrected. Table 1: List of revisions NXHX 51ETM | Development Board © Hilscher 2012 – 2015 DOC120606HW06EN | Revision 6 | English | 201501 | Released | Public... -
Page 5: Conventions In This Document
Introduction 5/72 1.1.3 Conventions in this document # means active low signal. Notes are marked as follows: Notes Important: <Important note> Note: <Simple note> <Note, where to find further information> Reference to positions in figures Whenever position numbers like (1), (2) or (3) occur within a text paragraph, they usually refer to positions in the figure next to the paragraph on the same page. If they refer to a figure on a different page, a cross reference to that figure is given. 1.1.4 Reference to hardware Hardware Revision Part number NXHX51ETM 7763. 200 Table 2: Reference to hardware NXHX 51ETM | Development Board © Hilscher 2012 – 2015 DOC120606HW06EN | Revision 6 | English | 201501 | Released | Public... -
Page 6: Other Relevant Documentation
NXHX 51 ETM Development Board. Migration Guide netX 50 to Describes the differences between Migration_netX50_to_netX5152_MG03EN.pdf netX 51/52 the netX 50 and netX 51/52. Programming Reference Describes all available registers of netX 51 52 Programming Reference Guide PRG Guide netX 51/52 the netX 51. xx EN.pdf User Manual NXPCAPCI Describes the coupling of the User Manual NXPCAPCI_Rev_2_EN.pdf parallel dualport memory with a PC. Table 3: Additional documentation Legal notes 1.3.1 Copyright © Hilscher 2012 − 2015, Hilscher Gesellschaft für Systemautomation mbH All rights reserved. The images, photographs and texts in the accompanying material (user manual, accompanying texts, documentation, etc.) are protected by German and international copyright law as well as international trade and protection provisions. You are not authorized to duplicate these in whole or in part using technical or mechanical methods (printing, photocopying or other methods), to manipulate or transfer using electronic systems without prior written consent. You are not permitted to make changes to copyright notices, markings, trademarks or ownership declarations. The included diagrams do not take the patent situation into account. The company names and product descriptions included in this document may be trademarks or brands of the respective owners and may be trademarked or patented. Any form of further use requires the explicit consent of the respective rights owner. 1.3.2 Important notes The user manual, accompanying texts and the documentation were created for the use of the products by qualified experts, however, errors cannot be ruled out. For this reason, no guarantee can be given and neither legal responsibility for erroneous information nor any liability can be assumed. -
Page 7: Exclusion Of Liability
Introduction 7/72 Changes will be included in future manuals and do not constitute any obligations. There is no entitlement to revisions of delivered documents. The manual delivered with the product applies. Hilscher Gesellschaft für Systemautomation mbH is not liable under any circumstances for direct, indirect, incidental or followon damage or loss of earnings resulting from the use of the information contained in this publication. 1.3.3 Exclusion of liability The software was produced and tested with utmost care by Hilscher Gesellschaft für Systemautomation mbH and is made available as is. No warranty can be assumed for the performance and flawlessness of the software for all usage conditions and cases and for the results produced when utilized by the user. Liability for any damage that may result from the use of the hardware or software or related documents, is limited to cases of intent or grossly negligent violation of significant contractual obligations. Indemnity claims for the violation of significant contractual obligations are limited to damage that are foreseeable and typical for this type of contract. It is strictly prohibited to use the software in the following areas: for military purposes or in weapon systems; · for the design, construction, maintenance or operation of nuclear · facilities; in air traffic control systems, air traffic or air traffic communication · systems; in life support systems; · in systems in which failures in the software could lead to personal injury · or injuries leading to death. We inform you that the software was not developed for use in dangerous environments requiring failproof control mechanisms. Use of the software in such an environment occurs at your own risk. No liability is assumed for damage or losses due to unauthorized use. 1.3.4 Warranty Although the hardware and software was developed with utmost care and... -
Page 8: Export Regulations
Introduction 8/72 1.3.5 Export regulations The delivered product (including the technical data) is subject to export or import laws as well as the associated regulations of different counters, in particular those of Germany and the USA. The software may not be exported to countries where this is prohibited by the United States Export Administration Act and its additional provisions. You are obligated to comply with the regulations at your personal responsibility. We wish to inform you that you may require permission from state authorities to export, reexport or import the product. NXHX 51ETM | Development Board © Hilscher 2012 – 2015 DOC120606HW06EN | Revision 6 | English | 201501 | Released | Public... -
Page 9: Descriptions And Drawings
Descriptions and drawings 9/72 2 Descriptions and drawings Description of the NXHX 51ETM The NXHX 51ETM is a development board for the netX 51 controller. It is equipped with an netX 51 and features: · Host interface, usable in different interface modes: 8/16/32 bit parallel dualport memory, 16 bit TI multiplexed parallel dualport memory, serial dualport memory (SPI Slave), MII and PIO · 2port RJ45 RealTime Ethernet interface DIP switch to configure boot mode and host interface mode · Power supply and diagnostic via USB interface · MMIO signals and I2C interface · ETM interface for debugging · System status and communication status LEDs · Quad SPI flash for Fast StartUp feature of PROFINET IO Device · microSD Card slot · 3 interfaces for additional Fieldbus and RS232 modules · · HiTOP USB debugging interface NXHX 51ETM | Development Board © Hilscher 2012 – 2015 DOC120606HW06EN | Revision 6 | English | 201501 | Released | Public... -
Page 10: Drawings
Descriptions and drawings 10/72 Drawings 2.2.1 Block diagram Figure 1: NXHX51ETM block diagram NXHX 51ETM | Development Board © Hilscher 2012 – 2015 DOC120606HW06EN | Revision 6 | English | 201501 | Released | Public... -
Page 11: Printed Circuit Board
ETM connector (X9) [} page 30] UART0 interface Serial connector (X7 10pin) [} page 29] SW30 4 pol. DIL switch as general input MMIO general input switch (S30) [} page 15] LED yellow, MMIO27 as general output LEDs [} page 32] (10) LED yellow, MMIO26 as general output (11) LED yellow, MMIO25 as general output (12) LED yellow, MMIO24 as general output (13) microSD Card connector microSD card reader (X4) [} page 27] (14) USB connector Typ B, HiTOP USB connector HITOP (X8) [} page 29] (15) X100 24 V power connector for board Power supply +24 V (X100) [} page 31] (16) 2 x RJ45 connector 2*RJ45 RTEthernet (X50) [} page 31] (17) Matrix label Matrix label [} page 67] (18) System status LED (yellow / green) LEDs [} page 32] (19) Power on reset Reset [} page 12] NXHX 51ETM | Development Board © Hilscher 2012 – 2015 DOC120606HW06EN | Revision 6 | English | 201501 | Released | Public... -
Page 12: Operating Elements
Position (19) in section Printed circuit board [} page 11]. 2.3.2 Switches 2.3.2.1 Configuration boot strap options switch (S1) Boot strap options. SW Signal Connect to Functions RDY# with 390 Ω to GND Boot mode RUN# with 390 Ω to GND SPI_MOSI with 1.5 kΩ to +3.3 V Host interface mode SPI_CLK with 1.5 kΩ to +3.3 V SPI_MISO with 1.5 kΩ to +3.3 V RUN# SDA of Security Access to Security Memory Memory ON = Enable OFF = Disable Note that the Security Memory will only be accessed if SW 1 and SW 2 (RDY# and RUN#) are set to OFF ! Table 6: Boot strap options configuration switch S1 Position (5) in section Printed circuit board [} page 11]. The boot mode and the host interface mode are evaluated by the ROM loader during boot. NXHX 51ETM | Development Board © Hilscher 2012 – 2015 DOC120606HW06EN | Revision 6 | English | 201501 | Released | Public... -
Page 13: Table 7: Boot Mode Settings
Boot mode If S1.6 is ON and S1.1 and S1.2 are both set to OFF, the boot mode is read from the security memory. The boot mode defined in the security memory is the FLASH boot mode (see No. 4 in the table below). If S1.6 is set to OFF or one or both of the S1.1 and S1.2 switches are set to ON, the security memory will not be accessed. In this case, the boot mode is determined by S1.1 and S1.2 as described in the following table: Selection S1.1 S1.2 Boot sequence FLASH/Ethernet boot mode 1. Boot from serial FLASH using Quad SPI and XIP (CS0), if bootloader code is found. 2. Boot from SD card, if bootloader code is found. 3. Boot from Ethernet CH_A with DHCP and TFTP, if bootloader code is found. Serial – UART0 and USB boot mode Boot from serial interface: UART0 or USB. FLASH/DualPort Memory boot mode 1. Boot from serial FLASH using Quad SPI and XIP (CS0), if bootloader code is found. 2. Boot from SD card, if bootloader code is found. 3. Boot from dualport memory. Select the host interface mode with S1.3, S1.4 and S1.5 (as described in Table 8). FLASH boot mode 1. Boot from serial FLASH using Quad SPI and XIP (CS0), if bootloader code is found. 2. Boot from SD card, if bootloader code is found. Table 7: Boot mode settings Note: If you use boot mode 1, 2 or 4, set host interface mode to “Ignore host interface during boot” (see following table). NXHX 51ETM | Development Board © Hilscher 2012 – 2015 DOC120606HW06EN | Revision 6 | English | 201501 | Released | Public... -
Page 14: Table 8: Host Interface Mode At X3 (Settings)
SDRAM 32 bit data / 4 MB 1, 3, 4 Use this setting, when using the module NXHX SDR. SDRAM is used as destination device. Host CPU supported: Host CPU boots netX via DualPort Memory: Serial dualport memory (SPM) mode The dualport memory is used Use this setting, if you have connected a serial for booting netX. The netX waits dualport memory at the host interface and netX for the Host CPU, which has to has to boot from it. The serial dualport memory transfer the bootable image is used as source device. (e. g. Second Stage Bootloader). Therefore the Host Parallel dualport memory (DPM) 8 bit data / CPU has to use the mailboxes 2 KB of netX for transferring the boot Use this setting, if you have connected a code. parallel dualport memory at the host interface and netX has to boot from it. The parallel dual port memory is used as source device. Parallel dualport memory (DPM) 8 bit data / 64 Kbyte Use this setting, if you have connected a parallel dualport memory at the host interface and netX has to boot from it. The parallel dual port memory is used as source device. Reserved: Do not use this setting! Table 8: Host interface mode at X3 (settings) NXHX 51ETM | Development Board © Hilscher 2012 – 2015 DOC120606HW06EN | Revision 6 | English | 201501 | Released | Public... -
Page 15: Table 9: Configuration Switch S2, Host Mode (Valid For Hardware Revisions 1 - 3)
Hardware revisions 1 – 3: Function Serial DualPort Memory Mode (SPI Slave Mode 3) Parallel DualPort Memory Mode 16 bit mode Parallel DualPort Memory Mode 8 bit mode Table 9: Configuration Switch S2, host mode (valid for hardware revisions 1 – 3) Since hardware revision 4: Function Serial DualPort Memory Mode (SPI Slave Mode 3) Parallel DualPort Memory Mode 8 bit mode Parallel DualPort Memory Mode 16 bit mode Table 10: Configuration Switch S2, host mode (valid since hardware revision 4) Position (22) in section Printed circuit board [} page 11]. 2.3.2.3 MMIO general input switch (S30) These four signals can be used by the user software. Signal Connected to Description MMIO36 with 1.5 kΩ to +3.3 V ON = Pullup connected MMIO37 with 1.5 kΩ to +3.3 V OFF = No Pullup connected MMIO38 with 1.5 kΩ to +3.3 V MMIO39 with 1.5 kΩ to +3.3 V Table 11: DILSwitch S30 Position (8) in section Printed circuit board [} page 11]. NXHX 51ETM | Development Board © Hilscher 2012 – 2015 DOC120606HW06EN | Revision 6 | English | 201501 | Released | Public... -
Page 16: Host Interface Configuration Jumper (X10)
16/72 2.3.3 Host interface configuration jumper (X10) These jumpers configure a few signals at the host interface according to the connected extension modules and DPM modes. Description MMIO02 (netX 51) MMIO05 (netX 51) DPM_SIRQ# (X3 pin 4) DPM_DIRQ# (X3 pin 11) DPM_SIRQ# (netX 51) DPM_DIRQ#/PI047 (netX 51) RSTIN# (X3 pin 7) DPM_A16 (netx 51) RSTIN# (X3 pin 7) RSTIN# (netx 51) Table 12: Pin assignment X10 Position (23) in section Printed circuit board [} page 11]. Use the following setting if dualport memory is connected: X10 DPM Description DPM_DIRQ# signal is connected to X3 pin 11 DPM_SIRQ# signal is connected to X3 pin 4 RSTIN# signal is connected to X3 pin 7 Table 13: X10 – Setting for DualPort Memory at host interface X3 Use the following setting if Extension bus is connected: X10 EXT Description If NXHX 6RE or NXHX 52RE Board is connected to the host interface and used as extension bus! MMIO02 signal is connected to X3 pin 4 (configure MMIO02 as interrupt input for DPM_SIRQ#) MMIO05 signal is connected to X3 pin 11 (configure MMIO05 as interrupt input for DPM_DIRQ#) DPM_A16 signal is connected to X3 pin 7 (256 KB address range at HIF) Table 14: X10 Setting for Extension Bus at host interface X3 NXHX 51ETM | Development Board © Hilscher 2012 – 2015 DOC120606HW06EN | Revision 6 | English | 201501 | Released | Public... -
Page 17: Table 15: X10 Setting For Nxhxio Board At Host Interface X3
Descriptions and drawings 17/72 Use the following setting if the NXHXIO Board is connected: X10 DPM Description DPM_DIRQ#/PIO 47 is connected to X3 pin 11 Table 15: X10 Setting for NXHXIO Board at host interface X3 Use the following setting if the NXHXSDR Board is connected: X10 SDRAM Description SDRAM_CLK is connected to X3 pin 4 SDRAM RAS# is connected to X3 pin 7 Table 16: X10 Setting for NXHXSDR Board at host interface X3 Use the following setting if the NXHXPHY Board is connected: X10 PHY Description DPM_DIRQ# is connected to X3 pin 11 DPM_SIRQ# is connected to X3 pin 4 Table 17: X10 Setting for NXHXPHY Board at host interface X3 NXHX 51ETM | Development Board © Hilscher 2012 – 2015 DOC120606HW06EN | Revision 6 | English | 201501 | Released | Public... -
Page 18: Table 18: X10 Setting For Nxhxphysdr Board At Host Interface X3
Descriptions and drawings 18/72 Use the following setting if the NXHXPHYSDR Board is connected: X10 PHYSDR Description SDRAM_CLK is connected to X3 pin 4 MII_RXD0 to X3 pin 11 SDRAM RAS# is connected to X3 pin 7 Table 18: X10 Setting for NXHXPHYSDR Board at host interface X3 Use the following setting if the NXHXSDRSPI Board is connected: X10 SDRSPI Description SDRAM_CLK is connected to X3 pin 4 DPM_DIRQ#/PIO 47 is connected to X3 pin 11 SDRAM RAS# is connected to X3 pin 7 Table 19: X10 Setting for NXHXSDRSPI Board at host interface X3 NXHX 51ETM | Development Board © Hilscher 2012 – 2015 DOC120606HW06EN | Revision 6 | English | 201501 | Released | Public... -
Page 19: Interfaces
DPM_BE1n PIO84 DPM_D30 PIO79 DPM_D28 PIO80 DPM_D29 PIO51 DPM_CSn DPM_CSn DPM_CSn PIO72 DPM_D27 PIO71 DPM_D26 PIO68 DPM_D25 PIO67 DPM_D24 PIO63 DPM_D23 PIO62 DPM_D22 PIO59 DPM_D21 PIO55 DPM_A15 DPM_A15 PIO54 DPM_A14 DPM_A14 PIO48 DPM_A13 DPM_A13 PIO49 DPM_A12 DPM_A12 NXHX 51ETM | Development Board © Hilscher 2012 – 2015 DOC120606HW06EN | Revision 6 | English | 201501 | Released | Public... -
Page 20: Table 20: Pin Assignment X3 Host Interface Dpm Modes
DPM_AD8 PIO74 DPM_D7 DPM_D7 DPM_AD7 PIO75 DPM_D6 DPM_D6 DPM_AD6 PIO76 DPM_D5 DPM_D5 DPM_AD5 PIO77 DPM_D4 DPM_D4 DPM_AD4 PIO78 DPM_D3 DPM_D3 DPM_AD3 PIO81 DPM_D2 DPM_D2 DPM_AD2 PIO82 DPM_D1 DPM_D1 DPM_AD1 PIO83 DPM_D0 DPM_D0 DPM_AD0 +3V3 PIO58 DPM_D20 Table 20: Pin assignment X3 host interface DPM modes NXHX 51ETM | Development Board © Hilscher 2012 – 2015 DOC120606HW06EN | Revision 6 | English | 201501 | Released | Public... - Page 21 EXT_D8 MMIO05 or EXT_CS1n EXT_INTn EXT_BUSYn EXT_RDn EXT_BE3n EXT_CS3n EXT_A24 EXT_WRn EXT_D11 EXT_D9 EXT_BE1n EXT_BHEn EXT_D14 EXT_D28 EXT_CS2n EXT_D29 EXT_CS1n EXT_CS0n EXT_CS0n EXT_D13 EXT_D12 EXT_D25 EXT_A21 EXT_D24 EXT_A20 EXT_D23 EXT_A19 EXT_D22 EXT_A18 EXT_D21 EXT_A17 EXT_A15 EXT_A14 EXT_A13 EXT_A12 NXHX 51ETM | Development Board © Hilscher 2012 – 2015 DOC120606HW06EN | Revision 6 | English | 201501 | Released | Public...
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Page 22: Table 21: Pin Assignment X3 Host Interface Extension Bus Modes
MMIO EXT_D19 extendible SPM_CLK MMIO43 by SPM or MMIO EXT_D18 extendible SPM_CSn MMIO42 by SPM or MMIO EXT_D17 extendible SPM_MOSI MMIO41 by SPM or MMIO EXT_D16 extendible SPM_MISO MMIO40 by SPM or MMIO EXT_D7 EXT_D6 EXT_D5 EXT_D4 EXT_D3 EXT_D2 EXT_D1 EXT_D0 +3V3 EXT_D20 EXT_A16 Table 21: Pin assignment X3 host interface Extension Bus modes NXHX 51ETM | Development Board © Hilscher 2012 – 2015 DOC120606HW06EN | Revision 6 | English | 201501 | Released | Public... - Page 23 Descriptions and drawings 23/72 2.4.1.3 MII Mode Signal Host interface modes MII Mode, extendible MMIO Extension Extension +3V3 DPM_SIRQ# RSTOUTn RSTIN# MMIO05 MII_RXCLK MII_RXER MII_TXDCLK MII_TXDEN NXHX 51ETM | Development Board © Hilscher 2012 – 2015 DOC120606HW06EN | Revision 6 | English | 201501 | Released | Public...
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Page 24: Table 22: Pin Assignment X3 Host Interface Mii Mode
MII_RXD1 MII_RXD0 MII_CRS MII_COL MII_TXER MII_MDC MMIO47 (MMIO47) MII_MDIO MMIO46 (MMIO46) extendible by SPM or SPM_SIRQ MMIO45 MMIO extendible by SPM or SPM_DIRQ MMIO44 MMIO extendible by SPM or SPM_CLK MMIO43 MMIO extendible by SPM or SPM_CSn MMIO42 MMIO extendible by SPM or SPM_MOSI MMIO41 MMIO extendible by SPM or SPM_MISO MMIO40 MMIO +3V3 Table 22: Pin assignment X3 host interface MII Mode NXHX 51ETM | Development Board © Hilscher 2012 – 2015 DOC120606HW06EN | Revision 6 | English | 201501 | Released | Public... - Page 25 MII_RXER SD_CSn SD_CSn SD_D13 SD_D13 SD_D12 SD_D12 SD_D25 MII_TXEN SD_D24 MII_TXD3 SD_D23 MII_TXD2 SD_D22 MII_TXD1 SD_D21 MII_TXD0 SD_BA1 SD_BA1 SD_BA0 SD_BA0 SD_DQM0n SD_DQM0n SD_A12 SD_A12 NXHX 51ETM | Development Board © Hilscher 2012 – 2015 DOC120606HW06EN | Revision 6 | English | 201501 | Released | Public...
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Page 26: Table 23: Pin Assignment X3 Host Interface Sdram Modes
SPM_CSn MII_TXER SD_D17 SPM_MOSI MII_CRS SD_D16 SPM_MISO MII_COL SD_D7 SD_D7 SD_D6 SD_D6 SD_D5 SD_D5 SD_D4 SD_D4 SD_D3 SD_D3 SD_D2 SD_D2 SD_D1 SD_D1 SD_D0 SD_D0 +3V3 SD_D20 MII_TXCLK Table 23: Pin assignment X3 host interface SDRAM modes NXHX 51ETM | Development Board © Hilscher 2012 – 2015 DOC120606HW06EN | Revision 6 | English | 201501 | Released | Public... -
Page 27: Minib Usb Connector (X2)
Descriptions and drawings 27/72 2.4.2 MiniB USB connector (X2) Diagnostic interface X2 for netX 51. USB socket Signal Description USB_EXT Power supply USB Bus (+5 V, from externally) D Data Data + Ground Table 24: Pin assignment MiniB USB connector Position (20) in section Printed circuit board [} page 11]. 2.4.3 microSD card reader (X4) netX51 Signal Description Use only micro SD cards, no SDHC and no SDXC cards. SPI_CS1# Required format: FAT SPI_MOSI Size: max. 2 GByte +3V3 File names: 8.3 file format SPI_CLK convention SPI_MISO Table 25: Pin assignment X4 SD / MMC Card Reader Position (13) in section Printed circuit board [} page 11]. NXHX 51ETM | Development Board © Hilscher 2012 – 2015 DOC120606HW06EN | Revision 6 | English | 201501 | Released | Public... -
Page 28: Fieldbus Connector (X5 10Pin)
XM0_Rx MMIO03 XM0_IO0 MMIO02 XM0_IO1 +3V3 MMIO28 PIO0 / V30 green MMIO29 PIO1 / V30 red RSTOUT# Table 26: Pin assignment X5 Position (1) in section Printed circuit board [} page 11]. 2.4.5 Fieldbus connector (X6 10pin) Plug connector for additional fieldbus interface adapter, see also section Fieldbus and Serial Adapters/Interfaces [} page 47]. netX51 Signal Description MMIO04 XM1_Tx MMIO06 XM1_Rx MMIO07 XM1_IO0 MMIO05 XM1_IO1 +3V3 MMIO30 PIO0 / V31 green MMIO31 PIO1 / V31 red RSTOUT# Table 27: Pin assignment X6 Position (2) in section Printed circuit board [} page 11]. NXHX 51ETM | Development Board © Hilscher 2012 – 2015 DOC120606HW06EN | Revision 6 | English | 201501 | Released | Public... -
Page 29: Serial Connector (X7 10Pin)
Descriptions and drawings 29/72 2.4.6 Serial connector (X7 10pin) Plug connector for additional serial NXHXRS adapter, see also section Fieldbus and Serial Adapters/Interfaces [} page 47]. netX51 Signal Description MMIO35 TxD0 MMIO34 RxD0, 10kΩ pull up MMIO33 RTS0 MMIO32 CTS0 +3V3 MMIO36 S30.1 MMIO37 S30.2 MMIO24 V12 yellow MMIO25 V13 yellow Table 28: Pin assignment X7 Position (7) in Figure 2: NXHX51ETM Printed Circuit Board. 2.4.7 USB connector HITOP (X8) Debug interface to netX 51, USB plug connector Type B. Signal U USB USBDM USBDP Table 29: Pin assignment X8 USB Type B Position (14) in section Printed circuit board [} page 11]. NXHX 51ETM | Development Board © Hilscher 2012 – 2015 DOC120606HW06EN | Revision 6 | English | 201501 | Released | Public... -
Page 30: Etm Connector (X9)
POR# JT_TDO +3V3 +3V3 JT_TCK ETM_TPKT7 JT_TMS ETM_TPKT6 JT_TDI ETM_TPKT5 JT_TRSTN ETM_TPKT4 ETM_TPKT15 ETM_TPKT3 ETM_TPKT14 ETM_TPKT2 ETM_TPKT13 ETM_TPKT1 ETM_TPKT12 ETM_TPKT0 ETM_TPKT11 ETM_TSYNC ETM_TPKT10 ETM_PSTAT2 ETM_TPKT9 ETM_PSTAT1 ETM_TPKT8 ETM_PSTAT0 Ground Ground Ground Ground Ground Table 30: Pin assignment X9 ETM connector Position (6) in section Printed circuit board [} page 11]. NXHX 51ETM | Development Board © Hilscher 2012 – 2015 DOC120606HW06EN | Revision 6 | English | 201501 | Released | Public... -
Page 31: Rj45 Rtethernet (X50)
Descriptions and drawings 31/72 2.4.9 2*RJ45 RTEthernet (X50) Ethernet Signal Description Transmit data positive TX– Transmit data negative Receive data positive Term 1 Connected and terminated to PE via RC combination* Term 1 RX– Receive data negative Term 2 Connected and terminated to PE via RC combination* Term 2 * Bob Smith Termination Table 31: Ethernet RJ45 pin assignment PE is to be contacted directly at the metal casing! Position (16) in section Printed circuit board [} page 11]. 2.4.10 Power supply +24 V (X100) The NXHX51ETM development board has to be supplied with DC. VIN is from 18 V to 30 V. The typical supply voltage is 24 V. Power consumption is approx. 2.6 W. Socket Number Description 24 V ± 6 V DC GND Ground Table 32: Pin assignment power supply socket Position (15) in section Printed circuit board [} page 11]. NXHX 51ETM | Development Board © Hilscher 2012 – 2015 DOC120606HW06EN | Revision 6 | English | 201501 | Released | Public... -
Page 32: Leds
General output MMIO26 V14 (yellow) (yellow) General output MMIO27 V15 (yellow) (yellow) Table 33: LEDs on the NXHX 51ETM The meaning of the COM LEDs (V30 and V31) depends on the communication protocol used on the NXHX 51ETM board. LED SYS (V1) The subsequent table describes the meaning of the system LED. Color State Meaning Duo LED yellow/green Operating System running (green) Blinking Second stage bootloader is waiting for firmware green / (green / yellow yellow) Static Bootloader netX (= romloader) is waiting for second stage bootloader (yellow) Power supply for the device is missing or hardware (off) defect. Table 34: System Status LED Position (18) in section Printed circuit board [} page 11]. NXHX 51ETM | Development Board © Hilscher 2012 – 2015 DOC120606HW06EN | Revision 6 | English | 201501 | Released | Public... -
Page 33: Using External Debuggers
Using external debuggers 33/72 3 Using external debuggers Instead of using the onboard debugger of the NXHX 51ETM along with the HiTOP software, an external debugger with either ETM or JTAG interface can be connected to the NXHX 51ETM. If an ETM debugger is used, simply connect the debugger to the ETM connector (X9) of the NXHX 51 ETM. If a JTAG debugger is used, connect the ETMtoJTAG adapter (NXACJTAGETM) that came with your NXHX 51ETM board to the ETM connector and then connect your JTAG debugger to the 20 pin shrouded header as shown below. Hardware damage! Only one debugger, either the onboard unit or an external debugger may be active at a time, otherwise the debugger signals may drive against each other, which may result in damage of the onboard debugger and / or the external debugger. Figure 3: NXHX 51ETM with JTAGETM Adapter NXHX 51ETM | Development Board © Hilscher 2012 – 2015 DOC120606HW06EN | Revision 6 | English | 201501 | Released | Public... - Page 34 Using external debuggers 34/72 Important: When using an external debugger, the USB port for the Development PC (X8) must not be connected! Further, any adapter board (e.g. RS232) must be removed from X7. When using the onboard debugger, an external debugger must not be connected to the ETM connector (X9)! NXHX 51ETM | Development Board © Hilscher 2012 – 2015 DOC120606HW06EN | Revision 6 | English | 201501 | Released | Public...
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Page 35: Accessories
Accessories 35/72 4 Accessories Devices for host interface 4.1.1 Overview The following devices can be mounted on X3: NXHXIO NXHXSDR NXHXPHY NXHXPHYSDR NXHXSDRSPI NXPCAPCI NXHX 6RE NXHX 52RE Table 35: NXHX 51ETM with possible devices for the host interface 4.1.2 I/O Device at host interface (NXHXIO) NXHXIO offers 16 digital inputs signals (DIL switch) and 16 digital outputs signals (LED) and can be connected at the host interface. Figure 4: NXHXIO printed circuit board NXHX 51ETM | Development Board © Hilscher 2012 – 2015 DOC120606HW06EN | Revision 6 | English | 201501 | Released | Public... -
Page 36: Table 36: Technical Data Nxhxio Device
S2.9 (PIO41) S1.5 (PIO35) S2.6 (PIO42) S2.5 (PIO43) S1.3 (PIO37) S1.2 (PIO38) S1.1 (PIO39) LED 15 (PIO79) S1.7 (PIO33) S1.6 (PIO34) S1.0 (PIO32) LED10 (PIO74) LED 8 (PIO72) LED 11 (PIO75) LED 7 (PIO71) LED 12 (PIO76) LED 4 (PIO68) LED 13 (PIO77) LED 3 (PIO67) LED 14 (PIO78) +3.3 V Table 37: Pinning host interface NXHXIO device For the setting of the X10 jumper on the NXHX 51ETM required for operating the NXHXIO at the host interface see section Host interface configuration jumper (X10) [} page 16]. NXHX 51ETM | Development Board © Hilscher 2012 – 2015 DOC120606HW06EN | Revision 6 | English | 201501 | Released | Public... -
Page 37: Sdram Device At Host Interface (Nxhxsdr)
68 pin, female (at bottom side) Interface Not isolated Dimensions 65 x 20 x 16 mm Order number 7703.020 Table 38: Technical data NXHXSDR device Pinning host interface NXHXSDR device Signal Signal +3.3 V SD_BA0 SD_DQM0 SD_CAS# SD_A12 SD_CLK SD_A11 SD_A10 SD_A9 SD_RAS# SD_A8 SD_D15 SD_A7 SD_D10 SD_A6 SD_D8 SD_A5 SD_A4 SD_CKE SD_A3 SD_A2 SD_DQM2# SD_A1 NXHX 51ETM | Development Board © Hilscher 2012 – 2015 DOC120606HW06EN | Revision 6 | English | 201501 | Released | Public... -
Page 38: Table 39: Pinning Host Interface Nxhxsdr Device
SD_D11 SD_D31 SD_D9 SD_D30 SD_DQM1# SD_D27 SD_D26 SD_D14 SD_D19 SD_D28 SD_D18 SD_D29 SD_D17 SD_CS# SD_D16 SD_D7 SD_D13 SD_D6 SD_D12 SD_D5 SD_D25 SD_D4 SD_D24 SD_D3 SD_D23 SD_D2 SD_D22 SD_D1 SD_D21 SD_D0 +3.3 V SD_BA1 Table 39: Pinning host interface NXHXSDR device For the setting of the X10 jumper on the NXHX 51ETM required for operating the NXHXSDR at the host interface see section Host interface configuration jumper (X10) [} page 16]. NXHX 51ETM | Development Board © Hilscher 2012 – 2015 DOC120606HW06EN | Revision 6 | English | 201501 | Released | Public... -
Page 39: Phy And Serial Dualport Memory Device At Host Interface (Nxhxphy)
Accessories 39/72 4.1.4 PHY and serial DualPort Memory device at host interface (NXHX PHY) NXHXPHY is PHY interface as well as a Serial DualPort Memory Interface and can be connected at the host interface. Figure 6: NXHXPHY printed circuit board Name Description 1 x RJ45 Connector Matrix label Host interface, soldered side AOI manufacturing label SPM Host interface Table 40: Positions in figure Technical data NXHXPHY device Parameter Value Ethernet connector 1 * RJ 45 Host interface connector 68 pin, female (at bottom side) Interface Not isolated Dimensions 65 x 30 x 23 mm Order number 7703.030 Table 41: Technical data NXHXPHY device NXHX 51ETM | Development Board © Hilscher 2012 – 2015 DOC120606HW06EN | Revision 6 | English | 201501 | Released | Public... -
Page 40: Table 42: Pinning Host Interface X1 Of Nxhxphy Device
SPM_CS# SPM_MOSI SPM_MISO +3.3 V Table 42: Pinning host interface X1 of NXHXPHY device Pinning Serial DualPort Memory interface X3 of NXHXPHY device See position (5) in figure above. Signal Signal SPM_SIRQ# SPM_CS# +3.3 V SPM_DIRQ# SPM_MOSI SPM_CLK SPM_MISO Table 43: Pinning Serial DualPort Memory interface X3 of NXHXPHY device NXHX 51ETM | Development Board © Hilscher 2012 – 2015 DOC120606HW06EN | Revision 6 | English | 201501 | Released | Public... -
Page 41: Phy And Sdr Memory Device At Host Interface (Nxhxphysdr)
Accessories 41/72 For the setting of the X10 jumper on the NXHX 51ETM required for operating the NXHXPHY device at the host interface, see section Host interface configuration jumper (X10) [} page 16]. 4.1.5 PHY and SDR memory device at host interface (NXHXPHYSDR) NXHXPHYSDR is a 16bit SDRAM with 64 MBit as well as a PHY interface and can be connected at the host interface. Figure 7: NXHXPHYSDR printed circuit board Name Description 1 x RJ45 Connector Matrix label Host interface, soldered side AOI manufacturing label Table 44: Positions in figure Technical data NXHXPHY device Parameter Value Ethernet connector 1 * RJ 45 SDRAM 64 MBit 3.3V Data width 16 bit Host interface connector 68 pin, female (at bottom side) Interface Not isolated Dimensions 65 x 30 x 24 mm Order number 7703.040 Table 45: Technical data NXHXPHY device NXHX 51ETM | Development Board © Hilscher 2012 – 2015 DOC120606HW06EN | Revision 6 | English | 201501 | Released | Public... - Page 42 SD_D11 MII_RXD3 SD_D9 MII_RXD2 SD_DQM1# MII_RXD1 MII_MDC SD_D14 MII_DIO MII_RXCLK MII_TXER MII_RXER MII_CRS SD_CS# MII_COL SD_D7 SD_D13 SD_D6 SD_D12 SD_D5 MII_TXDEN SD_D4 MII_TXD3 SD_D3 MII_TXD2 SD_D2 MII_TXD1 SD_D1 MII_TXD0 SD_D0 +3.3 V SD_BA1 MII_TXCLK Table 46: Pinning host interface X1 of NXHXPHY device For the setting of the X10 jumper on the NXHX 51ETM required for operating the NXHXPHYSDR at the host interface, see section Host interface configuration jumper (X10) [} page 16]. NXHX 51ETM | Development Board © Hilscher 2012 – 2015 DOC120606HW06EN | Revision 6 | English | 201501 | Released | Public...
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Page 43: Sdr Memory And Spi Device At Host Interface (Nxhxsdrspi)
Accessories 43/72 4.1.6 SDR memory and SPI device at host interface (NXHXSDRSPI) NXHXSDRSPI is a 16bit SDRAM with 64 MBit as well as an SPI interface using the host interface as serial DualPort Memory. Figure 8: NXHXSDRSPI printed circuit board Name Description Matrix label Host interface, soldered side SPI host interface AOI manufacturing label Table 47: Positions in figure Technical data NXHXSDRSPI device Parameter Value SDRAM 64 MBit, 3.3V Data width 16 bit Host interface connector 68 pin, female (at bottom side) Interface Not isolated Dimensions 65 x 25 x 23 mm Order number 7703.070 Table 48: Technical data NXHXSDRSPI device NXHX 51ETM | Development Board © Hilscher 2012 – 2015 DOC120606HW06EN | Revision 6 | English | 201501 | Released | Public... -
Page 44: Table 49: Pinning Host Interface X1 Of Nxhxsdrspi Device
SPM_CS# SPM_MOSI SD_CS# SPM_MISO SD_D7 SD_D13 SD_D6 SD_D12 SD_D5 SD_D4 SD_D3 SD_D2 SD_D1 SD_D0 +3.3 V SD_BA1 Table 49: Pinning host interface X1 of NXHXSDRSPI device Pinning SPI interface X2 of NXHXSDRSPI device See position (3) in figure above. Signal Signal SPM_SIRQ# SPM_CS# +3.3 V SPM_DIRQ# SPM_MOSI SPM_CLK SPM_MISO Table 50: Pinning SPI interface X2 of NXHXSDRSPI device NXHX 51ETM | Development Board © Hilscher 2012 – 2015 DOC120606HW06EN | Revision 6 | English | 201501 | Released | Public... -
Page 45: Parallel Dualport Memory At Host Interface
Accessories 45/72 For the setting of the X10 jumper on the NXHX 51ETM required for operating the NXHXSDRSPI device at the host interface see section Host interface configuration jumper (X10) [} page 16]. 4.1.7 Parallel DualPort Memory at host interface The NXHX 51ETM can be accessed from the PC via the NXPCAPCI Card (order number: 7902.100), using the host interface as parallel dualport memory. Figure 9: NXHX 51ETM connected to NXPCAPCI Board For the setting of the X10 jumper on the NXHX 51ETM required for operating the NXPCAPCI at the host interface, see section Host interface configuration jumper (X10) [} page 16]. For further information about the NXPCAPCI board, please refer to the User Manual NXPCAPCI. NXHX 51ETM | Development Board © Hilscher 2012 – 2015 DOC120606HW06EN | Revision 6 | English | 201501 | Released | Public... -
Page 46: Using Nxhx 6Re Or Nxhx 52Re As Extension Bus At Host Interface
Accessories 46/72 4.1.8 Using NXHX 6RE or NXHX 52RE as Extension Bus at host interface Figure 10: NXHX 51ETM connected to NXHX 6RE Board For the setting of the X10 jumper on the NXHX 51ETM required for operating the NXPHX 6RE or the NXHX 52RE at the host interface, see section Host interface configuration jumper (X10) [} page 16]. 4.1.9 Accessory cables and connectors for host interface 4.1.9.1 CABNXPCAPCI The CABNXPCAPCI cable can be used to connect the X3 host interface of the NXHX 51ETM (see section Host interface (X3) [} page 19]) with the Hilscher NXPCAPCI Card (see section Parallel DualPort Memory at Host Interface [} page 45]) or other host devices. CABNXPCAPCI Value Part number 4400.000 Cable length 45 cm Connectors 68 pin socket connector Table 51: Technical data CABNXPCAPCI 4.1.9.2 CABNXEB5 The CABNXEB5 cable can be used to connect the X3 host interface of the NXHX 51ETM (see section Host interface (X3) [} page 19]) with the Hilscher NXPCAPCI Card (see section Parallel DualPort Memory at Host Interface [} page 45]) or other host devices. CABNXEB5 Value Part number 4400.001 Cable length 6.35 cm Connectors 68 pin socket connector Table 52: Technical data CABNXEB5... -
Page 47: Fieldbus And Serial Adapters/Interfaces
Accessories 47/72 4.1.9.3 CONNXHIF/M The CONNXHIF/M male host interface socket can be used as connector for PCB in hardware development. CONNXHIF/M Value Part number 4400.003 Connector 68 pin male socket connector Table 53: Technical data CONNXHIF/M Fieldbus and serial adapters/interfaces Figure 11: NXHX 51ETM with possible Fieldbus modules NXHX 51ETM | Development Board © Hilscher 2012 – 2015 DOC120606HW06EN | Revision 6 | English | 201501 | Released | Public... -
Page 48: Nxhxdp
XMAC RX PIO 4 XMAC IO 0 PIO 5 XMAC IO 1 RSTOUT n.c. Table 54: Pins of connector to NXHX Fieldbus adapter 4.2.1 NXHXDP NXHXDP is a PROFIBUS interface (RS485). NXHXDP Value Interface PROFIBUS, RS485 Connector DSub, 9 pin, female Isolation Not isolated Part number 7923.410 Table 55: NXHXDP technical data PROFIBUS Signal Description Rx/Tx + Receive / Transmit data positive Data ground Rx/Tx Receive / Transmit data negative 1, 2, 4, n.c. 6, 7, 9 9 pin, DSub, female Table 56: PROFIBUS RS485 pin assignment NXHX 51ETM | Development Board © Hilscher 2012 – 2015 DOC120606HW06EN | Revision 6 | English | 201501 | Released | Public... -
Page 49: Nxhxco
1, 4, 5, n. c. 6, 8, 9 9 pin, DSub, male Table 58: CANopen pin assignment 4.2.3 NXHXDN NXHXDN is a DeviceNet interface NXHXDN Value Interface DeviceNet Connector COMBICON MSTBA 2.5 Isolation Not isolated Part number 7923.510 Table 59: NXHXDN technical data DeviceNet Signal Description DGND Ground CAN L CAN Low signal n. c. CAN H CAN High signal DN V+ +24 V DeviceNet power supply COMBICON socket, female Table 60: DeviceNet pin assignment NXHX 51ETM | Development Board © Hilscher 2012 – 2015 DOC120606HW06EN | Revision 6 | English | 201501 | Released | Public... -
Page 50: Nxhxrs
Transmit data Data Terminal Ready Reference potential Request to send Clear to send 9 pin, DSub, male 1, 6, 9 n. c. Table 62: RS232 pin assignment DSub 4.2.5 NXHXCC NXHXCC is a CCLink interface. NXHXCC Value Interface CCLink Connector COMBICON MSTBA 2.5 Isolation Not isolated Part number 7923.740 Table 63: NXHXCC technical data CCLink Signal Description Data positive Data negative Data ground Shield, internally connected to FG and PE. Internally connected via 3.3 nF to DG. Field ground, internally connected to SLD and PE. Internally connected via 3.3 nF to DG. COMBICON socket, female Table 64: CCLink pin assignment NXHX 51ETM | Development Board © Hilscher 2012 – 2015 DOC120606HW06EN | Revision 6 | English | 201501 | Released | Public... -
Page 51: Nxacpower
Accessories 51/72 NXACPower The power supply NXACPOWER has the following technical data: NXACPOWER Value Part number 7930.000 Input 100240 V ~0.4 A (4763 Hz) Output 24 V / 0.625 A, shortcircuitproof Cable length 1.8 m Connector With barrel connector, sizes in mm Sizes of barrel connector NXACPOWER Table 65: Technical data power supply NXACPOWER NXACJTAGETM ETMtoJTAG adapter Order number: 2400.200 NXHX 51ETM | Development Board © Hilscher 2012 – 2015 DOC120606HW06EN | Revision 6 | English | 201501 | Released | Public... -
Page 52: Reference
Reference 52/72 5 Reference Schematics See the schematics on the following pages. NXHX 51ETM | Development Board © Hilscher 2012 – 2015 DOC120606HW06EN | Revision 6 | English | 201501 | Released | Public... -
Page 53: Reset, Usb, Jtag And Mmc
Reference 53/72 5.1.1 Reset, USB, JTAG and MMC Figure 13: Reset, USB, JTAG and MMC schematic diagram NXHX 51ETM | Development Board © Hilscher 2012 – 2015 DOC120606HW06EN | Revision 6 | English | 201501 | Released | Public... -
Page 54: Memory
Reference 54/72 5.1.2 Memory Figure 14: Memory schematic diagram NXHX 51ETM | Development Board © Hilscher 2012 – 2015 DOC120606HW06EN | Revision 6 | English | 201501 | Released | Public... -
Page 55: Hif, Etm And Ios
Reference 55/72 5.1.3 HIF, ETM and IOs Figure 15: HIF, ETM and IOs schematic diagram NXHX 51ETM | Development Board © Hilscher 2012 – 2015 DOC120606HW06EN | Revision 6 | English | 201501 | Released | Public... -
Page 56: Ethernet Interface
Reference 56/72 5.1.4 Ethernet interface Figure 16: Ethernet interface schematic diagram NXHX 51ETM | Development Board © Hilscher 2012 – 2015 DOC120606HW06EN | Revision 6 | English | 201501 | Released | Public... -
Page 57: Power Supply
Reference 57/72 5.1.5 Power supply Figure 17: Power supply schematic diagram NXHX 51ETM | Development Board © Hilscher 2012 – 2015 DOC120606HW06EN | Revision 6 | English | 201501 | Released | Public... -
Page 58: Nxhxio
Reference 58/72 5.1.6 NXHXIO Figure 18: NXHXIO schematic diagram NXHX 51ETM | Development Board © Hilscher 2012 – 2015 DOC120606HW06EN | Revision 6 | English | 201501 | Released | Public... -
Page 59: Nxhxsdram
Reference 59/72 5.1.7 NXHXSDRAM Figure 19: NXHXSDRAM schematic diagram NXHX 51ETM | Development Board © Hilscher 2012 – 2015 DOC120606HW06EN | Revision 6 | English | 201501 | Released | Public... -
Page 60: Nxhxphy
Reference 60/72 5.1.8 NXHXPHY Figure 20: NXHXPHY schematic diagram NXHX 51ETM | Development Board © Hilscher 2012 – 2015 DOC120606HW06EN | Revision 6 | English | 201501 | Released | Public... -
Page 61: Nxhxphysdr
Reference 61/72 5.1.9 NXHXPHYSDR Figure 21: NXHXPHYSDR schematic diagram NXHX 51ETM | Development Board © Hilscher 2012 – 2015 DOC120606HW06EN | Revision 6 | English | 201501 | Released | Public... -
Page 62: Nxhxsdrspi
Reference 62/72 5.1.10 NXHXSDRSPI Figure 22: NXHXSDRSPI schematic diagram NXHX 51ETM | Development Board © Hilscher 2012 – 2015 DOC120606HW06EN | Revision 6 | English | 201501 | Released | Public... -
Page 63: Bill Of Materials
Samsung C108 C110 C111 Ceramic capacitor SMD0805 CKSS22UV6.30805 Novacap C104 Ceramic capacitor SMD0603 CKSS2.2NV500603 Samsung EEPROM ser. 1kBit encrypted AT88SC0104CSU Atmel SDRAM 64MBit 7ns TSOP86 SDRAM64M323V3I7T Micron FLASh ser. 32MBit W25Q32VSSIG Winbond NETX 51 Part number 2231.000 Hilscher D23 D24 D25 Bus driver 1BIT 74LVC1G125GW NXP, Phillips Quartz 25MHz SMD ABM725M Abracon L50 L51 Ferrite filter chokes. SMD1206 LEFS600RA11206 Würth L100 Storage throttle SMD LSFS10UA4 Sumida N110 DCDCConverter SMD EN5312Q Enpirion N100 Switching regulator stepdown... -
Page 64: Nxhxio
Table 66: Bill of materials NXHX 51ETM 5.2.2 NXHXIO Reference Description Quantity Manufacturer product description Manufacturer schematics R1 R2 Resistor SMD 0603 1% 076610 5130 SMD 1% 100 R R7 R8 R9 R10 R11 Resistor network SMD YAGYC164JR0710KL YC164, 10K Yageo R12 R13 R14 R3 R4 R5 R6 Resistor network SMD 31.98.23 4*220 Ohm, SMD1206 Samsung S1 S2 Coding switch 8fold even 17G562 DS–08, 8 switch, A 21,84 Apem V1 V2 V3 V4 V5 V6 LED yellow SMD0805 1013103 1721/Y2CAN1P23T Everlight V7 V8 V9 V10 V11 V12 V13 V14 V15 Connector strip 68 pin 12C09068SB SLRM1,2768 pin Haxel (2x34) Table 67: Bill of material NXHXIO (7703.010 Revision 2) NXHX 51ETM | Development Board © Hilscher 2012 – 2015 DOC120606HW06EN | Revision 6 | English | 201501 | Released | Public... -
Page 65: Nxhxsdr
TK50 Resistor network SMD CAY1651R0F4LF YC164 SMD 1% Bourns Resistor SMD 0603 1% 32.38.12 12,4k 63mW 1% Samsung SMD0603 Resistor network SMD 84E924 YC164, 4K7 Yageo R5 R6 Resistor SMD 0603 31.30.45 270R, 1%, 63mW, Samsung SMD0603, TK100 R7 R8 Resistor SMD 0603 1% YAGRC0603FR0710RL 10R, 1%, Yageo 63mW, SMD0603 R9 R11 Resistor SMD 0603 6950011 RC0603 FR07 4,7K 1% Royalohm Connector 68 pin 12C09068SB SLRM1,2768 pin Haxel (2x34) Western socket 8 pin angled 203199 MJIM IM 1X1 S 88 GF5 Erni with LEDs Strip 2*6 pin test XWLZ12SG Haxel Table 69: Bill of material NXHXPHY (7773.030 Revision 2) NXHX 51ETM | Development Board © Hilscher 2012 – 2015 DOC120606HW06EN | Revision 6 | English | 201501 | Released | Public... -
Page 66: Nxhxphysdr
Haxel (2x34) Table 70: Bill of material NXHXPHYSDR (7773.040 Revision 1) 5.2.6 NXHXSDRSPI Reference Description Quantity Manufacturer product description Manufacturer schematics C1 C2 Ceramic capacitor SMD0603 2 32.91.65 100nF 50V SMD 0603 X7R Samsung Resistor SMD0603 34.07.40 2.2K 63mW 1% SMD 0603 Firstohm TK50 SDRAM 64MBit FBGA54 IS42S16400F6BLI ISSI 3.3V IS42S16400F6BLI Socket terminal strip 68 pin 127ST068SB BL "1.27x2.54" 68 pin FJH Stecker (2x34) verbindung GmbH Jumper panel 2*3 pol. 102.126.006.26 12.6mm FJH Stecker verbindung GmbH Table 71: Bill of material NXHXSDRSPI (7703.070 Revision 1) NXHX 51ETM | Development Board © Hilscher 2012 – 2015 DOC120606HW06EN | Revision 6 | English | 201501 | Released | Public... -
Page 67: Matrix Label
Reference 67/72 Matrix label The device is equipped with a matrix label. The label shows: Part number (1) · Hardware revision (2) · · Serial number (3) Figure 23: Matrix label NXHX 51ETM In this example, the label shows part number 7763.000, hardware revision 2 and serial number 23457. NXHX 51ETM | Development Board © Hilscher 2012 – 2015 DOC120606HW06EN | Revision 6 | English | 201501 | Released | Public... -
Page 68: Technical Data Nxhx 51Etm
Technical data NXHX 51ETM 68/72 6 Technical data NXHX 51ETM Parameter Value Supply Voltage 24 V DC Processor netX 51 Memory 8 MByte SDRAM, 4 MByte serial SPI Flash SYS, V1; COM0, V30; COM1, V31; V12; V13; V14; V15 Operating elements Reset pushbutton, memory switch, boot switch USB MiniB configuration / diagnostic USB Typ B Development PC connection RJ45 Ethernet Dimensions (L x W x D) 100 x 69 x 20 mm Operating temperature 0 … 55 °C Table 72: Technical data NXHX 51ETM NXHX 51ETM | Development Board © Hilscher 2012 – 2015 DOC120606HW06EN | Revision 6 | English | 201501 | Released | Public... -
Page 69: List Of Figures
Figure 14: Memory schematic diagram ................. 54 Figure 15: HIF, ETM and IOs schematic diagram ..............55 Figure 16: Ethernet interface schematic diagram ..............56 Figure 17: Power supply schematic diagram................. 57 Figure 18: NXHXIO schematic diagram ................58 Figure 19: NXHXSDRAM schematic diagram ..............59 Figure 20: NXHXPHY schematic diagram................60 Figure 21: NXHXPHYSDR schematic diagram ..............61 Figure 22: NXHXSDRSPI schematic diagram..............62 Figure 23: Matrix label NXHX 51ETM .................. 67 NXHX 51ETM | Development Board © Hilscher 2012 – 2015 DOC120606HW06EN | Revision 6 | English | 201501 | Released | Public... - Page 70 Pin assignment X9 ETM connector ................. 30 Table 31: Ethernet RJ45 pin assignment ................31 Table 32: Pin assignment power supply socket ..............31 Table 33: LEDs on the NXHX 51ETM..................32 Table 34: System Status LED ....................32 Table 35: NXHX 51ETM with possible devices for the host interface ........35 Table 36: Technical data NXHXIO device................36 Table 37: Pinning host interface NXHXIO device ..............36 Table 38: Technical data NXHXSDR device................37 Table 39: Pinning host interface NXHXSDR device............... 37 Table 40: Positions in figure ....................39 NXHX 51ETM | Development Board © Hilscher 2012 – 2015 DOC120606HW06EN | Revision 6 | English | 201501 | Released | Public...
- Page 71 Table 63: NXHXCC technical data..................50 Table 64: CCLink pin assignment ..................50 Table 65: Technical data power supply NXACPOWER ............51 Table 66: Bill of materials NXHX 51ETM ................63 Table 67: Bill of material NXHXIO (7703.010 Revision 2)............64 Table 68: Bill of material NXHXSDR (7773.020 Revision 1)..........65 Table 69: Bill of material NXHXPHY (7773.030 Revision 2) ..........65 Table 70: Bill of material NXHXPHYSDR (7773.040 Revision 1) .......... 66 Table 71: Bill of material NXHXSDRSPI (7703.070 Revision 1) ..........66 Table 72: Technical data NXHX 51ETM ................68 NXHX 51ETM | Development Board © Hilscher 2012 – 2015 DOC120606HW06EN | Revision 6 | English | 201501 | Released | Public...
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Page 72: Contacts
Contacts 72/72 Contacts HEADQUARTERS Germany Hilscher Gesellschaft für Systemautomation mbH Rheinstrasse 15 D65795 Hattersheim Phone: +49 (0) 6190 99070 Fax: +49 (0) 6190 990750 EMail: info@hilscher.com Support Phone: +49 (0) 6190 990799 EMail: de.support@hilscher.com SUBSIDIARIES China Japan Hilscher Systemautomation (Shanghai) Co. Ltd. Hilscher Japan KK 200010 Shanghai Tokyo, 1600022 Phone: +86 (0) 2163555161 Phone: +81 (0) 353620521 EMail: info@hilscher.cn EMail: info@hilscher.jp Support Support Phone: +86 (0) 2163555161 Phone: +81 (0) 353620521 EMail: cn.support@hilscher.com EMail: jp.support@hilscher.com France Korea Hilscher France S.a.r.l. Hilscher Korea Inc. 69500 Bron Seongnam, Gyeonggi, 463400 Phone: +33 (0) 4 72 37 98 40 Phone: +82 (0) 317893715 EMail: info@hilscher.fr...
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