Hardware Configuration; Master Node Connection Example; Slave Node Connection Example - Infineon S6BT112A Getting Started

Getting Started with CXPI Transceiver S6BT112A

Hardware configuration

3 Hardware configuration
3.1

Master node connection example

When using S6BT112A as a master node, pull down the master / slave switching pin (SELMS: 8 pin). The baud
rate clock, generated by the master node using the MCU timer, is the input to the clock input pin (CLK: 3 pin).
Note that, the MCU UART baud rate and timer output need not be synchronized. The TXD and RXD pins are
connected to the MCU's UART pin, and the BUS pin is pulled up to V
controls the S6BT112A mode transition between the Sleep mode and the Normal mode after power-on with the
GPIO of the MCU.
Figure 2 shows the master node circuit connection (example using Traveo II MCU).
+5 V or +3.3 V
CYT2B9
VDDD
GND
GND
Figure 2 Example of master node connection consisting of Traveo II MCU and S6BT112A
3.2

Slave node connection example

When using S6BT112A as a slave node, pull up the master / slave switching pin (SELMS: 8 pin). The clock output
pin (CLK: 3 pin) is connected to the MCU external interrupt pin, GPIO input pin, etc. It is used to detect the
wakeup pulse in the Sleep mode, or to measure the communication baud rate in the Normal mode and the
baud rate on the MCU side. Connect the TXD and RXD pins to the MCU's UART pin. The NSLP pin controls the
S6BT112A mode transition between the Sleep mode and the Normal mode after power on with the GPIO of the
MCU.
Application Note
R2 R3
10 kΩ
10 kΩ
TVII
S6BT112A
1
RXD
P20-5/
CXPI3_RX
2
P12-5/
NSLP
GPIO
3
P14-6/
CLK
PWM
P20-6/
4
TXD
CXPI3_TX
BATTERY
1N4148
10 kΩ
D3
0.1 µF
8
R4
SELMS
GND
7
BAT
1 kΩ
R6
6
BUS
220 pF
5
GND
GND GND
6 of 19
with a 1-kΩ resistor. The NSLP pin
+B
D1
10 µF
GND
BUS
GND
GND
002-27376 Rev. *A
2021-06-15