Table of Contents
Advertisement
Quick Links
AN227376
Getting Started with CXPI Transceiver
S6BT112A
About this document
Scope and purpose
AN227376 introduces you to the Japanese Automotive Standards Organization (JASO) Clock Extension
Peripheral Interface (CXPI)-compliant S6BT112A transceiver chip, which has the unique wave-shaping function
for low Electromagnetic Interference (EMI). This application note describes an example of hardware connection
with the CXPI data link controller (MCU) and the CXPI bus line. In addition, it explains how the data link
controller shifts the operation mode and arbitrates transmission with the CXPI protocol.
Associated Part Family
S6BT112A
Related Documents
S6BT112A Datasheet
Table of contents
About this document ....................................................................................................................... 1
Table of contents ............................................................................................................................ 1
1
CXPI communication protocol ................................................................................................. 3
2
S6BT112A CXPI transceiver ...................................................................................................... 4
3
Hardware configuration .......................................................................................................... 6
3.1
Master node connection example .......................................................................................................... 6
3.2
Slave node connection example ............................................................................................................. 6
4
Software configuration ........................................................................................................... 8
4.1
Mode transition ....................................................................................................................................... 8
4.1.1
Mode transition diagram ................................................................................................................... 8
4.1.2
Transition from Normal mode to Sleep mode .................................................................................. 9
4.1.3
Transition from Sleep mode to Normal mode ................................................................................ 10
4.1.3.1
4.1.3.2
4.2
Arbitration ............................................................................................................................................. 13
Application Note
www.infineon.com
Master node trigger ..................................................................................................................... 10
Slave node trigger ....................................................................................................................... 11
Please read the Important Notice and Warnings at the end of this document
page 1 of 19
002-27376 Rev. *A
2021-06-15
Advertisement
Table of Contents
Related Manuals for Infineon S6BT112A
Summary of Contents for Infineon S6BT112A
-
Page 1: Table Of Contents
Scope and purpose AN227376 introduces you to the Japanese Automotive Standards Organization (JASO) Clock Extension Peripheral Interface (CXPI)-compliant S6BT112A transceiver chip, which has the unique wave-shaping function for low Electromagnetic Interference (EMI). This application note describes an example of hardware connection with the CXPI data link controller (MCU) and the CXPI bus line. - Page 2 Getting Started with CXPI Transceiver S6BT112A CXPI communication protocol Baud rate detection period and fail-safe decode initialization ............15 4.3.1 Baud rate detection period ......................15 4.3.2 Fail-safe decode initialization ......................16 Glossary ..........................17 Revision history..........................18 Application Note 2 of 19 002-27376 Rev.
-
Page 3: Cxpi Communication Protocol
Getting Started with CXPI Transceiver S6BT112A CXPI communication protocol CXPI communication protocol CXPI is a communication protocol that consists of three layers: application layer, data link layer, and physical layer. It has the following features: Non-destructive CSMA / CR (carrier sense multiple access/collision resolution) method that ensures high •... -
Page 4: S6Bt112A Cxpi Transceiver
S6BT112A CXPI transceiver S6BT112A CXPI transceiver The S6BT112A series is a CXPI transceiver that conforms to the JASO CXPI protocol. S6BT112A01 has a built-in Spread Spectrum Clock Generator (SSCG), while S6BT112A02 has no SSCG. The S6BT112A series has the following features. - Page 5 Getting Started with CXPI Transceiver S6BT112A S6BT112A CXPI transceiver Table 2 S6BT112A pin functions Pin name Function Receive UART data output pin NSLP Sleep control pin ‘0’: Sleep mode ‘1’: Normal mode / standby mode For master node (SELMS = ‘0’): Baud rate clock input pin Slave node (SELMS = ‘1’): Baud rate clock output pin...
-
Page 6: Hardware Configuration
Slave node connection example When using S6BT112A as a slave node, pull up the master / slave switching pin (SELMS: 8 pin). The clock output pin (CLK: 3 pin) is connected to the MCU external interrupt pin, GPIO input pin, etc. It is used to detect the wakeup pulse in the Sleep mode, or to measure the communication baud rate in the Normal mode and the baud rate on the MCU side. - Page 7 Figure 3 Connection example of slave node configured with PSoC 4 and S6BT112A In case of adding the secondary clock master operation, the SELMS pin must be connected to the GPIO of the MCU in addition to being pulled up. When switching to the secondary clock master operation in the power on state, make sure that the NSLP pin is set to LOW and transition to the Sleep mode, and after confirming that there is no communication such as Wakeup pulse on the BUS at the CLK pin, switch the SELMS pin to LOW.
-
Page 8: Software Configuration
Mode transition 4.1.1 Mode transition diagram Figure 4 shows the mode transition diagram of S6BT112A. Figure 4 Mode transition diagram of S6BT112A S6BT112A mainly has the following three operating modes: Sleep mode • Standby mode • Normal mode • Application Note 8 of 19 002-27376 Rev. -
Page 9: Transition From Normal Mode To Sleep Mode
S6BT112A transitions to Sleep mode by changing the NSLP pin from HIGH to LOW. Set the master node CLK pin to HIGH in Sleep mode. Also, set the TXD pin to HIGH when not communicating according to the UART protocol. -
Page 10: Transition From Sleep Mode To Normal Mode
When the master node detects an internal factor event such as sensor detection in Sleep mode, it sets the NSLP pin of S6BT112A to HIGH to transition back to Normal mode. In addition, the master node will transmit the baud rate clock to the transceiver CLK pin to transmit the clock to the communication bus. -
Page 11: Slave Node Trigger
After detecting an internal wakeup event, the slave node sends a Wakeup pulse to the communication bus via the TXD pin. In the master node, when S6BT112A receives the BUS wakeup pulse, it transmits the non-decoded wakeup pulse to the RXD terminal. In response to this, the MCU sets NSLP pin to HIGH within T... - Page 12 Getting Started with CXPI Transceiver S6BT112A Software configuration On the other hand, in the slave node, the non-decoded BUS wakeup pulse is output to the CLK terminal. In response to this, the slave node sets the NSLP pin to HIGH to transition to the Normal mode within T...
-
Page 13: Arbitration
S6BT112A bitwise arbitration. When PID transmission is in Normal mode, S6BT112A compares the transmitted bit with the bit received from the CXPI BUS. If they match, the BUS output continues. If they do not match, it means that the node lost the arbitration;... - Page 14 Figure 12 shows an example of MCU arbitration function processing. As described in the S6BT112A datasheet, S6BT112A has transmission / reception delay. To implement the arbitration function correctly, ensure that you implement the following two functions on the MCU side: 1.
-
Page 15: Baud Rate Detection Period And Fail-Safe Decode Initialization
In the master node, S6BT112A starts to output the clock to BUS with an optimized duty cycle after 33 CLK clocks. In the slave node, S6BT112A starts to output the decoded clock based on the initialized LOW width of logical value ‘1’... -
Page 16: Fail-Safe Decode Initialization
‘0’. If 10 logical ‘0’ values are received continuously, S6BT112A automatically initializes the decoding process to return to normal operation. External initialization processing is not necessary. -
Page 17: Glossary
Getting Started with CXPI Transceiver S6BT112A Glossary Glossary Table 3 Glossary Terms Description Collision Resolution Cyclic Redundancy Check CSMA Carrier Sense Multiple Access CXPI Clock Extension Peripheral Interface Inter Byte Space Inter Frame Space Protected Identifier Pulse Width Modulation Application Note 17 of 19 002-27376 Rev. -
Page 18: Revision History
Getting Started with CXPI Transceiver S6BT112A Revision history Revision history Document Date of release Description of changes version 2019-10-11 New application note. 2021-06-15 Updated to Infineon template. Application Note 18 of 19 002-27376 Rev. *A 2021-06-15... - Page 19 Do you have a question about this Except as otherwise explicitly approved by Infineon given in this application note. Technologies in a written document signed by...