TABLE OF CONTENTS SOFTWARE UPDATE DESCRIPTION....................1 INTRODUCTION ...........................4 2.1. Scope ..............................4 2.2. General Features ..........................4 SYSTEM BUILDING BLOCKS ......................5 3.1. Analog Front End ..........................5 3.1.1. Tuner............................5 3.1.2. SAW Filters ..........................6 3.2. Back End ............................6 3.3.
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5.3.2. Pin Description........................36 TSH22 ..............................37 5.4. 5.4.1. General Description........................37 5.4.2. Pin Connections........................37 CS4334 ............................37 5.5. 5.5.1. General Description........................37 Features ...........................37 5.5.2. 5.6. AMIC A43L2616..........................38 5.6.1. General Description........................38 Features ...........................38 5.6.2. 5.6.3. Pin Description........................38 MX29LV160T ...........................40 5.7. 5.7.1. General Description........................40 Features ...........................40 5.7.2.
Step 2: Loading the Code 1- Connect the 5 pin cable of the “programming board” to PL203 of the 17MB18 mainboard. Connect the programming board to the computer in which “WISP” program is loaded via “Paralel Port”.
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Figure1: WISP Main Menu Figure2: I2C Configuration 5- Click “Erase Flash” button and then click “Send” button. If ereasing is done without any problem, “three green OK” will be displayed on the main menu window. This indicates that the memory inside the IC is erased succesfully. 6- Click “Write Flash”...
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8- Power on the board. Observe the sliding bar on the main menu showing that flasher.hex and then romcode.hex are being downloaded to the IC on 17MB18 main board. 9- Power off the board when the download operation is over.
INTRODUCTION 2.1. Scope The document covers 23” TFT 17MB18 chassis building blocks, basic features, service menu settings, and the other information needed by service personal. 2.2. General Features The system is a 14” to 23” TFT LCD TV solution with UOCIII Versatile Signal Processor and PW1306 Video Image Processor chip-set on 4-layer PCB.
3.1. Analog Front End 17MB18 Main Board consists of two major blocks. The first block is analog front-end and this block is handled by UOCIII chip that is highly multifunctional. This IC does demodulation of Video & Audio from Tuner IF, CVBS, Audio, RGB, SVHS input selection and processing.
I.F out 2 Symmetrical I.F output 2 / Do not connect for asymmetrical I.F out 1 Asymmetrical I.F Output / Symmetrical I.F output 1 M1,M2,M3, Mounting Tags (Ground) SAW Filters 3.1.2. K3953M is an IF Filter for Video Applications. The package is SIP5K. Supported standards are B/G, D/K, I, L/L’.
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MUX BLOCK AHSYNC TV_[HS,VS] AVSYNC PC_[HS,VS] 74HC4052D HD_[HS,VS] Control Signals: VGA_TV_SW YUV_TV_SW YCbCr VIDEO TV_[R,G,B]AIN SWITCH VIDEO [R,G,B]OUT P15V330 SWITCH P15V330 V[R,G,B]IN Figure 1: MUX Block.
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RF in UOCIII VFIN (24,25) S-Video in Y4(51) C4(52) CVBS in CVBS3/Y3(58) IDTV RGB(70,71,72) 16MB39 AUDIOIN5L(34) IDTV R/L(54,55) IDTV Module AUDIOIN5R(35) C2(59) Scart CVBS2/Y2(55) IFVO(43) AUDIOUTSL(36 ) AUDIOUTSR(37) AUDIOIN3L(56) AUDIOIN3R(57) TV_HS Audio in TV_VS 74HC14 VDRA,HOUT(23,67) HP DRIVER FBLIN AUDOUTHP[L,R](62,63) TDA1308 FBLIN [R,G,B]IN...
3.3. Side Board(s) Keypads 3.3.1. (17TK15, 16, 17, 20, 21, 26) The keypads for 17MB18 main board are listed in the Table below. (They have the same connector pinning though): Key Name Type Function Power Soft sw. Power shut-down and turn on Stand-by Tact sw.
3.4. Power Several linear regulators and switches are used to generate several separate analog and digital voltage supplies such as +5, +3.3, +1.8, etc. (Please check the Figure 3, and Table 3 for power management details.) Table 3: Power management table.
IC AND COMPONENT DESCRIPTIONS 4.1. Basic IC List Title Description IC203 UOCIII Versatile Signal Processor IC100 PW1306 Video Image Processor with Analog Interface IC102 MT28F800B3W Flash Memory IC176 DS90C385 Programmable LVDS Transmitter IC103 EL1883 Sync Separator IC405, IC402 P15V330 Wide Bandwidth 2-channel Multiplexer/Demultiplexer IC404 74HC4052 Dual 4-channel Analog Multiplexer...
Pinout 4.2.1. Figure 6: UOCIII Pin configuration “stereo” and “AV-stereo” versions with Audio DSP AV STEREO STEREO +AV SYMBOL NO AUDIO MONO DESCRIPTION STEREO VSSP2 ground VSSC4 ground VDDC4 digital supply to SDACs (1.8V) VDDA3(3.3V) supply (3.3 V) VREF_POS_LSL positive reference voltage SDAC (3.3 V) VREF_NEG_LSL+HPL negative reference voltage SDAC (0 V) VREF_POS_LSR+HPR...
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AV STEREO STEREO +AV SYMBOL NO AUDIO MONO DESCRIPTION STEREO VREF_NEG_HPL+HPR negative reference voltage SDAC (0 V) VREF_POS_HPR positive reference voltage SDAC (3.3 V) XTALIN crystal oscillator input XTALOUT crystal oscillator output VSSA1 ground VGUARD/SWIO V-guard input / I/O switch (e.g. 4 mA current sinking capability for direct drive of LEDs) DECDIG decoupling digital supply...
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AV STEREO STEREO +AV SYMBOL NO AUDIO MONO DESCRIPTION STEREO SIFAGC/DVBAGC AGC sound IF / internal-external AGC for DVB applications DVBO/IFVO/FMRO Digital Video Broadcast output / IF video output / FM radio output DVBO/FMRO Digital Video Broadcast output / FM radio output VCC8V 8 Volt supply for audio switches AGC2SIF...
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AV STEREO STEREO +AV SYMBOL NO AUDIO MONO DESCRIPTION STEREO YOUT Y-output (for YUV interface) U-output for YUV interface (2 RGB / YP UOUT (INSSW2) insertion input) VOUT (SWO1) V-output for YUV interface (general purpose switch output) RGB / YP insertion input INSSW3 R input / P...
AV STEREO STEREO +AV SYMBOL NO AUDIO MONO DESCRIPTION STEREO port 0.0 or I S digital input 1 or I S digital output P0.0/I2SDI1/O P0.0 port 0.0 P1.3/T1 port 1.3 or Counter/Timer 1 input port 1.6 or I C-bus clock line P1.6/SCL port 1.7 or I C-bus data line...
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I/O D5 (bidirectional, 5-volt tolerant with pull-down) I/O U5 (bidirectional, 5-volt tolerant with pull-up) ID 5 (input, 5-volt tolerant with pull-down) OS (output with fixed slew-rate control) AI (analog input, 5-volt tolerant) DI (digital input, 5-volt tolerant) ...
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Signal Type Function Analog Sync-On-Green or Sync-On-Luma input. Allows recovery of the HSYNC SOGIN signal when this pin is AC-coupling to the Green (Red or Blue) analog signal source. If not used, this pin should be left unconnected. External PLL Loop Filter. When using the on-chip PLL, this pin must be connected to FILT an external filter network.
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Signal Type Function DEG0 DEG1 DEG2 DEG3 DEPort Green Pixel Data. In dual pixel output mode these pins are the EVEN green outputs. DEG4 DEG5 DEG6 DEG7 DEB0 DEB1 DEB2 DEB3 DEPort Blue Pixel Data. In dual pixel output mode these pins are the EVEN blue outputs.
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Signal Type Function PORTD(7:0) can be used as GPO (Output Only). [56- PORTD[0-7] DOR0 DOR1 DOR2 DOR3 DOPort Red Pixel Data. In dual pixel output mode these pins are the ODD red outputs. In single pixel output mode these pins are not used. DOR4 DOR5 DOR6...
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Signal Type Function DOB2 DOB3 DOB4 DOB5 DOB6 DOB7 I/O D5 Write Enable. Low indicates a write to external RAM or other devices. I/O D5 Read Enable. Low indicates a read to external RAM or other devices. ROMOE ROM Output Enable. Low output indicates a read from external ROM. ROMWE ROM Write Enable.
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Signal Type Function Microprocessor 16-bit bidirectional data bus. General-purpose I/O port bit controlled by PADAT0 and PAEN0. This pin has one other possible function when EXTRAMEN=1. When EXTRAMEN=1 and PAEN0=0, PORTA1 is microprocessor address bit 0 (A0). PORTA0...
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Signal Type Function General-purpose I/O port bit controlled by PADAT1 and PAEN1. This pin has one other possible function when EXTRAMEN=1. When EXTRAMEN=1 and PAEN1=0, PORTA1 is microprocessor byte-high enable (BHEN) PORTA1 PORTA2 General-purpose I/O port bit controlled by PADAT2 and PAEN2. General-purpose I/O port bit controlled by PADAT3 and PAEN3.
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Signal Type Function Crystal Output. Connect to external crystal. 135, VDD1 1.8V digital core power. 146, 173, 136, Digital core ground. 147, 174, 104, VDDQ3 122, 3.3V digital I/O power. 133, 171, 105, VSSQ 123, Digital I/O ground. 134, 172, VDDPA1 1.8V analog clock generator power.
Signal Type Function AGND ADC analog ground. 4.4. M29W800AT Low Voltage Single Supply Flash Memory to store PW1306 code. ELECTRONIC SIGNATURE – Manufacturer Code: 20h – Top Device Code, M29W800AT: D7h 4.5. DS90C385 The DS90C385 transmitter converts 28 bits of LVCMOS/ LVTTL data into four LVDS (Low Voltage Differential Signaling) data streams.
80 Ohm (typ.) at VCC - VEE = 4.5 V 70 Ohm (typ.) at VCC - VEE = 6.0 V 60 Ohm (typ.) at VCC - VEE = 9.0 V 4.8. TA1366FG TA1366FG is an Analog Y Cb Cr picture signal improver in a 24-pin SSOP plastic package. TA1366FG functions are controlled via I2C bus.
4.11. LM1117 The LM1117 is a series of low dropout voltage regulators with a dropout of 1.2V at 800mA of load current. The output voltage is adjusted according to the formula shown in Figure 9. Available in 1.8V, 2.5V, 2.85V, 3.3V, 5V, and Adjustable Versions ...
4.14. 74LVC541 The 74LVC541A is an octal non-inverting buffer/line driver with 5 V tolerant inputs/outputs. The 3-state outputs are controlled by the output enable inputs OE1and OE2. 5 V tolerant inputs/outputs; for interfacing with 5 V logic Wide supply voltage range from 2.7 to 3.6 V ...
(I): Input, (IPU): input with p-channel pull-up transistor, (ODN): output with open drain n-channel transistor (OD3): output 3-state 4.16. MC34167 The MC34167, MC33167 series are high performance fixed frequency power switching regulators that contain the primary functions required for dc–to–dc converters. This series was specifically designed to be incorporated in step– down and voltage–inverting configurations with a minimum number of external components and can also be used cost effectively in step–up applications.
Symbol Description TXOUT0- LVDS Signal(-) LVDS_GND Ground LVDS_GND Ground Power Supply (+5 or +3.3V) Power Supply (+5 or +3.3V) TTL Panel Connector -Even (2x17 PL177) 4.18.5. Symbol Description Symbol Description DBE6 Blue DGE2 Green DBE7 Blue Ground DBE4 Blue DGE0 Green DBE5 Blue...
Side AV Connector for Side-card Option (PL406) 4.18.14. Signal Signal Ground Right Audio in Left Audio in Ground Ground CVBS in Side SVHS Connector for Side-card Option (PL407) 4.18.15. Signal Y-Luma Ground C-Chroma...
6. SERVICE MENU SETTINGS 6.1. UOCIII Service Menu Turn on the TV. Press “Menu” (M) and “4” ”7” “2” “5” buttons of RC respectively. The following menu will displayed on the screen GTV 3.2.1 EurAsia TVSub 05.01 00000000 00111100 01000000 01100100 11000101 01100100 00000000 01100100...
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Group: Name: Function: Default: “Y delay” setting. (S-Video) (0-15) YSVHS2 Video Bit Control Bit Control Bit Control Bit Control Bit Control Bit Control PeakFreqPAL443 Video PeakFreqPALM Video PeakFreqPALN Video PeakFreqNTSC443 Video PeakFreqNTSCM Video PeakFreqSECAM Video PeakFreqAV Video Blackstretch Video options Bluestretch Video options Whitestretch...
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Group: Name: Function: Default: BGSCAL SAP Audio MSCAL DEC Audio MSCAL MONO Audio MSCAL NIC Audio MSCAL SAP Audio LSCAL DEC Audio LSCAL MONO Audio LSCAL NIC Audio LSCAL SAP Audio Audio Audio CMUTE Audio PA-BA-VO Audio Preset PA-TR-VO Audio Preset PA-LM-VO Audio Preset PA-ST-VO...
Tuner AGC Alignment 6.1.2. In this part, tuner AGC alignment procedure is described. A TV pattern generator with RF output and volt-meter are needed for this alignment. Test Set-up “NICAM Stereo” and 60 dB PAL B/G RF signal from pattern generator will be applied. Frequency must be set to 224.25 MHz.
This value indicetes the horisontal positioning of the picture. In this row “Software version and date is mentioned” These will be changed according to the DI. It is possible to move by using “UP”, “DOWN”, “LEFT” and “RIGHT” RC buttons in this menu structure.
Init NVM 6.2.4. Press RC “RIGHT” button at “Service Submenu 1” and switch to “Service Submenu 2” Press RC “DOWN” button and highlight “”Init NVM” Press RC “RIGHT” button to set TV to initial settings. Next time TV is turned on, default settings will be loaded to TV.
6.3. Panel Type Change Shortcut As 17MB18 software supports from 14” to 23” panel types, it is possible not to see anything on the screen after Init NVM as the default panel type is 23” in the software. That s why, a hidden menu is needed to change supported panel from a hidden menu which is not shown on the screen.
The Master EEPROM prepared like above is copied and multiplied to use in mass production. The copy EEPROM is placed on IC 101 of 17MB18. (When TV is turned on the software will realise that EEPROM is not empty, so SW will not change the values in the EEPROM.)
balance extended audio features Feature headphone equalizer effect normal volume sound style user balance Will be left unchanged as they are adjusted in the EEPROM. Window Menu 7.3.3. Window image size auto white tone normal dynamic skin tone Options Menu 7.3.4.
Phase value is automatically set by the software. There is no need to adjust any value in this section. Audio Menü 7.4.2. Audio volume balance extended audio features Feature headphone Equilizer Effect normal volume sound style user balance Will be left unchanged as they are adjusted in the EEPROM. Window Menu 7.4.3.
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Factory Settings The items Language and Country in the Factory Settings 1 menu can be activated, and their effects can be seen after this process only. Also the items in the Picture , Audio, Feature menus of the TV are set to their default values that are stored in the eprom.
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