Hitachi EH-150 Series Applications Manual page 169

(2) CRC check
The error check field based on the CRC system is included in the message frame in RTU mode. The target of CRC
calculation is all messages (Device No., Function code, Data).
The CRC code is 16-bit data generated to the block of any data length of a 8-bit unit, which is calculated by
generation polynomial of CRC-16(X
High byte and the Low byte
Ex ) The calculation method is explained using 2 bytes of data (0x0207) .
Procedure CRC(Calculation middle)
CRC 1111
02
XOR 1111
Shift right(1) 0111
XOR 0xA001 1010
1101
Shift right (2) 0110
XOR 0xA001 1010
1100
Shift right (3) 0110
Shift right (4) 0011
XOR 0xA001 1010
1001
Shift right (5) 0100
Shift right (6) 0010
XOR 0xA001 1010
1000
Shift right (7) 0100
Shift right (8) 0010
XOR 0xA001 1010
1000
16 15 2
+X +X +1).
CRC-16 calculation
CRC* = HFFFF
YES
Target data
exist ?
NO
of CRC are swapped.
END Target data is shifted by 1 byte.
Figure A.3 Calculation procedure of CRC-16
Flag
1111 1111 1111
0000 0010
1111 1111 1101
1111 1111 1110 1
0000 0000 0001
1111 1111 1111
1111 1111 1111 1
0000 0000 0001
1111 1111 1110
0111 1111 1111 0
0011 1111 1111 1
0000 0000 0001
0011 1111 1110
1001 1111 1111 0
0100 1111 1111 1
0000 0000 0001
0100 1111 1110
0010 0111 1111 0
0001 0011 1111 1
0000 0000 0001
0001 0011 1110
* CRC :
High Low
CRC register (2 byte)
CRC = CRC XOR Target data
8bit shift
complete?
NO
CRC = Shift CRC to the right (1bit)
"0"
bit which
overflowed by shift
"1"
CRC = CRC XOR HA001
Procedure CRC(Calculation middle)
1000
07
XOR 1000
Shift right (1) 0100
XOR 0xA001 1010
1110
Shift right (2) 0111
XOR 0xA001 1010
1101
Shift right (3) 0110
XOR 0xA001 1010
1100
Shift right (4) 0110
Shift right (5) 0011
XOR 0xA001 1010
1001
Shift right (6) 0100
Shift right (7) 0010
Shift right (8) 0001
CRC
A - 5
YES
0001 0011 1110
0000 0111
0001 0011 1001
0000 1001 1100
0000 0000 0001
0000 1001 1101
0000 0100 1110
0000 0000 0001
0000 0100 1111
1000 0010 0111
0000 0000 0001
1000 0010 0110
0100 0001 0011
0010 0000 1001
0000 0000 0001
0010 0000 1000
1001 0000 0100
0100 1000 0010
0010 0100 0001
1 2 4 1
4 1 1 2
Appendix
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