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Circuit Diagrams and PWB Layouts
FDS Module: Dual Screen IC and Memory
2748 B2
2750 C9
2752 F9
2754 F9
2756 B2
2758 G5
2760 F2
2749 E2
2751 C9
2753 F9
2755 B1
2757 C2
2759 F2
2761 G4
1
2
3
DUAL SCREEN IC + MEMORY
A
M1
M5
7700
M11
M12
M13
SAB9079H
78
1V1
105
YF-SUB
SY
2V1
103
UF-SUB
SU
3V3
101
VF-SUB
SV
B
107
SAVREFT
106
+3V3A
SAVREFB
2782
102
SFVDDA
100n
104
3750
SAVBIAS
99
39K
3V3
SAVDDA
+3V3A
100
SAVSSA
109
+3V3D
2765
C6VDDD
C
108
100n
C6VSSD
94
SUB-H
SHSYNC
91
+5V2
SHVDDA
4700
93
SPVDDA
+3V3A2
92
SPVSSA
89
+5V2D
P5VDDD
90
P5VSSD
D
96
TSCLK
97
TSMSB
98
TSEXT
1V1
126
YF-DEC
MY
0V1
128
UF-DEC
MU
0V
2
VF-DEC
MV
2762
124
MAVREFT
2763
E
100n
125
MAVREFB
100n
3V3
1
MFVDDA
5752
2749
127
MAVBIAS
+3V3A
0u82
100n
3V2
4
MAVDDA
0V
3
MAVSSA
122
+3V3D
C7VDDD
123
C7VSSD
F
9
MHSYNC
0V
G
1
2
3
MG3.2E
7.
2762 E3
2764 C11
2766 C1
2768 D3
2770 G4
2772 D9
2774 D9
2776 A12
2763 E2
2765 C2
2767 D2
2769 F3
2771 F8
2773 D9
2775 D9
2777 A13
4
5
6
70
77
40
51
41 42
43 44 45 46 49 50 69 67
65 61 59 57 55
53
39 38
CLAMP
AND A/D
H/V FILTER
LINE MEMORY
CONVERTER
AND (RE) FORMATTING
PLL AND CLOCK
GENERATION
CLAMP
AND A/D
H/V FILTER
LINE MEMORY
CONVERTER
PLL AND CLOCK
GENERATION
IIC BUS
CONTROL
12 10 11
14 13
95
8
7
6
5
115
116
114
117
121 119 120
118
112
111
110
0V
0V
0V
0V
5V
3V
5V
5V
0V
+5V2
+5V2D
2761
NOTE : Long side 38 pins
Short side 26 pins
100n
+3V3A2
4
5
6
97
2778 A13
2780 A11
2782 B2
2788 G2
2797 F1
3750 B2
3752 F5
2779 A13
2781 A11
2787 F2
2789 C1
2798 G11
3751 F2
3753 G10
7
8
9
37 36 35 34 33 32 68 66
64 60 58 56 54
52
71
AD0
72
AD1
73
AD2
74
AD3
83
AD4
82
AD5
81
AD6
80
AD7
79
AD8
85
VDRAM CONTROL
C4VDDD
2750
86
C4VSSD
18
100n
C2VDDD
2751
17
C2VSSD
62
100n
P3VDDD
2775
63
P3VSSD
48
100n
P2VDDD
2774
47
P2VSSD
100n
76
P4VDDD
2773
75
P4VSSD
100n
113
PVDDD
2772
88
+3V3D
C5VDDD
100n
87
C5VSSD
15
LINE MEMORY
+3V3D
C1VDDD
16
M14
C1VSSD
0V
19
FBL-DS-OUT
DFB
D/A CONVERTER
0V4
24
OUT-1
DY
AND BUFFER
1V3
27
OUT-2
DU
1V3
OUT-3
29
PLL AND CLOCK
DV
2752
GENERATION
25
DAVREFT
M16
M15
2753
26
100n
DAVREFB
2754
100n
28
DAVBIAS
100n
84
20
21
23
22
30
31
2771
100n
+3V3D
+3V3A
7
8
9
3754 G10
3756 G5
4700 C2
6753 F11
7750 A11
3755 F11
3757 G5
5752 E1
7700 A3
10
11
12
+5V2D
+5V2D
+5V2D
+5V2D
+5V2D
+5V2D
2781
2776
100n
2780
100n
100n
7750
MSM5416283
1
8
18 32 47 57
AD0
37
AD0
A0
DQ0
AD1
36
AD1
A1
DQ1
AD2
35
AD2
A2
DQ2
AD3
34
AD3
A3
DQ3
AD4
31
AD4
A4
DQ4
AD5
DRAM
30
AD5
A5
DQ5
AD6
29
AD6
A6
DQ6
AD7
28
AD7
A7
DQ7
AD8
27
AD8
A8
DQ8
+3V3D
2764
DQ9
15p
26
RASN
RAS_
DQ10
+3V3D
39
CASN
CAS_
DQ11
DQ12
2
DTN
+5V2D
TRG_
DQ13
25
WEN
WEU_
DQ14
+5V2D
24
WEL_
DQ15
SDQ0
38
+5V2D
QSF
SDQ1
41
DSF
SDQ2
63
+5V2D
SE_
SDQ3
64
SC
SC
SDQ4
SDQ5
SDQ6
SDQ7
SDQ8
40
NC
SDQ9
SDQ10
SDQ11
SDQ12
SDQ13
SDQ14
FBL-DS-OUT
SDQ15
3
13 23 33
42 52 62
PIP-FBL
M11 YF-SUB
M12 UF-SUB
1V / div DC
1V / div DC
10µs / div
10µs / div
10
11
12
13
14
2779
A
2778
100n
2777
100n
100n
5
DAO0
7
DAO1
10
DAO2
B
12
DAO3
15
DAO4
17
DAO5
20
DAO6
22
DAO7
43
DAO8
45
DAO9
C
48
DAO10
50
DAO11
53
DAO12
55
DAO13
58
DAO14
60
DAO15
4
DAI0
D
6
DAI1
9
DAI2
11
DAI3
14
DAI4
16
DAI5
19
DAI6
21
DAI7
E
44
DAI8
46
DAI9
49
DAI10
51
DAI11
54
DAI12
56
DAI13
59
DAI14
F
61
DAI15
G
M13 VF-SUB
1V / div DC
10µs / div
CL 96532042_043.eps
201201
13
14
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